xref: /openbmc/qemu/hw/intc/loongarch_ipi.c (revision 14dc02b56a3d4434401ad92415cbec3e30ff3fa5)
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3  * LoongArch IPI interrupt support
4  *
5  * Copyright (C) 2024 Loongson Technology Corporation Limited
6  */
7 
8 #include "qemu/osdep.h"
9 #include "hw/boards.h"
10 #include "qapi/error.h"
11 #include "hw/intc/loongarch_ipi.h"
12 #include "hw/qdev-properties.h"
13 #include "target/loongarch/cpu.h"
14 
15 static AddressSpace *get_iocsr_as(CPUState *cpu)
16 {
17     return LOONGARCH_CPU(cpu)->env.address_space_iocsr;
18 }
19 
20 static int archid_cmp(const void *a, const void *b)
21 {
22    CPUArchId *archid_a = (CPUArchId *)a;
23    CPUArchId *archid_b = (CPUArchId *)b;
24 
25    return archid_a->arch_id - archid_b->arch_id;
26 }
27 
28 static CPUArchId *find_cpu_by_archid(MachineState *ms, uint32_t id)
29 {
30     CPUArchId apic_id, *found_cpu;
31 
32     apic_id.arch_id = id;
33     found_cpu = bsearch(&apic_id, ms->possible_cpus->cpus,
34                         ms->possible_cpus->len,
35                         sizeof(*ms->possible_cpus->cpus),
36                         archid_cmp);
37 
38     return found_cpu;
39 }
40 
41 static CPUState *loongarch_cpu_by_arch_id(int64_t arch_id)
42 {
43     MachineState *machine = MACHINE(qdev_get_machine());
44     CPUArchId *archid;
45 
46     archid = find_cpu_by_archid(machine, arch_id);
47     if (archid) {
48         return CPU(archid->cpu);
49     }
50 
51     return NULL;
52 }
53 
54 static void loongarch_ipi_realize(DeviceState *dev, Error **errp)
55 {
56     LoongsonIPICommonState *lics = LOONGSON_IPI_COMMON(dev);
57     LoongarchIPIClass *lic = LOONGARCH_IPI_GET_CLASS(dev);
58     MachineState *machine = MACHINE(qdev_get_machine());
59     MachineClass *mc = MACHINE_GET_CLASS(machine);
60     const CPUArchIdList *id_list;
61     Error *local_err = NULL;
62     int i;
63 
64     lic->parent_realize(dev, &local_err);
65     if (local_err) {
66         error_propagate(errp, local_err);
67         return;
68     }
69 
70     assert(mc->possible_cpu_arch_ids);
71     id_list = mc->possible_cpu_arch_ids(machine);
72     lics->num_cpu = id_list->len;
73     lics->cpu = g_new0(IPICore, lics->num_cpu);
74     for (i = 0; i < lics->num_cpu; i++) {
75         lics->cpu[i].arch_id = id_list->cpus[i].arch_id;
76         lics->cpu[i].cpu = CPU(id_list->cpus[i].cpu);
77         lics->cpu[i].ipi = lics;
78         qdev_init_gpio_out(dev, &lics->cpu[i].irq, 1);
79     }
80 }
81 
82 static const Property loongarch_ipi_properties[] = {
83     DEFINE_PROP_UINT32("num-cpu", LoongsonIPICommonState, num_cpu, 1),
84 };
85 
86 static void loongarch_ipi_class_init(ObjectClass *klass, void *data)
87 {
88     LoongsonIPICommonClass *licc = LOONGSON_IPI_COMMON_CLASS(klass);
89     LoongarchIPIClass *lic = LOONGARCH_IPI_CLASS(klass);
90     DeviceClass *dc = DEVICE_CLASS(klass);
91 
92     device_class_set_parent_realize(dc, loongarch_ipi_realize,
93                                     &lic->parent_realize);
94     device_class_set_props(dc, loongarch_ipi_properties);
95     licc->get_iocsr_as = get_iocsr_as;
96     licc->cpu_by_arch_id = loongarch_cpu_by_arch_id;
97 }
98 
99 static const TypeInfo loongarch_ipi_types[] = {
100     {
101         .name               = TYPE_LOONGARCH_IPI,
102         .parent             = TYPE_LOONGSON_IPI_COMMON,
103         .instance_size      = sizeof(LoongarchIPIState),
104         .class_size         = sizeof(LoongarchIPIClass),
105         .class_init         = loongarch_ipi_class_init,
106     }
107 };
108 
109 DEFINE_TYPES(loongarch_ipi_types)
110