xref: /openbmc/qemu/hw/intc/ioapic_common.c (revision ddbb0d09)
1 /*
2  *  IOAPIC emulation logic - common bits of emulated and KVM kernel model
3  *
4  *  Copyright (c) 2004-2005 Fabrice Bellard
5  *  Copyright (c) 2009      Xiantao Zhang, Intel
6  *  Copyright (c) 2011      Jan Kiszka, Siemens AG
7  *
8  * This library is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU Lesser General Public
10  * License as published by the Free Software Foundation; either
11  * version 2 of the License, or (at your option) any later version.
12  *
13  * This library is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
16  * Lesser General Public License for more details.
17  *
18  * You should have received a copy of the GNU Lesser General Public
19  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20  */
21 
22 #include "hw/i386/ioapic.h"
23 #include "hw/i386/ioapic_internal.h"
24 #include "hw/sysbus.h"
25 
26 /* ioapic_no count start from 0 to MAX_IOAPICS,
27  * remove as static variable from ioapic_common_init.
28  * now as a global variable, let child to increase the counter
29  * then we can drop the 'instance_no' argument
30  * and convert to our QOM's realize function
31  */
32 int ioapic_no;
33 
34 void ioapic_reset_common(DeviceState *dev)
35 {
36     IOAPICCommonState *s = IOAPIC_COMMON(dev);
37     int i;
38 
39     s->id = 0;
40     s->ioregsel = 0;
41     s->irr = 0;
42     for (i = 0; i < IOAPIC_NUM_PINS; i++) {
43         s->ioredtbl[i] = 1 << IOAPIC_LVT_MASKED_SHIFT;
44     }
45 }
46 
47 static void ioapic_dispatch_pre_save(void *opaque)
48 {
49     IOAPICCommonState *s = IOAPIC_COMMON(opaque);
50     IOAPICCommonClass *info = IOAPIC_COMMON_GET_CLASS(s);
51 
52     if (info->pre_save) {
53         info->pre_save(s);
54     }
55 }
56 
57 static int ioapic_dispatch_post_load(void *opaque, int version_id)
58 {
59     IOAPICCommonState *s = IOAPIC_COMMON(opaque);
60     IOAPICCommonClass *info = IOAPIC_COMMON_GET_CLASS(s);
61 
62     if (info->post_load) {
63         info->post_load(s);
64     }
65     return 0;
66 }
67 
68 static void ioapic_common_realize(DeviceState *dev, Error **errp)
69 {
70     IOAPICCommonState *s = IOAPIC_COMMON(dev);
71     IOAPICCommonClass *info;
72 
73     if (ioapic_no >= MAX_IOAPICS) {
74         error_setg(errp, "Only %d ioapics allowed", MAX_IOAPICS);
75         return;
76     }
77 
78     info = IOAPIC_COMMON_GET_CLASS(s);
79     info->realize(dev, errp);
80 
81     sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->io_memory);
82     ioapic_no++;
83 }
84 
85 static const VMStateDescription vmstate_ioapic_common = {
86     .name = "ioapic",
87     .version_id = 3,
88     .minimum_version_id = 1,
89     .pre_save = ioapic_dispatch_pre_save,
90     .post_load = ioapic_dispatch_post_load,
91     .fields = (VMStateField[]) {
92         VMSTATE_UINT8(id, IOAPICCommonState),
93         VMSTATE_UINT8(ioregsel, IOAPICCommonState),
94         VMSTATE_UNUSED_V(2, 8), /* to account for qemu-kvm's v2 format */
95         VMSTATE_UINT32_V(irr, IOAPICCommonState, 2),
96         VMSTATE_UINT64_ARRAY(ioredtbl, IOAPICCommonState, IOAPIC_NUM_PINS),
97         VMSTATE_END_OF_LIST()
98     }
99 };
100 
101 static void ioapic_common_class_init(ObjectClass *klass, void *data)
102 {
103     DeviceClass *dc = DEVICE_CLASS(klass);
104 
105     dc->realize = ioapic_common_realize;
106     dc->vmsd = &vmstate_ioapic_common;
107 }
108 
109 static const TypeInfo ioapic_common_type = {
110     .name = TYPE_IOAPIC_COMMON,
111     .parent = TYPE_SYS_BUS_DEVICE,
112     .instance_size = sizeof(IOAPICCommonState),
113     .class_size = sizeof(IOAPICCommonClass),
114     .class_init = ioapic_common_class_init,
115     .abstract = true,
116 };
117 
118 static void ioapic_common_register_types(void)
119 {
120     type_register_static(&ioapic_common_type);
121 }
122 
123 type_init(ioapic_common_register_types)
124