1 /* 2 * ARM Generic Interrupt Controller using KVM in-kernel support 3 * 4 * Copyright (c) 2015 Samsung Electronics Co., Ltd. 5 * Written by Pavel Fedin 6 * Based on vGICv2 code by Peter Maydell 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation, either version 2 of the License, or 11 * (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License along 19 * with this program; if not, see <http://www.gnu.org/licenses/>. 20 */ 21 22 #include "qemu/osdep.h" 23 #include "hw/intc/arm_gicv3_common.h" 24 #include "hw/sysbus.h" 25 #include "sysemu/kvm.h" 26 #include "kvm_arm.h" 27 #include "vgic_common.h" 28 29 #ifdef DEBUG_GICV3_KVM 30 #define DPRINTF(fmt, ...) \ 31 do { fprintf(stderr, "kvm_gicv3: " fmt, ## __VA_ARGS__); } while (0) 32 #else 33 #define DPRINTF(fmt, ...) \ 34 do { } while (0) 35 #endif 36 37 #define TYPE_KVM_ARM_GICV3 "kvm-arm-gicv3" 38 #define KVM_ARM_GICV3(obj) \ 39 OBJECT_CHECK(GICv3State, (obj), TYPE_KVM_ARM_GICV3) 40 #define KVM_ARM_GICV3_CLASS(klass) \ 41 OBJECT_CLASS_CHECK(KVMARMGICv3Class, (klass), TYPE_KVM_ARM_GICV3) 42 #define KVM_ARM_GICV3_GET_CLASS(obj) \ 43 OBJECT_GET_CLASS(KVMARMGICv3Class, (obj), TYPE_KVM_ARM_GICV3) 44 45 typedef struct KVMARMGICv3Class { 46 ARMGICv3CommonClass parent_class; 47 DeviceRealize parent_realize; 48 void (*parent_reset)(DeviceState *dev); 49 } KVMARMGICv3Class; 50 51 static void kvm_arm_gicv3_set_irq(void *opaque, int irq, int level) 52 { 53 GICv3State *s = (GICv3State *)opaque; 54 55 kvm_arm_gic_set_irq(s->num_irq, irq, level); 56 } 57 58 static void kvm_arm_gicv3_put(GICv3State *s) 59 { 60 /* TODO */ 61 DPRINTF("Cannot put kernel gic state, no kernel interface\n"); 62 } 63 64 static void kvm_arm_gicv3_get(GICv3State *s) 65 { 66 /* TODO */ 67 DPRINTF("Cannot get kernel gic state, no kernel interface\n"); 68 } 69 70 static void kvm_arm_gicv3_reset(DeviceState *dev) 71 { 72 GICv3State *s = ARM_GICV3_COMMON(dev); 73 KVMARMGICv3Class *kgc = KVM_ARM_GICV3_GET_CLASS(s); 74 75 DPRINTF("Reset\n"); 76 77 kgc->parent_reset(dev); 78 kvm_arm_gicv3_put(s); 79 } 80 81 static void kvm_arm_gicv3_realize(DeviceState *dev, Error **errp) 82 { 83 GICv3State *s = KVM_ARM_GICV3(dev); 84 KVMARMGICv3Class *kgc = KVM_ARM_GICV3_GET_CLASS(s); 85 Error *local_err = NULL; 86 87 DPRINTF("kvm_arm_gicv3_realize\n"); 88 89 kgc->parent_realize(dev, &local_err); 90 if (local_err) { 91 error_propagate(errp, local_err); 92 return; 93 } 94 95 if (s->security_extn) { 96 error_setg(errp, "the in-kernel VGICv3 does not implement the " 97 "security extensions"); 98 return; 99 } 100 101 gicv3_init_irqs_and_mmio(s, kvm_arm_gicv3_set_irq, NULL); 102 103 /* Try to create the device via the device control API */ 104 s->dev_fd = kvm_create_device(kvm_state, KVM_DEV_TYPE_ARM_VGIC_V3, false); 105 if (s->dev_fd < 0) { 106 error_setg_errno(errp, -s->dev_fd, "error creating in-kernel VGIC"); 107 return; 108 } 109 110 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_NR_IRQS, 111 0, &s->num_irq, true); 112 113 /* Tell the kernel to complete VGIC initialization now */ 114 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CTRL, 115 KVM_DEV_ARM_VGIC_CTRL_INIT, NULL, true); 116 117 kvm_arm_register_device(&s->iomem_dist, -1, KVM_DEV_ARM_VGIC_GRP_ADDR, 118 KVM_VGIC_V3_ADDR_TYPE_DIST, s->dev_fd); 119 kvm_arm_register_device(&s->iomem_redist, -1, KVM_DEV_ARM_VGIC_GRP_ADDR, 120 KVM_VGIC_V3_ADDR_TYPE_REDIST, s->dev_fd); 121 } 122 123 static void kvm_arm_gicv3_class_init(ObjectClass *klass, void *data) 124 { 125 DeviceClass *dc = DEVICE_CLASS(klass); 126 ARMGICv3CommonClass *agcc = ARM_GICV3_COMMON_CLASS(klass); 127 KVMARMGICv3Class *kgc = KVM_ARM_GICV3_CLASS(klass); 128 129 agcc->pre_save = kvm_arm_gicv3_get; 130 agcc->post_load = kvm_arm_gicv3_put; 131 kgc->parent_realize = dc->realize; 132 kgc->parent_reset = dc->reset; 133 dc->realize = kvm_arm_gicv3_realize; 134 dc->reset = kvm_arm_gicv3_reset; 135 } 136 137 static const TypeInfo kvm_arm_gicv3_info = { 138 .name = TYPE_KVM_ARM_GICV3, 139 .parent = TYPE_ARM_GICV3_COMMON, 140 .instance_size = sizeof(GICv3State), 141 .class_init = kvm_arm_gicv3_class_init, 142 .class_size = sizeof(KVMARMGICv3Class), 143 }; 144 145 static void kvm_arm_gicv3_register_types(void) 146 { 147 type_register_static(&kvm_arm_gicv3_info); 148 } 149 150 type_init(kvm_arm_gicv3_register_types) 151