xref: /openbmc/qemu/hw/intc/arm_gicv3_its_kvm.c (revision dc5bd18f)
1 /*
2  * KVM-based ITS implementation for a GICv3-based system
3  *
4  * Copyright (c) 2015 Samsung Electronics Co., Ltd.
5  * Written by Pavel Fedin <p.fedin@samsung.com>
6  *
7  * This library is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU Lesser General Public
9  * License as published by the Free Software Foundation; either
10  * version 2 of the License, or (at your option) any later version.
11  *
12  * This library is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15  * Lesser General Public License for more details.
16  *
17  * You should have received a copy of the GNU Lesser General Public
18  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19  */
20 
21 #include "qemu/osdep.h"
22 #include "qapi/error.h"
23 #include "hw/intc/arm_gicv3_its_common.h"
24 #include "sysemu/sysemu.h"
25 #include "sysemu/kvm.h"
26 #include "kvm_arm.h"
27 #include "migration/blocker.h"
28 
29 #define TYPE_KVM_ARM_ITS "arm-its-kvm"
30 #define KVM_ARM_ITS(obj) OBJECT_CHECK(GICv3ITSState, (obj), TYPE_KVM_ARM_ITS)
31 #define KVM_ARM_ITS_CLASS(klass) \
32      OBJECT_CLASS_CHECK(KVMARMITSClass, (klass), TYPE_KVM_ARM_ITS)
33 #define KVM_ARM_ITS_GET_CLASS(obj) \
34      OBJECT_GET_CLASS(KVMARMITSClass, (obj), TYPE_KVM_ARM_ITS)
35 
36 typedef struct KVMARMITSClass {
37     GICv3ITSCommonClass parent_class;
38     void (*parent_reset)(DeviceState *dev);
39 } KVMARMITSClass;
40 
41 
42 static int kvm_its_send_msi(GICv3ITSState *s, uint32_t value, uint16_t devid)
43 {
44     struct kvm_msi msi;
45 
46     if (unlikely(!s->translater_gpa_known)) {
47         MemoryRegion *mr = &s->iomem_its_translation;
48         MemoryRegionSection mrs;
49 
50         mrs = memory_region_find(mr, 0, 1);
51         memory_region_unref(mrs.mr);
52         s->gits_translater_gpa = mrs.offset_within_address_space + 0x40;
53         s->translater_gpa_known = true;
54     }
55 
56     msi.address_lo = extract64(s->gits_translater_gpa, 0, 32);
57     msi.address_hi = extract64(s->gits_translater_gpa, 32, 32);
58     msi.data = le32_to_cpu(value);
59     msi.flags = KVM_MSI_VALID_DEVID;
60     msi.devid = devid;
61     memset(msi.pad, 0, sizeof(msi.pad));
62 
63     return kvm_vm_ioctl(kvm_state, KVM_SIGNAL_MSI, &msi);
64 }
65 
66 /**
67  * vm_change_state_handler - VM change state callback aiming at flushing
68  * ITS tables into guest RAM
69  *
70  * The tables get flushed to guest RAM whenever the VM gets stopped.
71  */
72 static void vm_change_state_handler(void *opaque, int running,
73                                     RunState state)
74 {
75     GICv3ITSState *s = (GICv3ITSState *)opaque;
76     Error *err = NULL;
77 
78     if (running) {
79         return;
80     }
81 
82     kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CTRL,
83                       KVM_DEV_ARM_ITS_SAVE_TABLES, NULL, true, &err);
84     if (err) {
85         error_report_err(err);
86     }
87 }
88 
89 static void kvm_arm_its_realize(DeviceState *dev, Error **errp)
90 {
91     GICv3ITSState *s = ARM_GICV3_ITS_COMMON(dev);
92     Error *local_err = NULL;
93 
94     s->dev_fd = kvm_create_device(kvm_state, KVM_DEV_TYPE_ARM_VGIC_ITS, false);
95     if (s->dev_fd < 0) {
96         error_setg_errno(errp, -s->dev_fd, "error creating in-kernel ITS");
97         return;
98     }
99 
100     /* explicit init of the ITS */
101     kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CTRL,
102                       KVM_DEV_ARM_VGIC_CTRL_INIT, NULL, true, &error_abort);
103 
104     /* register the base address */
105     kvm_arm_register_device(&s->iomem_its_cntrl, -1, KVM_DEV_ARM_VGIC_GRP_ADDR,
106                             KVM_VGIC_ITS_ADDR_TYPE, s->dev_fd);
107 
108     gicv3_its_init_mmio(s, NULL);
109 
110     if (!kvm_device_check_attr(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
111         GITS_CTLR)) {
112         error_setg(&s->migration_blocker, "This operating system kernel "
113                    "does not support vITS migration");
114         migrate_add_blocker(s->migration_blocker, &local_err);
115         if (local_err) {
116             error_propagate(errp, local_err);
117             error_free(s->migration_blocker);
118             return;
119         }
120     } else {
121         qemu_add_vm_change_state_handler(vm_change_state_handler, s);
122     }
123 
124     kvm_msi_use_devid = true;
125     kvm_gsi_direct_mapping = false;
126     kvm_msi_via_irqfd_allowed = kvm_irqfds_enabled();
127 }
128 
129 /**
130  * kvm_arm_its_pre_save - handles the saving of ITS registers.
131  * ITS tables are flushed into guest RAM separately and earlier,
132  * through the VM change state handler, since at the moment pre_save()
133  * is called, the guest RAM has already been saved.
134  */
135 static void kvm_arm_its_pre_save(GICv3ITSState *s)
136 {
137     int i;
138 
139     for (i = 0; i < 8; i++) {
140         kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
141                           GITS_BASER + i * 8, &s->baser[i], false,
142                           &error_abort);
143     }
144 
145     kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
146                       GITS_CTLR, &s->ctlr, false, &error_abort);
147 
148     kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
149                       GITS_CBASER, &s->cbaser, false, &error_abort);
150 
151     kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
152                       GITS_CREADR, &s->creadr, false, &error_abort);
153 
154     kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
155                       GITS_CWRITER, &s->cwriter, false, &error_abort);
156 
157     kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
158                       GITS_IIDR, &s->iidr, false, &error_abort);
159 }
160 
161 /**
162  * kvm_arm_its_post_load - Restore both the ITS registers and tables
163  */
164 static void kvm_arm_its_post_load(GICv3ITSState *s)
165 {
166     int i;
167 
168     kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
169                       GITS_IIDR, &s->iidr, true, &error_abort);
170 
171     /*
172      * must be written before GITS_CREADR since GITS_CBASER write
173      * access resets GITS_CREADR.
174      */
175     kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
176                       GITS_CBASER, &s->cbaser, true, &error_abort);
177 
178     kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
179                       GITS_CREADR, &s->creadr, true, &error_abort);
180 
181     kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
182                       GITS_CWRITER, &s->cwriter, true, &error_abort);
183 
184 
185     for (i = 0; i < 8; i++) {
186         kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
187                           GITS_BASER + i * 8, &s->baser[i], true,
188                           &error_abort);
189     }
190 
191     kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CTRL,
192                       KVM_DEV_ARM_ITS_RESTORE_TABLES, NULL, true,
193                       &error_abort);
194 
195     kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
196                       GITS_CTLR, &s->ctlr, true, &error_abort);
197 }
198 
199 static void kvm_arm_its_reset(DeviceState *dev)
200 {
201     GICv3ITSState *s = ARM_GICV3_ITS_COMMON(dev);
202     KVMARMITSClass *c = KVM_ARM_ITS_GET_CLASS(s);
203     int i;
204 
205     c->parent_reset(dev);
206 
207     if (kvm_device_check_attr(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CTRL,
208                                KVM_DEV_ARM_ITS_CTRL_RESET)) {
209         kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CTRL,
210                           KVM_DEV_ARM_ITS_CTRL_RESET, NULL, true, &error_abort);
211         return;
212     }
213 
214     error_report("ITS KVM: full reset is not supported by the host kernel");
215 
216     if (!kvm_device_check_attr(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
217                                GITS_CTLR)) {
218         return;
219     }
220 
221     kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
222                       GITS_CTLR, &s->ctlr, true, &error_abort);
223 
224     kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
225                       GITS_CBASER, &s->cbaser, true, &error_abort);
226 
227     for (i = 0; i < 8; i++) {
228         kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
229                           GITS_BASER + i * 8, &s->baser[i], true,
230                           &error_abort);
231     }
232 }
233 
234 static Property kvm_arm_its_props[] = {
235     DEFINE_PROP_LINK("parent-gicv3", GICv3ITSState, gicv3, "kvm-arm-gicv3",
236                      GICv3State *),
237     DEFINE_PROP_END_OF_LIST(),
238 };
239 
240 static void kvm_arm_its_class_init(ObjectClass *klass, void *data)
241 {
242     DeviceClass *dc = DEVICE_CLASS(klass);
243     GICv3ITSCommonClass *icc = ARM_GICV3_ITS_COMMON_CLASS(klass);
244     KVMARMITSClass *ic = KVM_ARM_ITS_CLASS(klass);
245 
246     dc->realize = kvm_arm_its_realize;
247     dc->props   = kvm_arm_its_props;
248     device_class_set_parent_reset(dc, kvm_arm_its_reset, &ic->parent_reset);
249     icc->send_msi = kvm_its_send_msi;
250     icc->pre_save = kvm_arm_its_pre_save;
251     icc->post_load = kvm_arm_its_post_load;
252 }
253 
254 static const TypeInfo kvm_arm_its_info = {
255     .name = TYPE_KVM_ARM_ITS,
256     .parent = TYPE_ARM_GICV3_ITS_COMMON,
257     .instance_size = sizeof(GICv3ITSState),
258     .class_init = kvm_arm_its_class_init,
259     .class_size = sizeof(KVMARMITSClass),
260 };
261 
262 static void kvm_arm_its_register_types(void)
263 {
264     type_register_static(&kvm_arm_its_info);
265 }
266 
267 type_init(kvm_arm_its_register_types)
268