1 /* 2 * KVM-based ITS implementation for a GICv3-based system 3 * 4 * Copyright (c) 2015 Samsung Electronics Co., Ltd. 5 * Written by Pavel Fedin <p.fedin@samsung.com> 6 * 7 * This library is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU Lesser General Public 9 * License as published by the Free Software Foundation; either 10 * version 2.1 of the License, or (at your option) any later version. 11 * 12 * This library is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 * Lesser General Public License for more details. 16 * 17 * You should have received a copy of the GNU Lesser General Public 18 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 19 */ 20 21 #include "qemu/osdep.h" 22 #include "qapi/error.h" 23 #include "qemu/module.h" 24 #include "hw/intc/arm_gicv3_its_common.h" 25 #include "hw/qdev-properties.h" 26 #include "sysemu/runstate.h" 27 #include "sysemu/kvm.h" 28 #include "kvm_arm.h" 29 #include "migration/blocker.h" 30 #include "qom/object.h" 31 32 #define TYPE_KVM_ARM_ITS "arm-its-kvm" 33 typedef struct KVMARMITSClass KVMARMITSClass; 34 /* This is reusing the GICv3ITSState typedef from ARM_GICV3_ITS_COMMON */ 35 DECLARE_OBJ_CHECKERS(GICv3ITSState, KVMARMITSClass, 36 KVM_ARM_ITS, TYPE_KVM_ARM_ITS) 37 38 struct KVMARMITSClass { 39 GICv3ITSCommonClass parent_class; 40 ResettablePhases parent_phases; 41 }; 42 43 44 static int kvm_its_send_msi(GICv3ITSState *s, uint32_t value, uint16_t devid) 45 { 46 struct kvm_msi msi; 47 48 if (unlikely(!s->translater_gpa_known)) { 49 MemoryRegion *mr = &s->iomem_its_translation; 50 MemoryRegionSection mrs; 51 52 mrs = memory_region_find(mr, 0, 1); 53 memory_region_unref(mrs.mr); 54 s->gits_translater_gpa = mrs.offset_within_address_space + 0x40; 55 s->translater_gpa_known = true; 56 } 57 58 msi.address_lo = extract64(s->gits_translater_gpa, 0, 32); 59 msi.address_hi = extract64(s->gits_translater_gpa, 32, 32); 60 msi.data = le32_to_cpu(value); 61 msi.flags = KVM_MSI_VALID_DEVID; 62 msi.devid = devid; 63 memset(msi.pad, 0, sizeof(msi.pad)); 64 65 return kvm_vm_ioctl(kvm_state, KVM_SIGNAL_MSI, &msi); 66 } 67 68 /** 69 * vm_change_state_handler - VM change state callback aiming at flushing 70 * ITS tables into guest RAM 71 * 72 * The tables get flushed to guest RAM whenever the VM gets stopped. 73 */ 74 static void vm_change_state_handler(void *opaque, bool running, 75 RunState state) 76 { 77 GICv3ITSState *s = (GICv3ITSState *)opaque; 78 Error *err = NULL; 79 80 if (running) { 81 return; 82 } 83 84 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CTRL, 85 KVM_DEV_ARM_ITS_SAVE_TABLES, NULL, true, &err); 86 if (err) { 87 error_report_err(err); 88 } 89 } 90 91 static void kvm_arm_its_realize(DeviceState *dev, Error **errp) 92 { 93 GICv3ITSState *s = ARM_GICV3_ITS_COMMON(dev); 94 95 s->dev_fd = kvm_create_device(kvm_state, KVM_DEV_TYPE_ARM_VGIC_ITS, false); 96 if (s->dev_fd < 0) { 97 error_setg_errno(errp, -s->dev_fd, "error creating in-kernel ITS"); 98 return; 99 } 100 101 /* explicit init of the ITS */ 102 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CTRL, 103 KVM_DEV_ARM_VGIC_CTRL_INIT, NULL, true, &error_abort); 104 105 /* register the base address */ 106 kvm_arm_register_device(&s->iomem_its_cntrl, -1, KVM_DEV_ARM_VGIC_GRP_ADDR, 107 KVM_VGIC_ITS_ADDR_TYPE, s->dev_fd, 0); 108 109 gicv3_add_its(s->gicv3, dev); 110 111 gicv3_its_init_mmio(s, NULL, NULL); 112 113 if (!kvm_device_check_attr(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS, 114 GITS_CTLR)) { 115 error_setg(&s->migration_blocker, "This operating system kernel " 116 "does not support vITS migration"); 117 if (migrate_add_blocker(&s->migration_blocker, errp) < 0) { 118 return; 119 } 120 } else { 121 qemu_add_vm_change_state_handler(vm_change_state_handler, s); 122 } 123 124 kvm_msi_use_devid = true; 125 kvm_gsi_direct_mapping = false; 126 kvm_msi_via_irqfd_allowed = true; 127 } 128 129 /** 130 * kvm_arm_its_pre_save - handles the saving of ITS registers. 131 * ITS tables are flushed into guest RAM separately and earlier, 132 * through the VM change state handler, since at the moment pre_save() 133 * is called, the guest RAM has already been saved. 134 */ 135 static void kvm_arm_its_pre_save(GICv3ITSState *s) 136 { 137 int i; 138 139 for (i = 0; i < 8; i++) { 140 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS, 141 GITS_BASER + i * 8, &s->baser[i], false, 142 &error_abort); 143 } 144 145 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS, 146 GITS_CTLR, &s->ctlr, false, &error_abort); 147 148 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS, 149 GITS_CBASER, &s->cbaser, false, &error_abort); 150 151 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS, 152 GITS_CREADR, &s->creadr, false, &error_abort); 153 154 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS, 155 GITS_CWRITER, &s->cwriter, false, &error_abort); 156 157 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS, 158 GITS_IIDR, &s->iidr, false, &error_abort); 159 } 160 161 /** 162 * kvm_arm_its_post_load - Restore both the ITS registers and tables 163 */ 164 static void kvm_arm_its_post_load(GICv3ITSState *s) 165 { 166 int i; 167 168 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS, 169 GITS_IIDR, &s->iidr, true, &error_abort); 170 171 /* 172 * must be written before GITS_CREADR since GITS_CBASER write 173 * access resets GITS_CREADR. 174 */ 175 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS, 176 GITS_CBASER, &s->cbaser, true, &error_abort); 177 178 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS, 179 GITS_CREADR, &s->creadr, true, &error_abort); 180 181 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS, 182 GITS_CWRITER, &s->cwriter, true, &error_abort); 183 184 185 for (i = 0; i < 8; i++) { 186 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS, 187 GITS_BASER + i * 8, &s->baser[i], true, 188 &error_abort); 189 } 190 191 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CTRL, 192 KVM_DEV_ARM_ITS_RESTORE_TABLES, NULL, true, 193 &error_abort); 194 195 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS, 196 GITS_CTLR, &s->ctlr, true, &error_abort); 197 } 198 199 static void kvm_arm_its_reset_hold(Object *obj) 200 { 201 GICv3ITSState *s = ARM_GICV3_ITS_COMMON(obj); 202 KVMARMITSClass *c = KVM_ARM_ITS_GET_CLASS(s); 203 int i; 204 205 if (c->parent_phases.hold) { 206 c->parent_phases.hold(obj); 207 } 208 209 if (kvm_device_check_attr(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CTRL, 210 KVM_DEV_ARM_ITS_CTRL_RESET)) { 211 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CTRL, 212 KVM_DEV_ARM_ITS_CTRL_RESET, NULL, true, &error_abort); 213 return; 214 } 215 216 warn_report("ITS KVM: full reset is not supported by the host kernel"); 217 218 if (!kvm_device_check_attr(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS, 219 GITS_CTLR)) { 220 return; 221 } 222 223 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS, 224 GITS_CTLR, &s->ctlr, true, &error_abort); 225 226 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS, 227 GITS_CBASER, &s->cbaser, true, &error_abort); 228 229 for (i = 0; i < 8; i++) { 230 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS, 231 GITS_BASER + i * 8, &s->baser[i], true, 232 &error_abort); 233 } 234 } 235 236 static Property kvm_arm_its_props[] = { 237 DEFINE_PROP_LINK("parent-gicv3", GICv3ITSState, gicv3, "kvm-arm-gicv3", 238 GICv3State *), 239 DEFINE_PROP_END_OF_LIST(), 240 }; 241 242 static void kvm_arm_its_class_init(ObjectClass *klass, void *data) 243 { 244 DeviceClass *dc = DEVICE_CLASS(klass); 245 ResettableClass *rc = RESETTABLE_CLASS(klass); 246 GICv3ITSCommonClass *icc = ARM_GICV3_ITS_COMMON_CLASS(klass); 247 KVMARMITSClass *ic = KVM_ARM_ITS_CLASS(klass); 248 249 dc->realize = kvm_arm_its_realize; 250 device_class_set_props(dc, kvm_arm_its_props); 251 resettable_class_set_parent_phases(rc, NULL, kvm_arm_its_reset_hold, NULL, 252 &ic->parent_phases); 253 icc->send_msi = kvm_its_send_msi; 254 icc->pre_save = kvm_arm_its_pre_save; 255 icc->post_load = kvm_arm_its_post_load; 256 } 257 258 static const TypeInfo kvm_arm_its_info = { 259 .name = TYPE_KVM_ARM_ITS, 260 .parent = TYPE_ARM_GICV3_ITS_COMMON, 261 .instance_size = sizeof(GICv3ITSState), 262 .class_init = kvm_arm_its_class_init, 263 .class_size = sizeof(KVMARMITSClass), 264 }; 265 266 static void kvm_arm_its_register_types(void) 267 { 268 type_register_static(&kvm_arm_its_info); 269 } 270 271 type_init(kvm_arm_its_register_types) 272