xref: /openbmc/qemu/hw/input/pl050.c (revision a68694cd)
1 /*
2  * Arm PrimeCell PL050 Keyboard / Mouse Interface
3  *
4  * Copyright (c) 2006-2007 CodeSourcery.
5  * Written by Paul Brook
6  *
7  * This code is licensed under the GPL.
8  */
9 
10 #include "qemu/osdep.h"
11 #include "hw/sysbus.h"
12 #include "migration/vmstate.h"
13 #include "hw/input/ps2.h"
14 #include "hw/irq.h"
15 #include "qemu/log.h"
16 #include "qemu/module.h"
17 #include "qom/object.h"
18 
19 #define TYPE_PL050 "pl050"
20 typedef struct PL050State PL050State;
21 DECLARE_INSTANCE_CHECKER(PL050State, PL050,
22                          TYPE_PL050)
23 
24 struct PL050State {
25     SysBusDevice parent_obj;
26 
27     MemoryRegion iomem;
28     void *dev;
29     uint32_t cr;
30     uint32_t clk;
31     uint32_t last;
32     int pending;
33     qemu_irq irq;
34     bool is_mouse;
35 };
36 
37 static const VMStateDescription vmstate_pl050 = {
38     .name = "pl050",
39     .version_id = 2,
40     .minimum_version_id = 2,
41     .fields = (VMStateField[]) {
42         VMSTATE_UINT32(cr, PL050State),
43         VMSTATE_UINT32(clk, PL050State),
44         VMSTATE_UINT32(last, PL050State),
45         VMSTATE_INT32(pending, PL050State),
46         VMSTATE_END_OF_LIST()
47     }
48 };
49 
50 #define PL050_TXEMPTY         (1 << 6)
51 #define PL050_TXBUSY          (1 << 5)
52 #define PL050_RXFULL          (1 << 4)
53 #define PL050_RXBUSY          (1 << 3)
54 #define PL050_RXPARITY        (1 << 2)
55 #define PL050_KMIC            (1 << 1)
56 #define PL050_KMID            (1 << 0)
57 
58 static const unsigned char pl050_id[] =
59 { 0x50, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
60 
61 static void pl050_update(void *opaque, int level)
62 {
63     PL050State *s = (PL050State *)opaque;
64     int raise;
65 
66     s->pending = level;
67     raise = (s->pending && (s->cr & 0x10) != 0)
68             || (s->cr & 0x08) != 0;
69     qemu_set_irq(s->irq, raise);
70 }
71 
72 static uint64_t pl050_read(void *opaque, hwaddr offset,
73                            unsigned size)
74 {
75     PL050State *s = (PL050State *)opaque;
76     if (offset >= 0xfe0 && offset < 0x1000)
77         return pl050_id[(offset - 0xfe0) >> 2];
78 
79     switch (offset >> 2) {
80     case 0: /* KMICR */
81         return s->cr;
82     case 1: /* KMISTAT */
83         {
84             uint8_t val;
85             uint32_t stat;
86 
87             val = s->last;
88             val = val ^ (val >> 4);
89             val = val ^ (val >> 2);
90             val = (val ^ (val >> 1)) & 1;
91 
92             stat = PL050_TXEMPTY;
93             if (val)
94                 stat |= PL050_RXPARITY;
95             if (s->pending)
96                 stat |= PL050_RXFULL;
97 
98             return stat;
99         }
100     case 2: /* KMIDATA */
101         if (s->pending)
102             s->last = ps2_read_data(s->dev);
103         return s->last;
104     case 3: /* KMICLKDIV */
105         return s->clk;
106     case 4: /* KMIIR */
107         return s->pending | 2;
108     default:
109         qemu_log_mask(LOG_GUEST_ERROR,
110                       "pl050_read: Bad offset %x\n", (int)offset);
111         return 0;
112     }
113 }
114 
115 static void pl050_write(void *opaque, hwaddr offset,
116                         uint64_t value, unsigned size)
117 {
118     PL050State *s = (PL050State *)opaque;
119     switch (offset >> 2) {
120     case 0: /* KMICR */
121         s->cr = value;
122         pl050_update(s, s->pending);
123         /* ??? Need to implement the enable/disable bit.  */
124         break;
125     case 2: /* KMIDATA */
126         /* ??? This should toggle the TX interrupt line.  */
127         /* ??? This means kbd/mouse can block each other.  */
128         if (s->is_mouse) {
129             ps2_write_mouse(s->dev, value);
130         } else {
131             ps2_write_keyboard(s->dev, value);
132         }
133         break;
134     case 3: /* KMICLKDIV */
135         s->clk = value;
136         return;
137     default:
138         qemu_log_mask(LOG_GUEST_ERROR,
139                       "pl050_write: Bad offset %x\n", (int)offset);
140     }
141 }
142 static const MemoryRegionOps pl050_ops = {
143     .read = pl050_read,
144     .write = pl050_write,
145     .endianness = DEVICE_NATIVE_ENDIAN,
146 };
147 
148 static void pl050_realize(DeviceState *dev, Error **errp)
149 {
150     PL050State *s = PL050(dev);
151     SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
152 
153     memory_region_init_io(&s->iomem, OBJECT(s), &pl050_ops, s, "pl050", 0x1000);
154     sysbus_init_mmio(sbd, &s->iomem);
155     sysbus_init_irq(sbd, &s->irq);
156     if (s->is_mouse) {
157         s->dev = ps2_mouse_init(pl050_update, s);
158     } else {
159         s->dev = ps2_kbd_init(pl050_update, s);
160     }
161 }
162 
163 static void pl050_keyboard_init(Object *obj)
164 {
165     PL050State *s = PL050(obj);
166 
167     s->is_mouse = false;
168 }
169 
170 static void pl050_mouse_init(Object *obj)
171 {
172     PL050State *s = PL050(obj);
173 
174     s->is_mouse = true;
175 }
176 
177 static const TypeInfo pl050_kbd_info = {
178     .name          = "pl050_keyboard",
179     .parent        = TYPE_PL050,
180     .instance_init = pl050_keyboard_init,
181 };
182 
183 static const TypeInfo pl050_mouse_info = {
184     .name          = "pl050_mouse",
185     .parent        = TYPE_PL050,
186     .instance_init = pl050_mouse_init,
187 };
188 
189 static void pl050_class_init(ObjectClass *oc, void *data)
190 {
191     DeviceClass *dc = DEVICE_CLASS(oc);
192 
193     dc->realize = pl050_realize;
194     dc->vmsd = &vmstate_pl050;
195 }
196 
197 static const TypeInfo pl050_type_info = {
198     .name          = TYPE_PL050,
199     .parent        = TYPE_SYS_BUS_DEVICE,
200     .instance_size = sizeof(PL050State),
201     .abstract      = true,
202     .class_init    = pl050_class_init,
203 };
204 
205 static void pl050_register_types(void)
206 {
207     type_register_static(&pl050_type_info);
208     type_register_static(&pl050_kbd_info);
209     type_register_static(&pl050_mouse_info);
210 }
211 
212 type_init(pl050_register_types)
213