xref: /openbmc/qemu/hw/input/pl050.c (revision 9884abee)
1 /*
2  * Arm PrimeCell PL050 Keyboard / Mouse Interface
3  *
4  * Copyright (c) 2006-2007 CodeSourcery.
5  * Written by Paul Brook
6  *
7  * This code is licensed under the GPL.
8  */
9 
10 #include "qemu/osdep.h"
11 #include "hw/sysbus.h"
12 #include "hw/input/ps2.h"
13 
14 #define TYPE_PL050 "pl050"
15 #define PL050(obj) OBJECT_CHECK(PL050State, (obj), TYPE_PL050)
16 
17 typedef struct PL050State {
18     SysBusDevice parent_obj;
19 
20     MemoryRegion iomem;
21     void *dev;
22     uint32_t cr;
23     uint32_t clk;
24     uint32_t last;
25     int pending;
26     qemu_irq irq;
27     bool is_mouse;
28 } PL050State;
29 
30 static const VMStateDescription vmstate_pl050 = {
31     .name = "pl050",
32     .version_id = 2,
33     .minimum_version_id = 2,
34     .fields = (VMStateField[]) {
35         VMSTATE_UINT32(cr, PL050State),
36         VMSTATE_UINT32(clk, PL050State),
37         VMSTATE_UINT32(last, PL050State),
38         VMSTATE_INT32(pending, PL050State),
39         VMSTATE_END_OF_LIST()
40     }
41 };
42 
43 #define PL050_TXEMPTY         (1 << 6)
44 #define PL050_TXBUSY          (1 << 5)
45 #define PL050_RXFULL          (1 << 4)
46 #define PL050_RXBUSY          (1 << 3)
47 #define PL050_RXPARITY        (1 << 2)
48 #define PL050_KMIC            (1 << 1)
49 #define PL050_KMID            (1 << 0)
50 
51 static const unsigned char pl050_id[] =
52 { 0x50, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
53 
54 static void pl050_update(void *opaque, int level)
55 {
56     PL050State *s = (PL050State *)opaque;
57     int raise;
58 
59     s->pending = level;
60     raise = (s->pending && (s->cr & 0x10) != 0)
61             || (s->cr & 0x08) != 0;
62     qemu_set_irq(s->irq, raise);
63 }
64 
65 static uint64_t pl050_read(void *opaque, hwaddr offset,
66                            unsigned size)
67 {
68     PL050State *s = (PL050State *)opaque;
69     if (offset >= 0xfe0 && offset < 0x1000)
70         return pl050_id[(offset - 0xfe0) >> 2];
71 
72     switch (offset >> 2) {
73     case 0: /* KMICR */
74         return s->cr;
75     case 1: /* KMISTAT */
76         {
77             uint8_t val;
78             uint32_t stat;
79 
80             val = s->last;
81             val = val ^ (val >> 4);
82             val = val ^ (val >> 2);
83             val = (val ^ (val >> 1)) & 1;
84 
85             stat = PL050_TXEMPTY;
86             if (val)
87                 stat |= PL050_RXPARITY;
88             if (s->pending)
89                 stat |= PL050_RXFULL;
90 
91             return stat;
92         }
93     case 2: /* KMIDATA */
94         if (s->pending)
95             s->last = ps2_read_data(s->dev);
96         return s->last;
97     case 3: /* KMICLKDIV */
98         return s->clk;
99     case 4: /* KMIIR */
100         return s->pending | 2;
101     default:
102         qemu_log_mask(LOG_GUEST_ERROR,
103                       "pl050_read: Bad offset %x\n", (int)offset);
104         return 0;
105     }
106 }
107 
108 static void pl050_write(void *opaque, hwaddr offset,
109                         uint64_t value, unsigned size)
110 {
111     PL050State *s = (PL050State *)opaque;
112     switch (offset >> 2) {
113     case 0: /* KMICR */
114         s->cr = value;
115         pl050_update(s, s->pending);
116         /* ??? Need to implement the enable/disable bit.  */
117         break;
118     case 2: /* KMIDATA */
119         /* ??? This should toggle the TX interrupt line.  */
120         /* ??? This means kbd/mouse can block each other.  */
121         if (s->is_mouse) {
122             ps2_write_mouse(s->dev, value);
123         } else {
124             ps2_write_keyboard(s->dev, value);
125         }
126         break;
127     case 3: /* KMICLKDIV */
128         s->clk = value;
129         return;
130     default:
131         qemu_log_mask(LOG_GUEST_ERROR,
132                       "pl050_write: Bad offset %x\n", (int)offset);
133     }
134 }
135 static const MemoryRegionOps pl050_ops = {
136     .read = pl050_read,
137     .write = pl050_write,
138     .endianness = DEVICE_NATIVE_ENDIAN,
139 };
140 
141 static int pl050_initfn(SysBusDevice *dev)
142 {
143     PL050State *s = PL050(dev);
144 
145     memory_region_init_io(&s->iomem, OBJECT(s), &pl050_ops, s, "pl050", 0x1000);
146     sysbus_init_mmio(dev, &s->iomem);
147     sysbus_init_irq(dev, &s->irq);
148     if (s->is_mouse) {
149         s->dev = ps2_mouse_init(pl050_update, s);
150     } else {
151         s->dev = ps2_kbd_init(pl050_update, s);
152     }
153     return 0;
154 }
155 
156 static void pl050_keyboard_init(Object *obj)
157 {
158     PL050State *s = PL050(obj);
159 
160     s->is_mouse = false;
161 }
162 
163 static void pl050_mouse_init(Object *obj)
164 {
165     PL050State *s = PL050(obj);
166 
167     s->is_mouse = true;
168 }
169 
170 static const TypeInfo pl050_kbd_info = {
171     .name          = "pl050_keyboard",
172     .parent        = TYPE_PL050,
173     .instance_init = pl050_keyboard_init,
174 };
175 
176 static const TypeInfo pl050_mouse_info = {
177     .name          = "pl050_mouse",
178     .parent        = TYPE_PL050,
179     .instance_init = pl050_mouse_init,
180 };
181 
182 static void pl050_class_init(ObjectClass *oc, void *data)
183 {
184     DeviceClass *dc = DEVICE_CLASS(oc);
185     SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(oc);
186 
187     sdc->init = pl050_initfn;
188     dc->vmsd = &vmstate_pl050;
189 }
190 
191 static const TypeInfo pl050_type_info = {
192     .name          = TYPE_PL050,
193     .parent        = TYPE_SYS_BUS_DEVICE,
194     .instance_size = sizeof(PL050State),
195     .abstract      = true,
196     .class_init    = pl050_class_init,
197 };
198 
199 static void pl050_register_types(void)
200 {
201     type_register_static(&pl050_type_info);
202     type_register_static(&pl050_kbd_info);
203     type_register_static(&pl050_mouse_info);
204 }
205 
206 type_init(pl050_register_types)
207