1 /* 2 * QEMU PC keyboard emulation 3 * 4 * Copyright (c) 2003 Fabrice Bellard 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 #include "qemu/osdep.h" 25 #include "hw/hw.h" 26 #include "hw/isa/isa.h" 27 #include "hw/i386/pc.h" 28 #include "hw/input/ps2.h" 29 #include "hw/input/i8042.h" 30 #include "sysemu/sysemu.h" 31 32 /* debug PC keyboard */ 33 //#define DEBUG_KBD 34 #ifdef DEBUG_KBD 35 #define DPRINTF(fmt, ...) \ 36 do { printf("KBD: " fmt , ## __VA_ARGS__); } while (0) 37 #else 38 #define DPRINTF(fmt, ...) 39 #endif 40 41 /* Keyboard Controller Commands */ 42 #define KBD_CCMD_READ_MODE 0x20 /* Read mode bits */ 43 #define KBD_CCMD_WRITE_MODE 0x60 /* Write mode bits */ 44 #define KBD_CCMD_GET_VERSION 0xA1 /* Get controller version */ 45 #define KBD_CCMD_MOUSE_DISABLE 0xA7 /* Disable mouse interface */ 46 #define KBD_CCMD_MOUSE_ENABLE 0xA8 /* Enable mouse interface */ 47 #define KBD_CCMD_TEST_MOUSE 0xA9 /* Mouse interface test */ 48 #define KBD_CCMD_SELF_TEST 0xAA /* Controller self test */ 49 #define KBD_CCMD_KBD_TEST 0xAB /* Keyboard interface test */ 50 #define KBD_CCMD_KBD_DISABLE 0xAD /* Keyboard interface disable */ 51 #define KBD_CCMD_KBD_ENABLE 0xAE /* Keyboard interface enable */ 52 #define KBD_CCMD_READ_INPORT 0xC0 /* read input port */ 53 #define KBD_CCMD_READ_OUTPORT 0xD0 /* read output port */ 54 #define KBD_CCMD_WRITE_OUTPORT 0xD1 /* write output port */ 55 #define KBD_CCMD_WRITE_OBUF 0xD2 56 #define KBD_CCMD_WRITE_AUX_OBUF 0xD3 /* Write to output buffer as if 57 initiated by the auxiliary device */ 58 #define KBD_CCMD_WRITE_MOUSE 0xD4 /* Write the following byte to the mouse */ 59 #define KBD_CCMD_DISABLE_A20 0xDD /* HP vectra only ? */ 60 #define KBD_CCMD_ENABLE_A20 0xDF /* HP vectra only ? */ 61 #define KBD_CCMD_PULSE_BITS_3_0 0xF0 /* Pulse bits 3-0 of the output port P2. */ 62 #define KBD_CCMD_RESET 0xFE /* Pulse bit 0 of the output port P2 = CPU reset. */ 63 #define KBD_CCMD_NO_OP 0xFF /* Pulse no bits of the output port P2. */ 64 65 /* Keyboard Commands */ 66 #define KBD_CMD_SET_LEDS 0xED /* Set keyboard leds */ 67 #define KBD_CMD_ECHO 0xEE 68 #define KBD_CMD_GET_ID 0xF2 /* get keyboard ID */ 69 #define KBD_CMD_SET_RATE 0xF3 /* Set typematic rate */ 70 #define KBD_CMD_ENABLE 0xF4 /* Enable scanning */ 71 #define KBD_CMD_RESET_DISABLE 0xF5 /* reset and disable scanning */ 72 #define KBD_CMD_RESET_ENABLE 0xF6 /* reset and enable scanning */ 73 #define KBD_CMD_RESET 0xFF /* Reset */ 74 75 /* Keyboard Replies */ 76 #define KBD_REPLY_POR 0xAA /* Power on reset */ 77 #define KBD_REPLY_ACK 0xFA /* Command ACK */ 78 #define KBD_REPLY_RESEND 0xFE /* Command NACK, send the cmd again */ 79 80 /* Status Register Bits */ 81 #define KBD_STAT_OBF 0x01 /* Keyboard output buffer full */ 82 #define KBD_STAT_IBF 0x02 /* Keyboard input buffer full */ 83 #define KBD_STAT_SELFTEST 0x04 /* Self test successful */ 84 #define KBD_STAT_CMD 0x08 /* Last write was a command write (0=data) */ 85 #define KBD_STAT_UNLOCKED 0x10 /* Zero if keyboard locked */ 86 #define KBD_STAT_MOUSE_OBF 0x20 /* Mouse output buffer full */ 87 #define KBD_STAT_GTO 0x40 /* General receive/xmit timeout */ 88 #define KBD_STAT_PERR 0x80 /* Parity error */ 89 90 /* Controller Mode Register Bits */ 91 #define KBD_MODE_KBD_INT 0x01 /* Keyboard data generate IRQ1 */ 92 #define KBD_MODE_MOUSE_INT 0x02 /* Mouse data generate IRQ12 */ 93 #define KBD_MODE_SYS 0x04 /* The system flag (?) */ 94 #define KBD_MODE_NO_KEYLOCK 0x08 /* The keylock doesn't affect the keyboard if set */ 95 #define KBD_MODE_DISABLE_KBD 0x10 /* Disable keyboard interface */ 96 #define KBD_MODE_DISABLE_MOUSE 0x20 /* Disable mouse interface */ 97 #define KBD_MODE_KCC 0x40 /* Scan code conversion to PC format */ 98 #define KBD_MODE_RFU 0x80 99 100 /* Output Port Bits */ 101 #define KBD_OUT_RESET 0x01 /* 1=normal mode, 0=reset */ 102 #define KBD_OUT_A20 0x02 /* x86 only */ 103 #define KBD_OUT_OBF 0x10 /* Keyboard output buffer full */ 104 #define KBD_OUT_MOUSE_OBF 0x20 /* Mouse output buffer full */ 105 106 /* OSes typically write 0xdd/0xdf to turn the A20 line off and on. 107 * We make the default value of the outport include these four bits, 108 * so that the subsection is rarely necessary. 109 */ 110 #define KBD_OUT_ONES 0xcc 111 112 /* Mouse Commands */ 113 #define AUX_SET_SCALE11 0xE6 /* Set 1:1 scaling */ 114 #define AUX_SET_SCALE21 0xE7 /* Set 2:1 scaling */ 115 #define AUX_SET_RES 0xE8 /* Set resolution */ 116 #define AUX_GET_SCALE 0xE9 /* Get scaling factor */ 117 #define AUX_SET_STREAM 0xEA /* Set stream mode */ 118 #define AUX_POLL 0xEB /* Poll */ 119 #define AUX_RESET_WRAP 0xEC /* Reset wrap mode */ 120 #define AUX_SET_WRAP 0xEE /* Set wrap mode */ 121 #define AUX_SET_REMOTE 0xF0 /* Set remote mode */ 122 #define AUX_GET_TYPE 0xF2 /* Get type */ 123 #define AUX_SET_SAMPLE 0xF3 /* Set sample rate */ 124 #define AUX_ENABLE_DEV 0xF4 /* Enable aux device */ 125 #define AUX_DISABLE_DEV 0xF5 /* Disable aux device */ 126 #define AUX_SET_DEFAULT 0xF6 127 #define AUX_RESET 0xFF /* Reset aux device */ 128 #define AUX_ACK 0xFA /* Command byte ACK. */ 129 130 #define MOUSE_STATUS_REMOTE 0x40 131 #define MOUSE_STATUS_ENABLED 0x20 132 #define MOUSE_STATUS_SCALE21 0x10 133 134 #define KBD_PENDING_KBD 1 135 #define KBD_PENDING_AUX 2 136 137 typedef struct KBDState { 138 uint8_t write_cmd; /* if non zero, write data to port 60 is expected */ 139 uint8_t status; 140 uint8_t mode; 141 uint8_t outport; 142 bool outport_present; 143 /* Bitmask of devices with data available. */ 144 uint8_t pending; 145 void *kbd; 146 void *mouse; 147 148 qemu_irq irq_kbd; 149 qemu_irq irq_mouse; 150 qemu_irq a20_out; 151 hwaddr mask; 152 } KBDState; 153 154 /* update irq and KBD_STAT_[MOUSE_]OBF */ 155 /* XXX: not generating the irqs if KBD_MODE_DISABLE_KBD is set may be 156 incorrect, but it avoids having to simulate exact delays */ 157 static void kbd_update_irq(KBDState *s) 158 { 159 int irq_kbd_level, irq_mouse_level; 160 161 irq_kbd_level = 0; 162 irq_mouse_level = 0; 163 s->status &= ~(KBD_STAT_OBF | KBD_STAT_MOUSE_OBF); 164 s->outport &= ~(KBD_OUT_OBF | KBD_OUT_MOUSE_OBF); 165 if (s->pending) { 166 s->status |= KBD_STAT_OBF; 167 s->outport |= KBD_OUT_OBF; 168 /* kbd data takes priority over aux data. */ 169 if (s->pending == KBD_PENDING_AUX) { 170 s->status |= KBD_STAT_MOUSE_OBF; 171 s->outport |= KBD_OUT_MOUSE_OBF; 172 if (s->mode & KBD_MODE_MOUSE_INT) 173 irq_mouse_level = 1; 174 } else { 175 if ((s->mode & KBD_MODE_KBD_INT) && 176 !(s->mode & KBD_MODE_DISABLE_KBD)) 177 irq_kbd_level = 1; 178 } 179 } 180 qemu_set_irq(s->irq_kbd, irq_kbd_level); 181 qemu_set_irq(s->irq_mouse, irq_mouse_level); 182 } 183 184 static void kbd_update_kbd_irq(void *opaque, int level) 185 { 186 KBDState *s = (KBDState *)opaque; 187 188 if (level) 189 s->pending |= KBD_PENDING_KBD; 190 else 191 s->pending &= ~KBD_PENDING_KBD; 192 kbd_update_irq(s); 193 } 194 195 static void kbd_update_aux_irq(void *opaque, int level) 196 { 197 KBDState *s = (KBDState *)opaque; 198 199 if (level) 200 s->pending |= KBD_PENDING_AUX; 201 else 202 s->pending &= ~KBD_PENDING_AUX; 203 kbd_update_irq(s); 204 } 205 206 static uint64_t kbd_read_status(void *opaque, hwaddr addr, 207 unsigned size) 208 { 209 KBDState *s = opaque; 210 int val; 211 val = s->status; 212 DPRINTF("kbd: read status=0x%02x\n", val); 213 return val; 214 } 215 216 static void kbd_queue(KBDState *s, int b, int aux) 217 { 218 if (aux) 219 ps2_queue(s->mouse, b); 220 else 221 ps2_queue(s->kbd, b); 222 } 223 224 static void outport_write(KBDState *s, uint32_t val) 225 { 226 DPRINTF("kbd: write outport=0x%02x\n", val); 227 s->outport = val; 228 qemu_set_irq(s->a20_out, (val >> 1) & 1); 229 if (!(val & 1)) { 230 qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); 231 } 232 } 233 234 static void kbd_write_command(void *opaque, hwaddr addr, 235 uint64_t val, unsigned size) 236 { 237 KBDState *s = opaque; 238 239 DPRINTF("kbd: write cmd=0x%02" PRIx64 "\n", val); 240 241 /* Bits 3-0 of the output port P2 of the keyboard controller may be pulsed 242 * low for approximately 6 micro seconds. Bits 3-0 of the KBD_CCMD_PULSE 243 * command specify the output port bits to be pulsed. 244 * 0: Bit should be pulsed. 1: Bit should not be modified. 245 * The only useful version of this command is pulsing bit 0, 246 * which does a CPU reset. 247 */ 248 if((val & KBD_CCMD_PULSE_BITS_3_0) == KBD_CCMD_PULSE_BITS_3_0) { 249 if(!(val & 1)) 250 val = KBD_CCMD_RESET; 251 else 252 val = KBD_CCMD_NO_OP; 253 } 254 255 switch(val) { 256 case KBD_CCMD_READ_MODE: 257 kbd_queue(s, s->mode, 0); 258 break; 259 case KBD_CCMD_WRITE_MODE: 260 case KBD_CCMD_WRITE_OBUF: 261 case KBD_CCMD_WRITE_AUX_OBUF: 262 case KBD_CCMD_WRITE_MOUSE: 263 case KBD_CCMD_WRITE_OUTPORT: 264 s->write_cmd = val; 265 break; 266 case KBD_CCMD_MOUSE_DISABLE: 267 s->mode |= KBD_MODE_DISABLE_MOUSE; 268 break; 269 case KBD_CCMD_MOUSE_ENABLE: 270 s->mode &= ~KBD_MODE_DISABLE_MOUSE; 271 break; 272 case KBD_CCMD_TEST_MOUSE: 273 kbd_queue(s, 0x00, 0); 274 break; 275 case KBD_CCMD_SELF_TEST: 276 s->status |= KBD_STAT_SELFTEST; 277 kbd_queue(s, 0x55, 0); 278 break; 279 case KBD_CCMD_KBD_TEST: 280 kbd_queue(s, 0x00, 0); 281 break; 282 case KBD_CCMD_KBD_DISABLE: 283 s->mode |= KBD_MODE_DISABLE_KBD; 284 kbd_update_irq(s); 285 break; 286 case KBD_CCMD_KBD_ENABLE: 287 s->mode &= ~KBD_MODE_DISABLE_KBD; 288 kbd_update_irq(s); 289 break; 290 case KBD_CCMD_READ_INPORT: 291 kbd_queue(s, 0x80, 0); 292 break; 293 case KBD_CCMD_READ_OUTPORT: 294 kbd_queue(s, s->outport, 0); 295 break; 296 case KBD_CCMD_ENABLE_A20: 297 qemu_irq_raise(s->a20_out); 298 s->outport |= KBD_OUT_A20; 299 break; 300 case KBD_CCMD_DISABLE_A20: 301 qemu_irq_lower(s->a20_out); 302 s->outport &= ~KBD_OUT_A20; 303 break; 304 case KBD_CCMD_RESET: 305 qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); 306 break; 307 case KBD_CCMD_NO_OP: 308 /* ignore that */ 309 break; 310 default: 311 fprintf(stderr, "qemu: unsupported keyboard cmd=0x%02x\n", (int)val); 312 break; 313 } 314 } 315 316 static uint64_t kbd_read_data(void *opaque, hwaddr addr, 317 unsigned size) 318 { 319 KBDState *s = opaque; 320 uint32_t val; 321 322 if (s->pending == KBD_PENDING_AUX) 323 val = ps2_read_data(s->mouse); 324 else 325 val = ps2_read_data(s->kbd); 326 327 DPRINTF("kbd: read data=0x%02x\n", val); 328 return val; 329 } 330 331 static void kbd_write_data(void *opaque, hwaddr addr, 332 uint64_t val, unsigned size) 333 { 334 KBDState *s = opaque; 335 336 DPRINTF("kbd: write data=0x%02" PRIx64 "\n", val); 337 338 switch(s->write_cmd) { 339 case 0: 340 ps2_write_keyboard(s->kbd, val); 341 break; 342 case KBD_CCMD_WRITE_MODE: 343 s->mode = val; 344 ps2_keyboard_set_translation(s->kbd, (s->mode & KBD_MODE_KCC) != 0); 345 /* ??? */ 346 kbd_update_irq(s); 347 break; 348 case KBD_CCMD_WRITE_OBUF: 349 kbd_queue(s, val, 0); 350 break; 351 case KBD_CCMD_WRITE_AUX_OBUF: 352 kbd_queue(s, val, 1); 353 break; 354 case KBD_CCMD_WRITE_OUTPORT: 355 outport_write(s, val); 356 break; 357 case KBD_CCMD_WRITE_MOUSE: 358 ps2_write_mouse(s->mouse, val); 359 break; 360 default: 361 break; 362 } 363 s->write_cmd = 0; 364 } 365 366 static void kbd_reset(void *opaque) 367 { 368 KBDState *s = opaque; 369 370 s->mode = KBD_MODE_KBD_INT | KBD_MODE_MOUSE_INT; 371 s->status = KBD_STAT_CMD | KBD_STAT_UNLOCKED; 372 s->outport = KBD_OUT_RESET | KBD_OUT_A20 | KBD_OUT_ONES; 373 s->outport_present = false; 374 } 375 376 static uint8_t kbd_outport_default(KBDState *s) 377 { 378 return KBD_OUT_RESET | KBD_OUT_A20 | KBD_OUT_ONES 379 | (s->status & KBD_STAT_OBF ? KBD_OUT_OBF : 0) 380 | (s->status & KBD_STAT_MOUSE_OBF ? KBD_OUT_MOUSE_OBF : 0); 381 } 382 383 static int kbd_outport_post_load(void *opaque, int version_id) 384 { 385 KBDState *s = opaque; 386 s->outport_present = true; 387 return 0; 388 } 389 390 static bool kbd_outport_needed(void *opaque) 391 { 392 KBDState *s = opaque; 393 return s->outport != kbd_outport_default(s); 394 } 395 396 static const VMStateDescription vmstate_kbd_outport = { 397 .name = "pckbd_outport", 398 .version_id = 1, 399 .minimum_version_id = 1, 400 .post_load = kbd_outport_post_load, 401 .needed = kbd_outport_needed, 402 .fields = (VMStateField[]) { 403 VMSTATE_UINT8(outport, KBDState), 404 VMSTATE_END_OF_LIST() 405 } 406 }; 407 408 static int kbd_post_load(void *opaque, int version_id) 409 { 410 KBDState *s = opaque; 411 if (!s->outport_present) { 412 s->outport = kbd_outport_default(s); 413 } 414 s->outport_present = false; 415 return 0; 416 } 417 418 static const VMStateDescription vmstate_kbd = { 419 .name = "pckbd", 420 .version_id = 3, 421 .minimum_version_id = 3, 422 .post_load = kbd_post_load, 423 .fields = (VMStateField[]) { 424 VMSTATE_UINT8(write_cmd, KBDState), 425 VMSTATE_UINT8(status, KBDState), 426 VMSTATE_UINT8(mode, KBDState), 427 VMSTATE_UINT8(pending, KBDState), 428 VMSTATE_END_OF_LIST() 429 }, 430 .subsections = (const VMStateDescription*[]) { 431 &vmstate_kbd_outport, 432 NULL 433 } 434 }; 435 436 /* Memory mapped interface */ 437 static uint64_t kbd_mm_readfn(void *opaque, hwaddr addr, unsigned size) 438 { 439 KBDState *s = opaque; 440 441 if (addr & s->mask) 442 return kbd_read_status(s, 0, 1) & 0xff; 443 else 444 return kbd_read_data(s, 0, 1) & 0xff; 445 } 446 447 static void kbd_mm_writefn(void *opaque, hwaddr addr, 448 uint64_t value, unsigned size) 449 { 450 KBDState *s = opaque; 451 452 if (addr & s->mask) 453 kbd_write_command(s, 0, value & 0xff, 1); 454 else 455 kbd_write_data(s, 0, value & 0xff, 1); 456 } 457 458 459 static const MemoryRegionOps i8042_mmio_ops = { 460 .read = kbd_mm_readfn, 461 .write = kbd_mm_writefn, 462 .valid.min_access_size = 1, 463 .valid.max_access_size = 4, 464 .endianness = DEVICE_NATIVE_ENDIAN, 465 }; 466 467 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, 468 MemoryRegion *region, ram_addr_t size, 469 hwaddr mask) 470 { 471 KBDState *s = g_malloc0(sizeof(KBDState)); 472 473 s->irq_kbd = kbd_irq; 474 s->irq_mouse = mouse_irq; 475 s->mask = mask; 476 477 vmstate_register(NULL, 0, &vmstate_kbd, s); 478 479 memory_region_init_io(region, NULL, &i8042_mmio_ops, s, "i8042", size); 480 481 s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s); 482 s->mouse = ps2_mouse_init(kbd_update_aux_irq, s); 483 qemu_register_reset(kbd_reset, s); 484 } 485 486 #define I8042(obj) OBJECT_CHECK(ISAKBDState, (obj), TYPE_I8042) 487 488 typedef struct ISAKBDState { 489 ISADevice parent_obj; 490 491 KBDState kbd; 492 MemoryRegion io[2]; 493 } ISAKBDState; 494 495 void i8042_isa_mouse_fake_event(void *opaque) 496 { 497 ISADevice *dev = opaque; 498 ISAKBDState *isa = I8042(dev); 499 KBDState *s = &isa->kbd; 500 501 ps2_mouse_fake_event(s->mouse); 502 } 503 504 void i8042_setup_a20_line(ISADevice *dev, qemu_irq a20_out) 505 { 506 qdev_connect_gpio_out_named(DEVICE(dev), I8042_A20_LINE, 0, a20_out); 507 } 508 509 static const VMStateDescription vmstate_kbd_isa = { 510 .name = "pckbd", 511 .version_id = 3, 512 .minimum_version_id = 3, 513 .fields = (VMStateField[]) { 514 VMSTATE_STRUCT(kbd, ISAKBDState, 0, vmstate_kbd, KBDState), 515 VMSTATE_END_OF_LIST() 516 } 517 }; 518 519 static const MemoryRegionOps i8042_data_ops = { 520 .read = kbd_read_data, 521 .write = kbd_write_data, 522 .impl = { 523 .min_access_size = 1, 524 .max_access_size = 1, 525 }, 526 .endianness = DEVICE_LITTLE_ENDIAN, 527 }; 528 529 static const MemoryRegionOps i8042_cmd_ops = { 530 .read = kbd_read_status, 531 .write = kbd_write_command, 532 .impl = { 533 .min_access_size = 1, 534 .max_access_size = 1, 535 }, 536 .endianness = DEVICE_LITTLE_ENDIAN, 537 }; 538 539 static void i8042_initfn(Object *obj) 540 { 541 ISAKBDState *isa_s = I8042(obj); 542 KBDState *s = &isa_s->kbd; 543 544 memory_region_init_io(isa_s->io + 0, obj, &i8042_data_ops, s, 545 "i8042-data", 1); 546 memory_region_init_io(isa_s->io + 1, obj, &i8042_cmd_ops, s, 547 "i8042-cmd", 1); 548 549 qdev_init_gpio_out_named(DEVICE(obj), &s->a20_out, I8042_A20_LINE, 1); 550 } 551 552 static void i8042_realizefn(DeviceState *dev, Error **errp) 553 { 554 ISADevice *isadev = ISA_DEVICE(dev); 555 ISAKBDState *isa_s = I8042(dev); 556 KBDState *s = &isa_s->kbd; 557 558 isa_init_irq(isadev, &s->irq_kbd, 1); 559 isa_init_irq(isadev, &s->irq_mouse, 12); 560 561 isa_register_ioport(isadev, isa_s->io + 0, 0x60); 562 isa_register_ioport(isadev, isa_s->io + 1, 0x64); 563 564 s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s); 565 s->mouse = ps2_mouse_init(kbd_update_aux_irq, s); 566 qemu_register_reset(kbd_reset, s); 567 } 568 569 static void i8042_class_initfn(ObjectClass *klass, void *data) 570 { 571 DeviceClass *dc = DEVICE_CLASS(klass); 572 573 dc->realize = i8042_realizefn; 574 dc->vmsd = &vmstate_kbd_isa; 575 } 576 577 static const TypeInfo i8042_info = { 578 .name = TYPE_I8042, 579 .parent = TYPE_ISA_DEVICE, 580 .instance_size = sizeof(ISAKBDState), 581 .instance_init = i8042_initfn, 582 .class_init = i8042_class_initfn, 583 }; 584 585 static void i8042_register_types(void) 586 { 587 type_register_static(&i8042_info); 588 } 589 590 type_init(i8042_register_types) 591