1 /* 2 * National Semiconductor LM8322/8323 GPIO keyboard & PWM chips. 3 * 4 * Copyright (C) 2008 Nokia Corporation 5 * Written by Andrzej Zaborowski <andrew@openedhand.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License as 9 * published by the Free Software Foundation; either version 2 or 10 * (at your option) version 3 of the License. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License along 18 * with this program; if not, see <http://www.gnu.org/licenses/>. 19 */ 20 21 #include "qemu/osdep.h" 22 #include "hw/i2c/i2c.h" 23 #include "hw/irq.h" 24 #include "migration/vmstate.h" 25 #include "qemu/module.h" 26 #include "qemu/timer.h" 27 #include "ui/console.h" 28 29 #define TYPE_LM8323 "lm8323" 30 #define LM8323(obj) OBJECT_CHECK(LM823KbdState, (obj), TYPE_LM8323) 31 32 typedef struct { 33 I2CSlave parent_obj; 34 35 uint8_t i2c_dir; 36 uint8_t i2c_cycle; 37 uint8_t reg; 38 39 qemu_irq nirq; 40 uint16_t model; 41 42 struct { 43 qemu_irq out[2]; 44 int in[2][2]; 45 } mux; 46 47 uint8_t config; 48 uint8_t status; 49 uint8_t acttime; 50 uint8_t error; 51 uint8_t clock; 52 53 struct { 54 uint16_t pull; 55 uint16_t mask; 56 uint16_t dir; 57 uint16_t level; 58 qemu_irq out[16]; 59 } gpio; 60 61 struct { 62 uint8_t dbnctime; 63 uint8_t size; 64 uint8_t start; 65 uint8_t len; 66 uint8_t fifo[16]; 67 } kbd; 68 69 struct { 70 uint16_t file[256]; 71 uint8_t faddr; 72 uint8_t addr[3]; 73 QEMUTimer *tm[3]; 74 } pwm; 75 } LM823KbdState; 76 77 #define INT_KEYPAD (1 << 0) 78 #define INT_ERROR (1 << 3) 79 #define INT_NOINIT (1 << 4) 80 #define INT_PWMEND(n) (1 << (5 + n)) 81 82 #define ERR_BADPAR (1 << 0) 83 #define ERR_CMDUNK (1 << 1) 84 #define ERR_KEYOVR (1 << 2) 85 #define ERR_FIFOOVR (1 << 6) 86 87 static void lm_kbd_irq_update(LM823KbdState *s) 88 { 89 qemu_set_irq(s->nirq, !s->status); 90 } 91 92 static void lm_kbd_gpio_update(LM823KbdState *s) 93 { 94 } 95 96 static void lm_kbd_reset(DeviceState *dev) 97 { 98 LM823KbdState *s = LM8323(dev); 99 100 s->config = 0x80; 101 s->status = INT_NOINIT; 102 s->acttime = 125; 103 s->kbd.dbnctime = 3; 104 s->kbd.size = 0x33; 105 s->clock = 0x08; 106 107 lm_kbd_irq_update(s); 108 lm_kbd_gpio_update(s); 109 } 110 111 static void lm_kbd_error(LM823KbdState *s, int err) 112 { 113 s->error |= err; 114 s->status |= INT_ERROR; 115 lm_kbd_irq_update(s); 116 } 117 118 static void lm_kbd_pwm_tick(LM823KbdState *s, int line) 119 { 120 } 121 122 static void lm_kbd_pwm_start(LM823KbdState *s, int line) 123 { 124 lm_kbd_pwm_tick(s, line); 125 } 126 127 static void lm_kbd_pwm0_tick(void *opaque) 128 { 129 lm_kbd_pwm_tick(opaque, 0); 130 } 131 static void lm_kbd_pwm1_tick(void *opaque) 132 { 133 lm_kbd_pwm_tick(opaque, 1); 134 } 135 static void lm_kbd_pwm2_tick(void *opaque) 136 { 137 lm_kbd_pwm_tick(opaque, 2); 138 } 139 140 enum { 141 LM832x_CMD_READ_ID = 0x80, /* Read chip ID. */ 142 LM832x_CMD_WRITE_CFG = 0x81, /* Set configuration item. */ 143 LM832x_CMD_READ_INT = 0x82, /* Get interrupt status. */ 144 LM832x_CMD_RESET = 0x83, /* Reset, same as external one */ 145 LM823x_CMD_WRITE_PULL_DOWN = 0x84, /* Select GPIO pull-up/down. */ 146 LM832x_CMD_WRITE_PORT_SEL = 0x85, /* Select GPIO in/out. */ 147 LM832x_CMD_WRITE_PORT_STATE = 0x86, /* Set GPIO pull-up/down. */ 148 LM832x_CMD_READ_PORT_SEL = 0x87, /* Get GPIO in/out. */ 149 LM832x_CMD_READ_PORT_STATE = 0x88, /* Get GPIO pull-up/down. */ 150 LM832x_CMD_READ_FIFO = 0x89, /* Read byte from FIFO. */ 151 LM832x_CMD_RPT_READ_FIFO = 0x8a, /* Read FIFO (no increment). */ 152 LM832x_CMD_SET_ACTIVE = 0x8b, /* Set active time. */ 153 LM832x_CMD_READ_ERROR = 0x8c, /* Get error status. */ 154 LM832x_CMD_READ_ROTATOR = 0x8e, /* Read rotator status. */ 155 LM832x_CMD_SET_DEBOUNCE = 0x8f, /* Set debouncing time. */ 156 LM832x_CMD_SET_KEY_SIZE = 0x90, /* Set keypad size. */ 157 LM832x_CMD_READ_KEY_SIZE = 0x91, /* Get keypad size. */ 158 LM832x_CMD_READ_CFG = 0x92, /* Get configuration item. */ 159 LM832x_CMD_WRITE_CLOCK = 0x93, /* Set clock config. */ 160 LM832x_CMD_READ_CLOCK = 0x94, /* Get clock config. */ 161 LM832x_CMD_PWM_WRITE = 0x95, /* Write PWM script. */ 162 LM832x_CMD_PWM_START = 0x96, /* Start PWM engine. */ 163 LM832x_CMD_PWM_STOP = 0x97, /* Stop PWM engine. */ 164 LM832x_GENERAL_ERROR = 0xff, /* There was one error. 165 Previously was represented by -1 166 This is not a command */ 167 }; 168 169 #define LM832x_MAX_KPX 8 170 #define LM832x_MAX_KPY 12 171 172 static uint8_t lm_kbd_read(LM823KbdState *s, int reg, int byte) 173 { 174 int ret; 175 176 switch (reg) { 177 case LM832x_CMD_READ_ID: 178 ret = 0x0400; 179 break; 180 181 case LM832x_CMD_READ_INT: 182 ret = s->status; 183 if (!(s->status & INT_NOINIT)) { 184 s->status = 0; 185 lm_kbd_irq_update(s); 186 } 187 break; 188 189 case LM832x_CMD_READ_PORT_SEL: 190 ret = s->gpio.dir; 191 break; 192 case LM832x_CMD_READ_PORT_STATE: 193 ret = s->gpio.mask; 194 break; 195 196 case LM832x_CMD_READ_FIFO: 197 if (s->kbd.len <= 1) 198 return 0x00; 199 200 /* Example response from the two commands after a INT_KEYPAD 201 * interrupt caused by the key 0x3c being pressed: 202 * RPT_READ_FIFO: 55 bc 00 4e ff 0a 50 08 00 29 d9 08 01 c9 01 203 * READ_FIFO: bc 00 00 4e ff 0a 50 08 00 29 d9 08 01 c9 01 204 * RPT_READ_FIFO: bc 00 00 4e ff 0a 50 08 00 29 d9 08 01 c9 01 205 * 206 * 55 is the code of the key release event serviced in the previous 207 * interrupt handling. 208 * 209 * TODO: find out whether the FIFO is advanced a single character 210 * before reading every byte or the whole size of the FIFO at the 211 * last LM832x_CMD_READ_FIFO. This affects LM832x_CMD_RPT_READ_FIFO 212 * output in cases where there are more than one event in the FIFO. 213 * Assume 0xbc and 0x3c events are in the FIFO: 214 * RPT_READ_FIFO: 55 bc 3c 00 4e ff 0a 50 08 00 29 d9 08 01 c9 215 * READ_FIFO: bc 3c 00 00 4e ff 0a 50 08 00 29 d9 08 01 c9 216 * Does RPT_READ_FIFO now return 0xbc and 0x3c or only 0x3c? 217 */ 218 s->kbd.start ++; 219 s->kbd.start &= sizeof(s->kbd.fifo) - 1; 220 s->kbd.len --; 221 222 return s->kbd.fifo[s->kbd.start]; 223 case LM832x_CMD_RPT_READ_FIFO: 224 if (byte >= s->kbd.len) 225 return 0x00; 226 227 return s->kbd.fifo[(s->kbd.start + byte) & (sizeof(s->kbd.fifo) - 1)]; 228 229 case LM832x_CMD_READ_ERROR: 230 return s->error; 231 232 case LM832x_CMD_READ_ROTATOR: 233 return 0; 234 235 case LM832x_CMD_READ_KEY_SIZE: 236 return s->kbd.size; 237 238 case LM832x_CMD_READ_CFG: 239 return s->config & 0xf; 240 241 case LM832x_CMD_READ_CLOCK: 242 return (s->clock & 0xfc) | 2; 243 244 default: 245 lm_kbd_error(s, ERR_CMDUNK); 246 fprintf(stderr, "%s: unknown command %02x\n", __func__, reg); 247 return 0x00; 248 } 249 250 return ret >> (byte << 3); 251 } 252 253 static void lm_kbd_write(LM823KbdState *s, int reg, int byte, uint8_t value) 254 { 255 switch (reg) { 256 case LM832x_CMD_WRITE_CFG: 257 s->config = value; 258 /* This must be done whenever s->mux.in is updated (never). */ 259 if ((s->config >> 1) & 1) /* MUX1EN */ 260 qemu_set_irq(s->mux.out[0], s->mux.in[0][(s->config >> 0) & 1]); 261 if ((s->config >> 3) & 1) /* MUX2EN */ 262 qemu_set_irq(s->mux.out[0], s->mux.in[0][(s->config >> 2) & 1]); 263 /* TODO: check that this is issued only following the chip reset 264 * and not in the middle of operation and that it is followed by 265 * the GPIO ports re-resablishing through WRITE_PORT_SEL and 266 * WRITE_PORT_STATE (using a timer perhaps) and otherwise output 267 * warnings. */ 268 s->status = 0; 269 lm_kbd_irq_update(s); 270 s->kbd.len = 0; 271 s->kbd.start = 0; 272 s->reg = LM832x_GENERAL_ERROR; 273 break; 274 275 case LM832x_CMD_RESET: 276 if (value == 0xaa) 277 lm_kbd_reset(DEVICE(s)); 278 else 279 lm_kbd_error(s, ERR_BADPAR); 280 s->reg = LM832x_GENERAL_ERROR; 281 break; 282 283 case LM823x_CMD_WRITE_PULL_DOWN: 284 if (!byte) 285 s->gpio.pull = value; 286 else { 287 s->gpio.pull |= value << 8; 288 lm_kbd_gpio_update(s); 289 s->reg = LM832x_GENERAL_ERROR; 290 } 291 break; 292 case LM832x_CMD_WRITE_PORT_SEL: 293 if (!byte) 294 s->gpio.dir = value; 295 else { 296 s->gpio.dir |= value << 8; 297 lm_kbd_gpio_update(s); 298 s->reg = LM832x_GENERAL_ERROR; 299 } 300 break; 301 case LM832x_CMD_WRITE_PORT_STATE: 302 if (!byte) 303 s->gpio.mask = value; 304 else { 305 s->gpio.mask |= value << 8; 306 lm_kbd_gpio_update(s); 307 s->reg = LM832x_GENERAL_ERROR; 308 } 309 break; 310 311 case LM832x_CMD_SET_ACTIVE: 312 s->acttime = value; 313 s->reg = LM832x_GENERAL_ERROR; 314 break; 315 316 case LM832x_CMD_SET_DEBOUNCE: 317 s->kbd.dbnctime = value; 318 s->reg = LM832x_GENERAL_ERROR; 319 if (!value) 320 lm_kbd_error(s, ERR_BADPAR); 321 break; 322 323 case LM832x_CMD_SET_KEY_SIZE: 324 s->kbd.size = value; 325 s->reg = LM832x_GENERAL_ERROR; 326 if ( 327 (value & 0xf) < 3 || (value & 0xf) > LM832x_MAX_KPY || 328 (value >> 4) < 3 || (value >> 4) > LM832x_MAX_KPX) 329 lm_kbd_error(s, ERR_BADPAR); 330 break; 331 332 case LM832x_CMD_WRITE_CLOCK: 333 s->clock = value; 334 s->reg = LM832x_GENERAL_ERROR; 335 if ((value & 3) && (value & 3) != 3) { 336 lm_kbd_error(s, ERR_BADPAR); 337 fprintf(stderr, "%s: invalid clock setting in RCPWM\n", 338 __func__); 339 } 340 /* TODO: Validate that the command is only issued once */ 341 break; 342 343 case LM832x_CMD_PWM_WRITE: 344 if (byte == 0) { 345 if (!(value & 3) || (value >> 2) > 59) { 346 lm_kbd_error(s, ERR_BADPAR); 347 s->reg = LM832x_GENERAL_ERROR; 348 break; 349 } 350 351 s->pwm.faddr = value; 352 s->pwm.file[s->pwm.faddr] = 0; 353 } else if (byte == 1) { 354 s->pwm.file[s->pwm.faddr] |= value << 8; 355 } else if (byte == 2) { 356 s->pwm.file[s->pwm.faddr] |= value << 0; 357 s->reg = LM832x_GENERAL_ERROR; 358 } 359 break; 360 case LM832x_CMD_PWM_START: 361 s->reg = LM832x_GENERAL_ERROR; 362 if (!(value & 3) || (value >> 2) > 59) { 363 lm_kbd_error(s, ERR_BADPAR); 364 break; 365 } 366 367 s->pwm.addr[(value & 3) - 1] = value >> 2; 368 lm_kbd_pwm_start(s, (value & 3) - 1); 369 break; 370 case LM832x_CMD_PWM_STOP: 371 s->reg = LM832x_GENERAL_ERROR; 372 if (!(value & 3)) { 373 lm_kbd_error(s, ERR_BADPAR); 374 break; 375 } 376 377 timer_del(s->pwm.tm[(value & 3) - 1]); 378 break; 379 380 case LM832x_GENERAL_ERROR: 381 lm_kbd_error(s, ERR_BADPAR); 382 break; 383 default: 384 lm_kbd_error(s, ERR_CMDUNK); 385 fprintf(stderr, "%s: unknown command %02x\n", __func__, reg); 386 break; 387 } 388 } 389 390 static int lm_i2c_event(I2CSlave *i2c, enum i2c_event event) 391 { 392 LM823KbdState *s = LM8323(i2c); 393 394 switch (event) { 395 case I2C_START_RECV: 396 case I2C_START_SEND: 397 s->i2c_cycle = 0; 398 s->i2c_dir = (event == I2C_START_SEND); 399 break; 400 401 default: 402 break; 403 } 404 405 return 0; 406 } 407 408 static uint8_t lm_i2c_rx(I2CSlave *i2c) 409 { 410 LM823KbdState *s = LM8323(i2c); 411 412 return lm_kbd_read(s, s->reg, s->i2c_cycle ++); 413 } 414 415 static int lm_i2c_tx(I2CSlave *i2c, uint8_t data) 416 { 417 LM823KbdState *s = LM8323(i2c); 418 419 if (!s->i2c_cycle) 420 s->reg = data; 421 else 422 lm_kbd_write(s, s->reg, s->i2c_cycle - 1, data); 423 s->i2c_cycle ++; 424 425 return 0; 426 } 427 428 static int lm_kbd_post_load(void *opaque, int version_id) 429 { 430 LM823KbdState *s = opaque; 431 432 lm_kbd_irq_update(s); 433 lm_kbd_gpio_update(s); 434 435 return 0; 436 } 437 438 static const VMStateDescription vmstate_lm_kbd = { 439 .name = "LM8323", 440 .version_id = 0, 441 .minimum_version_id = 0, 442 .post_load = lm_kbd_post_load, 443 .fields = (VMStateField[]) { 444 VMSTATE_I2C_SLAVE(parent_obj, LM823KbdState), 445 VMSTATE_UINT8(i2c_dir, LM823KbdState), 446 VMSTATE_UINT8(i2c_cycle, LM823KbdState), 447 VMSTATE_UINT8(reg, LM823KbdState), 448 VMSTATE_UINT8(config, LM823KbdState), 449 VMSTATE_UINT8(status, LM823KbdState), 450 VMSTATE_UINT8(acttime, LM823KbdState), 451 VMSTATE_UINT8(error, LM823KbdState), 452 VMSTATE_UINT8(clock, LM823KbdState), 453 VMSTATE_UINT16(gpio.pull, LM823KbdState), 454 VMSTATE_UINT16(gpio.mask, LM823KbdState), 455 VMSTATE_UINT16(gpio.dir, LM823KbdState), 456 VMSTATE_UINT16(gpio.level, LM823KbdState), 457 VMSTATE_UINT8(kbd.dbnctime, LM823KbdState), 458 VMSTATE_UINT8(kbd.size, LM823KbdState), 459 VMSTATE_UINT8(kbd.start, LM823KbdState), 460 VMSTATE_UINT8(kbd.len, LM823KbdState), 461 VMSTATE_BUFFER(kbd.fifo, LM823KbdState), 462 VMSTATE_UINT16_ARRAY(pwm.file, LM823KbdState, 256), 463 VMSTATE_UINT8(pwm.faddr, LM823KbdState), 464 VMSTATE_BUFFER(pwm.addr, LM823KbdState), 465 VMSTATE_TIMER_PTR_ARRAY(pwm.tm, LM823KbdState, 3), 466 VMSTATE_END_OF_LIST() 467 } 468 }; 469 470 471 static void lm8323_realize(DeviceState *dev, Error **errp) 472 { 473 LM823KbdState *s = LM8323(dev); 474 475 s->model = 0x8323; 476 s->pwm.tm[0] = timer_new_ns(QEMU_CLOCK_VIRTUAL, lm_kbd_pwm0_tick, s); 477 s->pwm.tm[1] = timer_new_ns(QEMU_CLOCK_VIRTUAL, lm_kbd_pwm1_tick, s); 478 s->pwm.tm[2] = timer_new_ns(QEMU_CLOCK_VIRTUAL, lm_kbd_pwm2_tick, s); 479 qdev_init_gpio_out(dev, &s->nirq, 1); 480 } 481 482 void lm832x_key_event(DeviceState *dev, int key, int state) 483 { 484 LM823KbdState *s = LM8323(dev); 485 486 if ((s->status & INT_ERROR) && (s->error & ERR_FIFOOVR)) 487 return; 488 489 if (s->kbd.len >= sizeof(s->kbd.fifo)) { 490 lm_kbd_error(s, ERR_FIFOOVR); 491 return; 492 } 493 494 s->kbd.fifo[(s->kbd.start + s->kbd.len ++) & (sizeof(s->kbd.fifo) - 1)] = 495 key | (state << 7); 496 497 /* We never set ERR_KEYOVR because we support multiple keys fine. */ 498 s->status |= INT_KEYPAD; 499 lm_kbd_irq_update(s); 500 } 501 502 static void lm8323_class_init(ObjectClass *klass, void *data) 503 { 504 DeviceClass *dc = DEVICE_CLASS(klass); 505 I2CSlaveClass *k = I2C_SLAVE_CLASS(klass); 506 507 dc->reset = lm_kbd_reset; 508 dc->realize = lm8323_realize; 509 k->event = lm_i2c_event; 510 k->recv = lm_i2c_rx; 511 k->send = lm_i2c_tx; 512 dc->vmsd = &vmstate_lm_kbd; 513 } 514 515 static const TypeInfo lm8323_info = { 516 .name = TYPE_LM8323, 517 .parent = TYPE_I2C_SLAVE, 518 .instance_size = sizeof(LM823KbdState), 519 .class_init = lm8323_class_init, 520 }; 521 522 static void lm832x_register_types(void) 523 { 524 type_register_static(&lm8323_info); 525 } 526 527 type_init(lm832x_register_types) 528