1 /* 2 * National Semiconductor LM8322/8323 GPIO keyboard & PWM chips. 3 * 4 * Copyright (C) 2008 Nokia Corporation 5 * Written by Andrzej Zaborowski <andrew@openedhand.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License as 9 * published by the Free Software Foundation; either version 2 or 10 * (at your option) version 3 of the License. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License along 18 * with this program; if not, see <http://www.gnu.org/licenses/>. 19 */ 20 21 #include "qemu/osdep.h" 22 #include "hw/hw.h" 23 #include "hw/i2c/i2c.h" 24 #include "qemu/module.h" 25 #include "qemu/timer.h" 26 #include "ui/console.h" 27 28 #define TYPE_LM8323 "lm8323" 29 #define LM8323(obj) OBJECT_CHECK(LM823KbdState, (obj), TYPE_LM8323) 30 31 typedef struct { 32 I2CSlave parent_obj; 33 34 uint8_t i2c_dir; 35 uint8_t i2c_cycle; 36 uint8_t reg; 37 38 qemu_irq nirq; 39 uint16_t model; 40 41 struct { 42 qemu_irq out[2]; 43 int in[2][2]; 44 } mux; 45 46 uint8_t config; 47 uint8_t status; 48 uint8_t acttime; 49 uint8_t error; 50 uint8_t clock; 51 52 struct { 53 uint16_t pull; 54 uint16_t mask; 55 uint16_t dir; 56 uint16_t level; 57 qemu_irq out[16]; 58 } gpio; 59 60 struct { 61 uint8_t dbnctime; 62 uint8_t size; 63 uint8_t start; 64 uint8_t len; 65 uint8_t fifo[16]; 66 } kbd; 67 68 struct { 69 uint16_t file[256]; 70 uint8_t faddr; 71 uint8_t addr[3]; 72 QEMUTimer *tm[3]; 73 } pwm; 74 } LM823KbdState; 75 76 #define INT_KEYPAD (1 << 0) 77 #define INT_ERROR (1 << 3) 78 #define INT_NOINIT (1 << 4) 79 #define INT_PWMEND(n) (1 << (5 + n)) 80 81 #define ERR_BADPAR (1 << 0) 82 #define ERR_CMDUNK (1 << 1) 83 #define ERR_KEYOVR (1 << 2) 84 #define ERR_FIFOOVR (1 << 6) 85 86 static void lm_kbd_irq_update(LM823KbdState *s) 87 { 88 qemu_set_irq(s->nirq, !s->status); 89 } 90 91 static void lm_kbd_gpio_update(LM823KbdState *s) 92 { 93 } 94 95 static void lm_kbd_reset(LM823KbdState *s) 96 { 97 s->config = 0x80; 98 s->status = INT_NOINIT; 99 s->acttime = 125; 100 s->kbd.dbnctime = 3; 101 s->kbd.size = 0x33; 102 s->clock = 0x08; 103 104 lm_kbd_irq_update(s); 105 lm_kbd_gpio_update(s); 106 } 107 108 static void lm_kbd_error(LM823KbdState *s, int err) 109 { 110 s->error |= err; 111 s->status |= INT_ERROR; 112 lm_kbd_irq_update(s); 113 } 114 115 static void lm_kbd_pwm_tick(LM823KbdState *s, int line) 116 { 117 } 118 119 static void lm_kbd_pwm_start(LM823KbdState *s, int line) 120 { 121 lm_kbd_pwm_tick(s, line); 122 } 123 124 static void lm_kbd_pwm0_tick(void *opaque) 125 { 126 lm_kbd_pwm_tick(opaque, 0); 127 } 128 static void lm_kbd_pwm1_tick(void *opaque) 129 { 130 lm_kbd_pwm_tick(opaque, 1); 131 } 132 static void lm_kbd_pwm2_tick(void *opaque) 133 { 134 lm_kbd_pwm_tick(opaque, 2); 135 } 136 137 enum { 138 LM832x_CMD_READ_ID = 0x80, /* Read chip ID. */ 139 LM832x_CMD_WRITE_CFG = 0x81, /* Set configuration item. */ 140 LM832x_CMD_READ_INT = 0x82, /* Get interrupt status. */ 141 LM832x_CMD_RESET = 0x83, /* Reset, same as external one */ 142 LM823x_CMD_WRITE_PULL_DOWN = 0x84, /* Select GPIO pull-up/down. */ 143 LM832x_CMD_WRITE_PORT_SEL = 0x85, /* Select GPIO in/out. */ 144 LM832x_CMD_WRITE_PORT_STATE = 0x86, /* Set GPIO pull-up/down. */ 145 LM832x_CMD_READ_PORT_SEL = 0x87, /* Get GPIO in/out. */ 146 LM832x_CMD_READ_PORT_STATE = 0x88, /* Get GPIO pull-up/down. */ 147 LM832x_CMD_READ_FIFO = 0x89, /* Read byte from FIFO. */ 148 LM832x_CMD_RPT_READ_FIFO = 0x8a, /* Read FIFO (no increment). */ 149 LM832x_CMD_SET_ACTIVE = 0x8b, /* Set active time. */ 150 LM832x_CMD_READ_ERROR = 0x8c, /* Get error status. */ 151 LM832x_CMD_READ_ROTATOR = 0x8e, /* Read rotator status. */ 152 LM832x_CMD_SET_DEBOUNCE = 0x8f, /* Set debouncing time. */ 153 LM832x_CMD_SET_KEY_SIZE = 0x90, /* Set keypad size. */ 154 LM832x_CMD_READ_KEY_SIZE = 0x91, /* Get keypad size. */ 155 LM832x_CMD_READ_CFG = 0x92, /* Get configuration item. */ 156 LM832x_CMD_WRITE_CLOCK = 0x93, /* Set clock config. */ 157 LM832x_CMD_READ_CLOCK = 0x94, /* Get clock config. */ 158 LM832x_CMD_PWM_WRITE = 0x95, /* Write PWM script. */ 159 LM832x_CMD_PWM_START = 0x96, /* Start PWM engine. */ 160 LM832x_CMD_PWM_STOP = 0x97, /* Stop PWM engine. */ 161 LM832x_GENERAL_ERROR = 0xff, /* There was one error. 162 Previously was represented by -1 163 This is not a command */ 164 }; 165 166 #define LM832x_MAX_KPX 8 167 #define LM832x_MAX_KPY 12 168 169 static uint8_t lm_kbd_read(LM823KbdState *s, int reg, int byte) 170 { 171 int ret; 172 173 switch (reg) { 174 case LM832x_CMD_READ_ID: 175 ret = 0x0400; 176 break; 177 178 case LM832x_CMD_READ_INT: 179 ret = s->status; 180 if (!(s->status & INT_NOINIT)) { 181 s->status = 0; 182 lm_kbd_irq_update(s); 183 } 184 break; 185 186 case LM832x_CMD_READ_PORT_SEL: 187 ret = s->gpio.dir; 188 break; 189 case LM832x_CMD_READ_PORT_STATE: 190 ret = s->gpio.mask; 191 break; 192 193 case LM832x_CMD_READ_FIFO: 194 if (s->kbd.len <= 1) 195 return 0x00; 196 197 /* Example response from the two commands after a INT_KEYPAD 198 * interrupt caused by the key 0x3c being pressed: 199 * RPT_READ_FIFO: 55 bc 00 4e ff 0a 50 08 00 29 d9 08 01 c9 01 200 * READ_FIFO: bc 00 00 4e ff 0a 50 08 00 29 d9 08 01 c9 01 201 * RPT_READ_FIFO: bc 00 00 4e ff 0a 50 08 00 29 d9 08 01 c9 01 202 * 203 * 55 is the code of the key release event serviced in the previous 204 * interrupt handling. 205 * 206 * TODO: find out whether the FIFO is advanced a single character 207 * before reading every byte or the whole size of the FIFO at the 208 * last LM832x_CMD_READ_FIFO. This affects LM832x_CMD_RPT_READ_FIFO 209 * output in cases where there are more than one event in the FIFO. 210 * Assume 0xbc and 0x3c events are in the FIFO: 211 * RPT_READ_FIFO: 55 bc 3c 00 4e ff 0a 50 08 00 29 d9 08 01 c9 212 * READ_FIFO: bc 3c 00 00 4e ff 0a 50 08 00 29 d9 08 01 c9 213 * Does RPT_READ_FIFO now return 0xbc and 0x3c or only 0x3c? 214 */ 215 s->kbd.start ++; 216 s->kbd.start &= sizeof(s->kbd.fifo) - 1; 217 s->kbd.len --; 218 219 return s->kbd.fifo[s->kbd.start]; 220 case LM832x_CMD_RPT_READ_FIFO: 221 if (byte >= s->kbd.len) 222 return 0x00; 223 224 return s->kbd.fifo[(s->kbd.start + byte) & (sizeof(s->kbd.fifo) - 1)]; 225 226 case LM832x_CMD_READ_ERROR: 227 return s->error; 228 229 case LM832x_CMD_READ_ROTATOR: 230 return 0; 231 232 case LM832x_CMD_READ_KEY_SIZE: 233 return s->kbd.size; 234 235 case LM832x_CMD_READ_CFG: 236 return s->config & 0xf; 237 238 case LM832x_CMD_READ_CLOCK: 239 return (s->clock & 0xfc) | 2; 240 241 default: 242 lm_kbd_error(s, ERR_CMDUNK); 243 fprintf(stderr, "%s: unknown command %02x\n", __func__, reg); 244 return 0x00; 245 } 246 247 return ret >> (byte << 3); 248 } 249 250 static void lm_kbd_write(LM823KbdState *s, int reg, int byte, uint8_t value) 251 { 252 switch (reg) { 253 case LM832x_CMD_WRITE_CFG: 254 s->config = value; 255 /* This must be done whenever s->mux.in is updated (never). */ 256 if ((s->config >> 1) & 1) /* MUX1EN */ 257 qemu_set_irq(s->mux.out[0], s->mux.in[0][(s->config >> 0) & 1]); 258 if ((s->config >> 3) & 1) /* MUX2EN */ 259 qemu_set_irq(s->mux.out[0], s->mux.in[0][(s->config >> 2) & 1]); 260 /* TODO: check that this is issued only following the chip reset 261 * and not in the middle of operation and that it is followed by 262 * the GPIO ports re-resablishing through WRITE_PORT_SEL and 263 * WRITE_PORT_STATE (using a timer perhaps) and otherwise output 264 * warnings. */ 265 s->status = 0; 266 lm_kbd_irq_update(s); 267 s->kbd.len = 0; 268 s->kbd.start = 0; 269 s->reg = LM832x_GENERAL_ERROR; 270 break; 271 272 case LM832x_CMD_RESET: 273 if (value == 0xaa) 274 lm_kbd_reset(s); 275 else 276 lm_kbd_error(s, ERR_BADPAR); 277 s->reg = LM832x_GENERAL_ERROR; 278 break; 279 280 case LM823x_CMD_WRITE_PULL_DOWN: 281 if (!byte) 282 s->gpio.pull = value; 283 else { 284 s->gpio.pull |= value << 8; 285 lm_kbd_gpio_update(s); 286 s->reg = LM832x_GENERAL_ERROR; 287 } 288 break; 289 case LM832x_CMD_WRITE_PORT_SEL: 290 if (!byte) 291 s->gpio.dir = value; 292 else { 293 s->gpio.dir |= value << 8; 294 lm_kbd_gpio_update(s); 295 s->reg = LM832x_GENERAL_ERROR; 296 } 297 break; 298 case LM832x_CMD_WRITE_PORT_STATE: 299 if (!byte) 300 s->gpio.mask = value; 301 else { 302 s->gpio.mask |= value << 8; 303 lm_kbd_gpio_update(s); 304 s->reg = LM832x_GENERAL_ERROR; 305 } 306 break; 307 308 case LM832x_CMD_SET_ACTIVE: 309 s->acttime = value; 310 s->reg = LM832x_GENERAL_ERROR; 311 break; 312 313 case LM832x_CMD_SET_DEBOUNCE: 314 s->kbd.dbnctime = value; 315 s->reg = LM832x_GENERAL_ERROR; 316 if (!value) 317 lm_kbd_error(s, ERR_BADPAR); 318 break; 319 320 case LM832x_CMD_SET_KEY_SIZE: 321 s->kbd.size = value; 322 s->reg = LM832x_GENERAL_ERROR; 323 if ( 324 (value & 0xf) < 3 || (value & 0xf) > LM832x_MAX_KPY || 325 (value >> 4) < 3 || (value >> 4) > LM832x_MAX_KPX) 326 lm_kbd_error(s, ERR_BADPAR); 327 break; 328 329 case LM832x_CMD_WRITE_CLOCK: 330 s->clock = value; 331 s->reg = LM832x_GENERAL_ERROR; 332 if ((value & 3) && (value & 3) != 3) { 333 lm_kbd_error(s, ERR_BADPAR); 334 fprintf(stderr, "%s: invalid clock setting in RCPWM\n", 335 __func__); 336 } 337 /* TODO: Validate that the command is only issued once */ 338 break; 339 340 case LM832x_CMD_PWM_WRITE: 341 if (byte == 0) { 342 if (!(value & 3) || (value >> 2) > 59) { 343 lm_kbd_error(s, ERR_BADPAR); 344 s->reg = LM832x_GENERAL_ERROR; 345 break; 346 } 347 348 s->pwm.faddr = value; 349 s->pwm.file[s->pwm.faddr] = 0; 350 } else if (byte == 1) { 351 s->pwm.file[s->pwm.faddr] |= value << 8; 352 } else if (byte == 2) { 353 s->pwm.file[s->pwm.faddr] |= value << 0; 354 s->reg = LM832x_GENERAL_ERROR; 355 } 356 break; 357 case LM832x_CMD_PWM_START: 358 s->reg = LM832x_GENERAL_ERROR; 359 if (!(value & 3) || (value >> 2) > 59) { 360 lm_kbd_error(s, ERR_BADPAR); 361 break; 362 } 363 364 s->pwm.addr[(value & 3) - 1] = value >> 2; 365 lm_kbd_pwm_start(s, (value & 3) - 1); 366 break; 367 case LM832x_CMD_PWM_STOP: 368 s->reg = LM832x_GENERAL_ERROR; 369 if (!(value & 3)) { 370 lm_kbd_error(s, ERR_BADPAR); 371 break; 372 } 373 374 timer_del(s->pwm.tm[(value & 3) - 1]); 375 break; 376 377 case LM832x_GENERAL_ERROR: 378 lm_kbd_error(s, ERR_BADPAR); 379 break; 380 default: 381 lm_kbd_error(s, ERR_CMDUNK); 382 fprintf(stderr, "%s: unknown command %02x\n", __func__, reg); 383 break; 384 } 385 } 386 387 static int lm_i2c_event(I2CSlave *i2c, enum i2c_event event) 388 { 389 LM823KbdState *s = LM8323(i2c); 390 391 switch (event) { 392 case I2C_START_RECV: 393 case I2C_START_SEND: 394 s->i2c_cycle = 0; 395 s->i2c_dir = (event == I2C_START_SEND); 396 break; 397 398 default: 399 break; 400 } 401 402 return 0; 403 } 404 405 static uint8_t lm_i2c_rx(I2CSlave *i2c) 406 { 407 LM823KbdState *s = LM8323(i2c); 408 409 return lm_kbd_read(s, s->reg, s->i2c_cycle ++); 410 } 411 412 static int lm_i2c_tx(I2CSlave *i2c, uint8_t data) 413 { 414 LM823KbdState *s = LM8323(i2c); 415 416 if (!s->i2c_cycle) 417 s->reg = data; 418 else 419 lm_kbd_write(s, s->reg, s->i2c_cycle - 1, data); 420 s->i2c_cycle ++; 421 422 return 0; 423 } 424 425 static int lm_kbd_post_load(void *opaque, int version_id) 426 { 427 LM823KbdState *s = opaque; 428 429 lm_kbd_irq_update(s); 430 lm_kbd_gpio_update(s); 431 432 return 0; 433 } 434 435 static const VMStateDescription vmstate_lm_kbd = { 436 .name = "LM8323", 437 .version_id = 0, 438 .minimum_version_id = 0, 439 .post_load = lm_kbd_post_load, 440 .fields = (VMStateField[]) { 441 VMSTATE_I2C_SLAVE(parent_obj, LM823KbdState), 442 VMSTATE_UINT8(i2c_dir, LM823KbdState), 443 VMSTATE_UINT8(i2c_cycle, LM823KbdState), 444 VMSTATE_UINT8(reg, LM823KbdState), 445 VMSTATE_UINT8(config, LM823KbdState), 446 VMSTATE_UINT8(status, LM823KbdState), 447 VMSTATE_UINT8(acttime, LM823KbdState), 448 VMSTATE_UINT8(error, LM823KbdState), 449 VMSTATE_UINT8(clock, LM823KbdState), 450 VMSTATE_UINT16(gpio.pull, LM823KbdState), 451 VMSTATE_UINT16(gpio.mask, LM823KbdState), 452 VMSTATE_UINT16(gpio.dir, LM823KbdState), 453 VMSTATE_UINT16(gpio.level, LM823KbdState), 454 VMSTATE_UINT8(kbd.dbnctime, LM823KbdState), 455 VMSTATE_UINT8(kbd.size, LM823KbdState), 456 VMSTATE_UINT8(kbd.start, LM823KbdState), 457 VMSTATE_UINT8(kbd.len, LM823KbdState), 458 VMSTATE_BUFFER(kbd.fifo, LM823KbdState), 459 VMSTATE_UINT16_ARRAY(pwm.file, LM823KbdState, 256), 460 VMSTATE_UINT8(pwm.faddr, LM823KbdState), 461 VMSTATE_BUFFER(pwm.addr, LM823KbdState), 462 VMSTATE_TIMER_PTR_ARRAY(pwm.tm, LM823KbdState, 3), 463 VMSTATE_END_OF_LIST() 464 } 465 }; 466 467 468 static void lm8323_realize(DeviceState *dev, Error **errp) 469 { 470 LM823KbdState *s = LM8323(dev); 471 472 s->model = 0x8323; 473 s->pwm.tm[0] = timer_new_ns(QEMU_CLOCK_VIRTUAL, lm_kbd_pwm0_tick, s); 474 s->pwm.tm[1] = timer_new_ns(QEMU_CLOCK_VIRTUAL, lm_kbd_pwm1_tick, s); 475 s->pwm.tm[2] = timer_new_ns(QEMU_CLOCK_VIRTUAL, lm_kbd_pwm2_tick, s); 476 qdev_init_gpio_out(dev, &s->nirq, 1); 477 478 lm_kbd_reset(s); 479 480 qemu_register_reset((void *) lm_kbd_reset, s); 481 } 482 483 void lm832x_key_event(DeviceState *dev, int key, int state) 484 { 485 LM823KbdState *s = LM8323(dev); 486 487 if ((s->status & INT_ERROR) && (s->error & ERR_FIFOOVR)) 488 return; 489 490 if (s->kbd.len >= sizeof(s->kbd.fifo)) { 491 lm_kbd_error(s, ERR_FIFOOVR); 492 return; 493 } 494 495 s->kbd.fifo[(s->kbd.start + s->kbd.len ++) & (sizeof(s->kbd.fifo) - 1)] = 496 key | (state << 7); 497 498 /* We never set ERR_KEYOVR because we support multiple keys fine. */ 499 s->status |= INT_KEYPAD; 500 lm_kbd_irq_update(s); 501 } 502 503 static void lm8323_class_init(ObjectClass *klass, void *data) 504 { 505 DeviceClass *dc = DEVICE_CLASS(klass); 506 I2CSlaveClass *k = I2C_SLAVE_CLASS(klass); 507 508 dc->realize = lm8323_realize; 509 k->event = lm_i2c_event; 510 k->recv = lm_i2c_rx; 511 k->send = lm_i2c_tx; 512 dc->vmsd = &vmstate_lm_kbd; 513 } 514 515 static const TypeInfo lm8323_info = { 516 .name = TYPE_LM8323, 517 .parent = TYPE_I2C_SLAVE, 518 .instance_size = sizeof(LM823KbdState), 519 .class_init = lm8323_class_init, 520 }; 521 522 static void lm832x_register_types(void) 523 { 524 type_register_static(&lm8323_info); 525 } 526 527 type_init(lm832x_register_types) 528