1 /* 2 * QEMU IDE Emulation: ISA Bus support. 3 * 4 * Copyright (c) 2003 Fabrice Bellard 5 * Copyright (c) 2006 Openedhand Ltd. 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a copy 8 * of this software and associated documentation files (the "Software"), to deal 9 * in the Software without restriction, including without limitation the rights 10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 11 * copies of the Software, and to permit persons to whom the Software is 12 * furnished to do so, subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice shall be included in 15 * all copies or substantial portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 23 * THE SOFTWARE. 24 */ 25 #include "qemu/osdep.h" 26 #include "hw/hw.h" 27 #include "hw/isa/isa.h" 28 #include "sysemu/dma.h" 29 30 #include "hw/ide/internal.h" 31 32 /***********************************************************/ 33 /* ISA IDE definitions */ 34 35 #define TYPE_ISA_IDE "isa-ide" 36 #define ISA_IDE(obj) OBJECT_CHECK(ISAIDEState, (obj), TYPE_ISA_IDE) 37 38 typedef struct ISAIDEState { 39 ISADevice parent_obj; 40 41 IDEBus bus; 42 uint32_t iobase; 43 uint32_t iobase2; 44 uint32_t isairq; 45 qemu_irq irq; 46 } ISAIDEState; 47 48 static void isa_ide_reset(DeviceState *d) 49 { 50 ISAIDEState *s = ISA_IDE(d); 51 52 ide_bus_reset(&s->bus); 53 } 54 55 static const VMStateDescription vmstate_ide_isa = { 56 .name = "isa-ide", 57 .version_id = 3, 58 .minimum_version_id = 0, 59 .fields = (VMStateField[]) { 60 VMSTATE_IDE_BUS(bus, ISAIDEState), 61 VMSTATE_IDE_DRIVES(bus.ifs, ISAIDEState), 62 VMSTATE_END_OF_LIST() 63 } 64 }; 65 66 static void isa_ide_realizefn(DeviceState *dev, Error **errp) 67 { 68 ISADevice *isadev = ISA_DEVICE(dev); 69 ISAIDEState *s = ISA_IDE(dev); 70 71 ide_bus_new(&s->bus, sizeof(s->bus), dev, 0, 2); 72 ide_init_ioport(&s->bus, isadev, s->iobase, s->iobase2); 73 isa_init_irq(isadev, &s->irq, s->isairq); 74 ide_init2(&s->bus, s->irq); 75 vmstate_register(dev, 0, &vmstate_ide_isa, s); 76 ide_register_restart_cb(&s->bus); 77 } 78 79 ISADevice *isa_ide_init(ISABus *bus, int iobase, int iobase2, int isairq, 80 DriveInfo *hd0, DriveInfo *hd1) 81 { 82 DeviceState *dev; 83 ISADevice *isadev; 84 ISAIDEState *s; 85 86 isadev = isa_create(bus, TYPE_ISA_IDE); 87 dev = DEVICE(isadev); 88 qdev_prop_set_uint32(dev, "iobase", iobase); 89 qdev_prop_set_uint32(dev, "iobase2", iobase2); 90 qdev_prop_set_uint32(dev, "irq", isairq); 91 qdev_init_nofail(dev); 92 93 s = ISA_IDE(dev); 94 if (hd0) { 95 ide_create_drive(&s->bus, 0, hd0); 96 } 97 if (hd1) { 98 ide_create_drive(&s->bus, 1, hd1); 99 } 100 return isadev; 101 } 102 103 static Property isa_ide_properties[] = { 104 DEFINE_PROP_UINT32("iobase", ISAIDEState, iobase, 0x1f0), 105 DEFINE_PROP_UINT32("iobase2", ISAIDEState, iobase2, 0x3f6), 106 DEFINE_PROP_UINT32("irq", ISAIDEState, isairq, 14), 107 DEFINE_PROP_END_OF_LIST(), 108 }; 109 110 static void isa_ide_class_initfn(ObjectClass *klass, void *data) 111 { 112 DeviceClass *dc = DEVICE_CLASS(klass); 113 114 dc->realize = isa_ide_realizefn; 115 dc->fw_name = "ide"; 116 dc->reset = isa_ide_reset; 117 dc->props = isa_ide_properties; 118 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); 119 } 120 121 static const TypeInfo isa_ide_info = { 122 .name = TYPE_ISA_IDE, 123 .parent = TYPE_ISA_DEVICE, 124 .instance_size = sizeof(ISAIDEState), 125 .class_init = isa_ide_class_initfn, 126 }; 127 128 static void isa_ide_register_types(void) 129 { 130 type_register_static(&isa_ide_info); 131 } 132 133 type_init(isa_ide_register_types) 134