xref: /openbmc/qemu/hw/i386/xen/xen_platform.c (revision 228aa992)
1 /*
2  * XEN platform pci device, formerly known as the event channel device
3  *
4  * Copyright (c) 2003-2004 Intel Corp.
5  * Copyright (c) 2006 XenSource
6  *
7  * Permission is hereby granted, free of charge, to any person obtaining a copy
8  * of this software and associated documentation files (the "Software"), to deal
9  * in the Software without restriction, including without limitation the rights
10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11  * copies of the Software, and to permit persons to whom the Software is
12  * furnished to do so, subject to the following conditions:
13  *
14  * The above copyright notice and this permission notice shall be included in
15  * all copies or substantial portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23  * THE SOFTWARE.
24  */
25 
26 #include <assert.h>
27 
28 #include "hw/hw.h"
29 #include "hw/i386/pc.h"
30 #include "hw/ide.h"
31 #include "hw/pci/pci.h"
32 #include "hw/irq.h"
33 #include "hw/xen/xen_common.h"
34 #include "hw/xen/xen_backend.h"
35 #include "trace.h"
36 #include "exec/address-spaces.h"
37 #include "sysemu/block-backend.h"
38 
39 #include <xenguest.h>
40 
41 //#define DEBUG_PLATFORM
42 
43 #ifdef DEBUG_PLATFORM
44 #define DPRINTF(fmt, ...) do { \
45     fprintf(stderr, "xen_platform: " fmt, ## __VA_ARGS__); \
46 } while (0)
47 #else
48 #define DPRINTF(fmt, ...) do { } while (0)
49 #endif
50 
51 #define PFFLAG_ROM_LOCK 1 /* Sets whether ROM memory area is RW or RO */
52 
53 typedef struct PCIXenPlatformState {
54     /*< private >*/
55     PCIDevice parent_obj;
56     /*< public >*/
57 
58     MemoryRegion fixed_io;
59     MemoryRegion bar;
60     MemoryRegion mmio_bar;
61     uint8_t flags; /* used only for version_id == 2 */
62     int drivers_blacklisted;
63     uint16_t driver_product_version;
64 
65     /* Log from guest drivers */
66     char log_buffer[4096];
67     int log_buffer_off;
68 } PCIXenPlatformState;
69 
70 #define TYPE_XEN_PLATFORM "xen-platform"
71 #define XEN_PLATFORM(obj) \
72     OBJECT_CHECK(PCIXenPlatformState, (obj), TYPE_XEN_PLATFORM)
73 
74 #define XEN_PLATFORM_IOPORT 0x10
75 
76 /* Send bytes to syslog */
77 static void log_writeb(PCIXenPlatformState *s, char val)
78 {
79     if (val == '\n' || s->log_buffer_off == sizeof(s->log_buffer) - 1) {
80         /* Flush buffer */
81         s->log_buffer[s->log_buffer_off] = 0;
82         trace_xen_platform_log(s->log_buffer);
83         s->log_buffer_off = 0;
84     } else {
85         s->log_buffer[s->log_buffer_off++] = val;
86     }
87 }
88 
89 /* Xen Platform, Fixed IOPort */
90 #define UNPLUG_ALL_IDE_DISKS 1
91 #define UNPLUG_ALL_NICS 2
92 #define UNPLUG_AUX_IDE_DISKS 4
93 
94 static void unplug_nic(PCIBus *b, PCIDevice *d, void *o)
95 {
96     /* We have to ignore passthrough devices */
97     if (pci_get_word(d->config + PCI_CLASS_DEVICE) ==
98             PCI_CLASS_NETWORK_ETHERNET
99             && strcmp(d->name, "xen-pci-passthrough") != 0) {
100         object_unparent(OBJECT(d));
101     }
102 }
103 
104 static void pci_unplug_nics(PCIBus *bus)
105 {
106     pci_for_each_device(bus, 0, unplug_nic, NULL);
107 }
108 
109 static void unplug_disks(PCIBus *b, PCIDevice *d, void *o)
110 {
111     /* We have to ignore passthrough devices */
112     if (pci_get_word(d->config + PCI_CLASS_DEVICE) ==
113             PCI_CLASS_STORAGE_IDE
114             && strcmp(d->name, "xen-pci-passthrough") != 0) {
115         pci_piix3_xen_ide_unplug(DEVICE(d));
116     }
117 }
118 
119 static void pci_unplug_disks(PCIBus *bus)
120 {
121     pci_for_each_device(bus, 0, unplug_disks, NULL);
122 }
123 
124 static void platform_fixed_ioport_writew(void *opaque, uint32_t addr, uint32_t val)
125 {
126     PCIXenPlatformState *s = opaque;
127 
128     switch (addr) {
129     case 0: {
130         PCIDevice *pci_dev = PCI_DEVICE(s);
131         /* Unplug devices.  Value is a bitmask of which devices to
132            unplug, with bit 0 the IDE devices, bit 1 the network
133            devices, and bit 2 the non-primary-master IDE devices. */
134         if (val & UNPLUG_ALL_IDE_DISKS) {
135             DPRINTF("unplug disks\n");
136             blk_drain_all();
137             blk_flush_all();
138             pci_unplug_disks(pci_dev->bus);
139         }
140         if (val & UNPLUG_ALL_NICS) {
141             DPRINTF("unplug nics\n");
142             pci_unplug_nics(pci_dev->bus);
143         }
144         if (val & UNPLUG_AUX_IDE_DISKS) {
145             DPRINTF("unplug auxiliary disks not supported\n");
146         }
147         break;
148     }
149     case 2:
150         switch (val) {
151         case 1:
152             DPRINTF("Citrix Windows PV drivers loaded in guest\n");
153             break;
154         case 0:
155             DPRINTF("Guest claimed to be running PV product 0?\n");
156             break;
157         default:
158             DPRINTF("Unknown PV product %d loaded in guest\n", val);
159             break;
160         }
161         s->driver_product_version = val;
162         break;
163     }
164 }
165 
166 static void platform_fixed_ioport_writel(void *opaque, uint32_t addr,
167                                          uint32_t val)
168 {
169     switch (addr) {
170     case 0:
171         /* PV driver version */
172         break;
173     }
174 }
175 
176 static void platform_fixed_ioport_writeb(void *opaque, uint32_t addr, uint32_t val)
177 {
178     PCIXenPlatformState *s = opaque;
179 
180     switch (addr) {
181     case 0: /* Platform flags */ {
182         hvmmem_type_t mem_type = (val & PFFLAG_ROM_LOCK) ?
183             HVMMEM_ram_ro : HVMMEM_ram_rw;
184         if (xc_hvm_set_mem_type(xen_xc, xen_domid, mem_type, 0xc0, 0x40)) {
185             DPRINTF("unable to change ro/rw state of ROM memory area!\n");
186         } else {
187             s->flags = val & PFFLAG_ROM_LOCK;
188             DPRINTF("changed ro/rw state of ROM memory area. now is %s state.\n",
189                     (mem_type == HVMMEM_ram_ro ? "ro":"rw"));
190         }
191         break;
192     }
193     case 2:
194         log_writeb(s, val);
195         break;
196     }
197 }
198 
199 static uint32_t platform_fixed_ioport_readw(void *opaque, uint32_t addr)
200 {
201     PCIXenPlatformState *s = opaque;
202 
203     switch (addr) {
204     case 0:
205         if (s->drivers_blacklisted) {
206             /* The drivers will recognise this magic number and refuse
207              * to do anything. */
208             return 0xd249;
209         } else {
210             /* Magic value so that you can identify the interface. */
211             return 0x49d2;
212         }
213     default:
214         return 0xffff;
215     }
216 }
217 
218 static uint32_t platform_fixed_ioport_readb(void *opaque, uint32_t addr)
219 {
220     PCIXenPlatformState *s = opaque;
221 
222     switch (addr) {
223     case 0:
224         /* Platform flags */
225         return s->flags;
226     case 2:
227         /* Version number */
228         return 1;
229     default:
230         return 0xff;
231     }
232 }
233 
234 static void platform_fixed_ioport_reset(void *opaque)
235 {
236     PCIXenPlatformState *s = opaque;
237 
238     platform_fixed_ioport_writeb(s, 0, 0);
239 }
240 
241 static uint64_t platform_fixed_ioport_read(void *opaque,
242                                            hwaddr addr,
243                                            unsigned size)
244 {
245     switch (size) {
246     case 1:
247         return platform_fixed_ioport_readb(opaque, addr);
248     case 2:
249         return platform_fixed_ioport_readw(opaque, addr);
250     default:
251         return -1;
252     }
253 }
254 
255 static void platform_fixed_ioport_write(void *opaque, hwaddr addr,
256 
257                                         uint64_t val, unsigned size)
258 {
259     switch (size) {
260     case 1:
261         platform_fixed_ioport_writeb(opaque, addr, val);
262         break;
263     case 2:
264         platform_fixed_ioport_writew(opaque, addr, val);
265         break;
266     case 4:
267         platform_fixed_ioport_writel(opaque, addr, val);
268         break;
269     }
270 }
271 
272 
273 static const MemoryRegionOps platform_fixed_io_ops = {
274     .read = platform_fixed_ioport_read,
275     .write = platform_fixed_ioport_write,
276     .valid = {
277         .unaligned = true,
278     },
279     .impl = {
280         .min_access_size = 1,
281         .max_access_size = 4,
282         .unaligned = true,
283     },
284     .endianness = DEVICE_LITTLE_ENDIAN,
285 };
286 
287 static void platform_fixed_ioport_init(PCIXenPlatformState* s)
288 {
289     memory_region_init_io(&s->fixed_io, OBJECT(s), &platform_fixed_io_ops, s,
290                           "xen-fixed", 16);
291     memory_region_add_subregion(get_system_io(), XEN_PLATFORM_IOPORT,
292                                 &s->fixed_io);
293 }
294 
295 /* Xen Platform PCI Device */
296 
297 static uint64_t xen_platform_ioport_readb(void *opaque, hwaddr addr,
298                                           unsigned int size)
299 {
300     if (addr == 0) {
301         return platform_fixed_ioport_readb(opaque, 0);
302     } else {
303         return ~0u;
304     }
305 }
306 
307 static void xen_platform_ioport_writeb(void *opaque, hwaddr addr,
308                                        uint64_t val, unsigned int size)
309 {
310     PCIXenPlatformState *s = opaque;
311 
312     switch (addr) {
313     case 0: /* Platform flags */
314         platform_fixed_ioport_writeb(opaque, 0, (uint32_t)val);
315         break;
316     case 8:
317         log_writeb(s, (uint32_t)val);
318         break;
319     default:
320         break;
321     }
322 }
323 
324 static const MemoryRegionOps xen_pci_io_ops = {
325     .read  = xen_platform_ioport_readb,
326     .write = xen_platform_ioport_writeb,
327     .impl.min_access_size = 1,
328     .impl.max_access_size = 1,
329 };
330 
331 static void platform_ioport_bar_setup(PCIXenPlatformState *d)
332 {
333     memory_region_init_io(&d->bar, OBJECT(d), &xen_pci_io_ops, d,
334                           "xen-pci", 0x100);
335 }
336 
337 static uint64_t platform_mmio_read(void *opaque, hwaddr addr,
338                                    unsigned size)
339 {
340     DPRINTF("Warning: attempted read from physical address "
341             "0x" TARGET_FMT_plx " in xen platform mmio space\n", addr);
342 
343     return 0;
344 }
345 
346 static void platform_mmio_write(void *opaque, hwaddr addr,
347                                 uint64_t val, unsigned size)
348 {
349     DPRINTF("Warning: attempted write of 0x%"PRIx64" to physical "
350             "address 0x" TARGET_FMT_plx " in xen platform mmio space\n",
351             val, addr);
352 }
353 
354 static const MemoryRegionOps platform_mmio_handler = {
355     .read = &platform_mmio_read,
356     .write = &platform_mmio_write,
357     .endianness = DEVICE_NATIVE_ENDIAN,
358 };
359 
360 static void platform_mmio_setup(PCIXenPlatformState *d)
361 {
362     memory_region_init_io(&d->mmio_bar, OBJECT(d), &platform_mmio_handler, d,
363                           "xen-mmio", 0x1000000);
364 }
365 
366 static int xen_platform_post_load(void *opaque, int version_id)
367 {
368     PCIXenPlatformState *s = opaque;
369 
370     platform_fixed_ioport_writeb(s, 0, s->flags);
371 
372     return 0;
373 }
374 
375 static const VMStateDescription vmstate_xen_platform = {
376     .name = "platform",
377     .version_id = 4,
378     .minimum_version_id = 4,
379     .post_load = xen_platform_post_load,
380     .fields = (VMStateField[]) {
381         VMSTATE_PCI_DEVICE(parent_obj, PCIXenPlatformState),
382         VMSTATE_UINT8(flags, PCIXenPlatformState),
383         VMSTATE_END_OF_LIST()
384     }
385 };
386 
387 static int xen_platform_initfn(PCIDevice *dev)
388 {
389     PCIXenPlatformState *d = XEN_PLATFORM(dev);
390     uint8_t *pci_conf;
391 
392     pci_conf = dev->config;
393 
394     pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
395 
396     pci_config_set_prog_interface(pci_conf, 0);
397 
398     pci_conf[PCI_INTERRUPT_PIN] = 1;
399 
400     platform_ioport_bar_setup(d);
401     pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &d->bar);
402 
403     /* reserve 16MB mmio address for share memory*/
404     platform_mmio_setup(d);
405     pci_register_bar(dev, 1, PCI_BASE_ADDRESS_MEM_PREFETCH,
406                      &d->mmio_bar);
407 
408     platform_fixed_ioport_init(d);
409 
410     return 0;
411 }
412 
413 static void platform_reset(DeviceState *dev)
414 {
415     PCIXenPlatformState *s = XEN_PLATFORM(dev);
416 
417     platform_fixed_ioport_reset(s);
418 }
419 
420 static void xen_platform_class_init(ObjectClass *klass, void *data)
421 {
422     DeviceClass *dc = DEVICE_CLASS(klass);
423     PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
424 
425     k->init = xen_platform_initfn;
426     k->vendor_id = PCI_VENDOR_ID_XEN;
427     k->device_id = PCI_DEVICE_ID_XEN_PLATFORM;
428     k->class_id = PCI_CLASS_OTHERS << 8 | 0x80;
429     k->subsystem_vendor_id = PCI_VENDOR_ID_XEN;
430     k->subsystem_id = PCI_DEVICE_ID_XEN_PLATFORM;
431     k->revision = 1;
432     set_bit(DEVICE_CATEGORY_MISC, dc->categories);
433     dc->desc = "XEN platform pci device";
434     dc->reset = platform_reset;
435     dc->vmsd = &vmstate_xen_platform;
436 }
437 
438 static const TypeInfo xen_platform_info = {
439     .name          = TYPE_XEN_PLATFORM,
440     .parent        = TYPE_PCI_DEVICE,
441     .instance_size = sizeof(PCIXenPlatformState),
442     .class_init    = xen_platform_class_init,
443 };
444 
445 static void xen_platform_register_types(void)
446 {
447     type_register_static(&xen_platform_info);
448 }
449 
450 type_init(xen_platform_register_types)
451