xref: /openbmc/qemu/hw/i386/x86.c (revision c51a3f5d)
1 /*
2  * Copyright (c) 2003-2004 Fabrice Bellard
3  * Copyright (c) 2019 Red Hat, Inc.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a copy
6  * of this software and associated documentation files (the "Software"), to deal
7  * in the Software without restriction, including without limitation the rights
8  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
9  * copies of the Software, and to permit persons to whom the Software is
10  * furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice shall be included in
13  * all copies or substantial portions of the Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
21  * THE SOFTWARE.
22  */
23 #include "qemu/osdep.h"
24 #include "qemu/error-report.h"
25 #include "qemu/option.h"
26 #include "qemu/cutils.h"
27 #include "qemu/units.h"
28 #include "qemu-common.h"
29 #include "qapi/error.h"
30 #include "qapi/qmp/qerror.h"
31 #include "qapi/qapi-visit-common.h"
32 #include "qapi/visitor.h"
33 #include "sysemu/qtest.h"
34 #include "sysemu/numa.h"
35 #include "sysemu/replay.h"
36 #include "sysemu/sysemu.h"
37 #include "trace.h"
38 
39 #include "hw/i386/x86.h"
40 #include "target/i386/cpu.h"
41 #include "hw/i386/topology.h"
42 #include "hw/i386/fw_cfg.h"
43 #include "hw/intc/i8259.h"
44 
45 #include "hw/acpi/cpu_hotplug.h"
46 #include "hw/irq.h"
47 #include "hw/nmi.h"
48 #include "hw/loader.h"
49 #include "multiboot.h"
50 #include "elf.h"
51 #include "standard-headers/asm-x86/bootparam.h"
52 #include CONFIG_DEVICES
53 #include "kvm_i386.h"
54 
55 #define BIOS_FILENAME "bios.bin"
56 
57 /* Physical Address of PVH entry point read from kernel ELF NOTE */
58 static size_t pvh_start_addr;
59 
60 inline void init_topo_info(X86CPUTopoInfo *topo_info,
61                            const X86MachineState *x86ms)
62 {
63     MachineState *ms = MACHINE(x86ms);
64 
65     topo_info->dies_per_pkg = x86ms->smp_dies;
66     topo_info->cores_per_die = ms->smp.cores;
67     topo_info->threads_per_core = ms->smp.threads;
68 }
69 
70 /*
71  * Calculates initial APIC ID for a specific CPU index
72  *
73  * Currently we need to be able to calculate the APIC ID from the CPU index
74  * alone (without requiring a CPU object), as the QEMU<->Seabios interfaces have
75  * no concept of "CPU index", and the NUMA tables on fw_cfg need the APIC ID of
76  * all CPUs up to max_cpus.
77  */
78 uint32_t x86_cpu_apic_id_from_index(X86MachineState *x86ms,
79                                     unsigned int cpu_index)
80 {
81     X86MachineClass *x86mc = X86_MACHINE_GET_CLASS(x86ms);
82     X86CPUTopoInfo topo_info;
83     uint32_t correct_id;
84     static bool warned;
85 
86     init_topo_info(&topo_info, x86ms);
87 
88     correct_id = x86_apicid_from_cpu_idx(&topo_info, cpu_index);
89     if (x86mc->compat_apic_id_mode) {
90         if (cpu_index != correct_id && !warned && !qtest_enabled()) {
91             error_report("APIC IDs set in compatibility mode, "
92                          "CPU topology won't match the configuration");
93             warned = true;
94         }
95         return cpu_index;
96     } else {
97         return correct_id;
98     }
99 }
100 
101 
102 void x86_cpu_new(X86MachineState *x86ms, int64_t apic_id, Error **errp)
103 {
104     Object *cpu = object_new(MACHINE(x86ms)->cpu_type);
105 
106     if (!object_property_set_uint(cpu, "apic-id", apic_id, errp)) {
107         goto out;
108     }
109     qdev_realize(DEVICE(cpu), NULL, errp);
110 
111 out:
112     object_unref(cpu);
113 }
114 
115 void x86_cpus_init(X86MachineState *x86ms, int default_cpu_version)
116 {
117     int i;
118     const CPUArchIdList *possible_cpus;
119     MachineState *ms = MACHINE(x86ms);
120     MachineClass *mc = MACHINE_GET_CLASS(x86ms);
121 
122     x86_cpu_set_default_version(default_cpu_version);
123 
124     /*
125      * Calculates the limit to CPU APIC ID values
126      *
127      * Limit for the APIC ID value, so that all
128      * CPU APIC IDs are < x86ms->apic_id_limit.
129      *
130      * This is used for FW_CFG_MAX_CPUS. See comments on fw_cfg_arch_create().
131      */
132     x86ms->apic_id_limit = x86_cpu_apic_id_from_index(x86ms,
133                                                       ms->smp.max_cpus - 1) + 1;
134     possible_cpus = mc->possible_cpu_arch_ids(ms);
135     for (i = 0; i < ms->smp.cpus; i++) {
136         x86_cpu_new(x86ms, possible_cpus->cpus[i].arch_id, &error_fatal);
137     }
138 }
139 
140 CpuInstanceProperties
141 x86_cpu_index_to_props(MachineState *ms, unsigned cpu_index)
142 {
143     MachineClass *mc = MACHINE_GET_CLASS(ms);
144     const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(ms);
145 
146     assert(cpu_index < possible_cpus->len);
147     return possible_cpus->cpus[cpu_index].props;
148 }
149 
150 int64_t x86_get_default_cpu_node_id(const MachineState *ms, int idx)
151 {
152    X86CPUTopoIDs topo_ids;
153    X86MachineState *x86ms = X86_MACHINE(ms);
154    X86CPUTopoInfo topo_info;
155 
156    init_topo_info(&topo_info, x86ms);
157 
158    assert(idx < ms->possible_cpus->len);
159    x86_topo_ids_from_apicid(ms->possible_cpus->cpus[idx].arch_id,
160                             &topo_info, &topo_ids);
161    return topo_ids.pkg_id % ms->numa_state->num_nodes;
162 }
163 
164 const CPUArchIdList *x86_possible_cpu_arch_ids(MachineState *ms)
165 {
166     X86MachineState *x86ms = X86_MACHINE(ms);
167     unsigned int max_cpus = ms->smp.max_cpus;
168     X86CPUTopoInfo topo_info;
169     int i;
170 
171     if (ms->possible_cpus) {
172         /*
173          * make sure that max_cpus hasn't changed since the first use, i.e.
174          * -smp hasn't been parsed after it
175          */
176         assert(ms->possible_cpus->len == max_cpus);
177         return ms->possible_cpus;
178     }
179 
180     ms->possible_cpus = g_malloc0(sizeof(CPUArchIdList) +
181                                   sizeof(CPUArchId) * max_cpus);
182     ms->possible_cpus->len = max_cpus;
183 
184     init_topo_info(&topo_info, x86ms);
185 
186     for (i = 0; i < ms->possible_cpus->len; i++) {
187         X86CPUTopoIDs topo_ids;
188 
189         ms->possible_cpus->cpus[i].type = ms->cpu_type;
190         ms->possible_cpus->cpus[i].vcpus_count = 1;
191         ms->possible_cpus->cpus[i].arch_id =
192             x86_cpu_apic_id_from_index(x86ms, i);
193         x86_topo_ids_from_apicid(ms->possible_cpus->cpus[i].arch_id,
194                                  &topo_info, &topo_ids);
195         ms->possible_cpus->cpus[i].props.has_socket_id = true;
196         ms->possible_cpus->cpus[i].props.socket_id = topo_ids.pkg_id;
197         if (x86ms->smp_dies > 1) {
198             ms->possible_cpus->cpus[i].props.has_die_id = true;
199             ms->possible_cpus->cpus[i].props.die_id = topo_ids.die_id;
200         }
201         ms->possible_cpus->cpus[i].props.has_core_id = true;
202         ms->possible_cpus->cpus[i].props.core_id = topo_ids.core_id;
203         ms->possible_cpus->cpus[i].props.has_thread_id = true;
204         ms->possible_cpus->cpus[i].props.thread_id = topo_ids.smt_id;
205     }
206     return ms->possible_cpus;
207 }
208 
209 static void x86_nmi(NMIState *n, int cpu_index, Error **errp)
210 {
211     /* cpu index isn't used */
212     CPUState *cs;
213 
214     CPU_FOREACH(cs) {
215         X86CPU *cpu = X86_CPU(cs);
216 
217         if (!cpu->apic_state) {
218             cpu_interrupt(cs, CPU_INTERRUPT_NMI);
219         } else {
220             apic_deliver_nmi(cpu->apic_state);
221         }
222     }
223 }
224 
225 static long get_file_size(FILE *f)
226 {
227     long where, size;
228 
229     /* XXX: on Unix systems, using fstat() probably makes more sense */
230 
231     where = ftell(f);
232     fseek(f, 0, SEEK_END);
233     size = ftell(f);
234     fseek(f, where, SEEK_SET);
235 
236     return size;
237 }
238 
239 /* TSC handling */
240 uint64_t cpu_get_tsc(CPUX86State *env)
241 {
242     return cpu_get_ticks();
243 }
244 
245 /* IRQ handling */
246 static void pic_irq_request(void *opaque, int irq, int level)
247 {
248     CPUState *cs = first_cpu;
249     X86CPU *cpu = X86_CPU(cs);
250 
251     trace_x86_pic_interrupt(irq, level);
252     if (cpu->apic_state && !kvm_irqchip_in_kernel()) {
253         CPU_FOREACH(cs) {
254             cpu = X86_CPU(cs);
255             if (apic_accept_pic_intr(cpu->apic_state)) {
256                 apic_deliver_pic_intr(cpu->apic_state, level);
257             }
258         }
259     } else {
260         if (level) {
261             cpu_interrupt(cs, CPU_INTERRUPT_HARD);
262         } else {
263             cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
264         }
265     }
266 }
267 
268 qemu_irq x86_allocate_cpu_irq(void)
269 {
270     return qemu_allocate_irq(pic_irq_request, NULL, 0);
271 }
272 
273 int cpu_get_pic_interrupt(CPUX86State *env)
274 {
275     X86CPU *cpu = env_archcpu(env);
276     int intno;
277 
278     if (!kvm_irqchip_in_kernel()) {
279         intno = apic_get_interrupt(cpu->apic_state);
280         if (intno >= 0) {
281             return intno;
282         }
283         /* read the irq from the PIC */
284         if (!apic_accept_pic_intr(cpu->apic_state)) {
285             return -1;
286         }
287     }
288 
289     intno = pic_read_irq(isa_pic);
290     return intno;
291 }
292 
293 DeviceState *cpu_get_current_apic(void)
294 {
295     if (current_cpu) {
296         X86CPU *cpu = X86_CPU(current_cpu);
297         return cpu->apic_state;
298     } else {
299         return NULL;
300     }
301 }
302 
303 void gsi_handler(void *opaque, int n, int level)
304 {
305     GSIState *s = opaque;
306 
307     trace_x86_gsi_interrupt(n, level);
308     if (n < ISA_NUM_IRQS) {
309         /* Under KVM, Kernel will forward to both PIC and IOAPIC */
310         qemu_set_irq(s->i8259_irq[n], level);
311     }
312     qemu_set_irq(s->ioapic_irq[n], level);
313 }
314 
315 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name)
316 {
317     DeviceState *dev;
318     SysBusDevice *d;
319     unsigned int i;
320 
321     assert(parent_name);
322     if (kvm_ioapic_in_kernel()) {
323         dev = qdev_new(TYPE_KVM_IOAPIC);
324     } else {
325         dev = qdev_new(TYPE_IOAPIC);
326     }
327     object_property_add_child(object_resolve_path(parent_name, NULL),
328                               "ioapic", OBJECT(dev));
329     d = SYS_BUS_DEVICE(dev);
330     sysbus_realize_and_unref(d, &error_fatal);
331     sysbus_mmio_map(d, 0, IO_APIC_DEFAULT_ADDRESS);
332 
333     for (i = 0; i < IOAPIC_NUM_PINS; i++) {
334         gsi_state->ioapic_irq[i] = qdev_get_gpio_in(dev, i);
335     }
336 }
337 
338 struct setup_data {
339     uint64_t next;
340     uint32_t type;
341     uint32_t len;
342     uint8_t data[];
343 } __attribute__((packed));
344 
345 
346 /*
347  * The entry point into the kernel for PVH boot is different from
348  * the native entry point.  The PVH entry is defined by the x86/HVM
349  * direct boot ABI and is available in an ELFNOTE in the kernel binary.
350  *
351  * This function is passed to load_elf() when it is called from
352  * load_elfboot() which then additionally checks for an ELF Note of
353  * type XEN_ELFNOTE_PHYS32_ENTRY and passes it to this function to
354  * parse the PVH entry address from the ELF Note.
355  *
356  * Due to trickery in elf_opts.h, load_elf() is actually available as
357  * load_elf32() or load_elf64() and this routine needs to be able
358  * to deal with being called as 32 or 64 bit.
359  *
360  * The address of the PVH entry point is saved to the 'pvh_start_addr'
361  * global variable.  (although the entry point is 32-bit, the kernel
362  * binary can be either 32-bit or 64-bit).
363  */
364 static uint64_t read_pvh_start_addr(void *arg1, void *arg2, bool is64)
365 {
366     size_t *elf_note_data_addr;
367 
368     /* Check if ELF Note header passed in is valid */
369     if (arg1 == NULL) {
370         return 0;
371     }
372 
373     if (is64) {
374         struct elf64_note *nhdr64 = (struct elf64_note *)arg1;
375         uint64_t nhdr_size64 = sizeof(struct elf64_note);
376         uint64_t phdr_align = *(uint64_t *)arg2;
377         uint64_t nhdr_namesz = nhdr64->n_namesz;
378 
379         elf_note_data_addr =
380             ((void *)nhdr64) + nhdr_size64 +
381             QEMU_ALIGN_UP(nhdr_namesz, phdr_align);
382     } else {
383         struct elf32_note *nhdr32 = (struct elf32_note *)arg1;
384         uint32_t nhdr_size32 = sizeof(struct elf32_note);
385         uint32_t phdr_align = *(uint32_t *)arg2;
386         uint32_t nhdr_namesz = nhdr32->n_namesz;
387 
388         elf_note_data_addr =
389             ((void *)nhdr32) + nhdr_size32 +
390             QEMU_ALIGN_UP(nhdr_namesz, phdr_align);
391     }
392 
393     pvh_start_addr = *elf_note_data_addr;
394 
395     return pvh_start_addr;
396 }
397 
398 static bool load_elfboot(const char *kernel_filename,
399                          int kernel_file_size,
400                          uint8_t *header,
401                          size_t pvh_xen_start_addr,
402                          FWCfgState *fw_cfg)
403 {
404     uint32_t flags = 0;
405     uint32_t mh_load_addr = 0;
406     uint32_t elf_kernel_size = 0;
407     uint64_t elf_entry;
408     uint64_t elf_low, elf_high;
409     int kernel_size;
410 
411     if (ldl_p(header) != 0x464c457f) {
412         return false; /* no elfboot */
413     }
414 
415     bool elf_is64 = header[EI_CLASS] == ELFCLASS64;
416     flags = elf_is64 ?
417         ((Elf64_Ehdr *)header)->e_flags : ((Elf32_Ehdr *)header)->e_flags;
418 
419     if (flags & 0x00010004) { /* LOAD_ELF_HEADER_HAS_ADDR */
420         error_report("elfboot unsupported flags = %x", flags);
421         exit(1);
422     }
423 
424     uint64_t elf_note_type = XEN_ELFNOTE_PHYS32_ENTRY;
425     kernel_size = load_elf(kernel_filename, read_pvh_start_addr,
426                            NULL, &elf_note_type, &elf_entry,
427                            &elf_low, &elf_high, NULL, 0, I386_ELF_MACHINE,
428                            0, 0);
429 
430     if (kernel_size < 0) {
431         error_report("Error while loading elf kernel");
432         exit(1);
433     }
434     mh_load_addr = elf_low;
435     elf_kernel_size = elf_high - elf_low;
436 
437     if (pvh_start_addr == 0) {
438         error_report("Error loading uncompressed kernel without PVH ELF Note");
439         exit(1);
440     }
441     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ENTRY, pvh_start_addr);
442     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, mh_load_addr);
443     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, elf_kernel_size);
444 
445     return true;
446 }
447 
448 void x86_load_linux(X86MachineState *x86ms,
449                     FWCfgState *fw_cfg,
450                     int acpi_data_size,
451                     bool pvh_enabled,
452                     bool linuxboot_dma_enabled)
453 {
454     uint16_t protocol;
455     int setup_size, kernel_size, cmdline_size;
456     int dtb_size, setup_data_offset;
457     uint32_t initrd_max;
458     uint8_t header[8192], *setup, *kernel;
459     hwaddr real_addr, prot_addr, cmdline_addr, initrd_addr = 0;
460     FILE *f;
461     char *vmode;
462     MachineState *machine = MACHINE(x86ms);
463     struct setup_data *setup_data;
464     const char *kernel_filename = machine->kernel_filename;
465     const char *initrd_filename = machine->initrd_filename;
466     const char *dtb_filename = machine->dtb;
467     const char *kernel_cmdline = machine->kernel_cmdline;
468 
469     /* Align to 16 bytes as a paranoia measure */
470     cmdline_size = (strlen(kernel_cmdline) + 16) & ~15;
471 
472     /* load the kernel header */
473     f = fopen(kernel_filename, "rb");
474     if (!f) {
475         fprintf(stderr, "qemu: could not open kernel file '%s': %s\n",
476                 kernel_filename, strerror(errno));
477         exit(1);
478     }
479 
480     kernel_size = get_file_size(f);
481     if (!kernel_size ||
482         fread(header, 1, MIN(ARRAY_SIZE(header), kernel_size), f) !=
483         MIN(ARRAY_SIZE(header), kernel_size)) {
484         fprintf(stderr, "qemu: could not load kernel '%s': %s\n",
485                 kernel_filename, strerror(errno));
486         exit(1);
487     }
488 
489     /* kernel protocol version */
490     if (ldl_p(header + 0x202) == 0x53726448) {
491         protocol = lduw_p(header + 0x206);
492     } else {
493         /*
494          * This could be a multiboot kernel. If it is, let's stop treating it
495          * like a Linux kernel.
496          * Note: some multiboot images could be in the ELF format (the same of
497          * PVH), so we try multiboot first since we check the multiboot magic
498          * header before to load it.
499          */
500         if (load_multiboot(fw_cfg, f, kernel_filename, initrd_filename,
501                            kernel_cmdline, kernel_size, header)) {
502             return;
503         }
504         /*
505          * Check if the file is an uncompressed kernel file (ELF) and load it,
506          * saving the PVH entry point used by the x86/HVM direct boot ABI.
507          * If load_elfboot() is successful, populate the fw_cfg info.
508          */
509         if (pvh_enabled &&
510             load_elfboot(kernel_filename, kernel_size,
511                          header, pvh_start_addr, fw_cfg)) {
512             fclose(f);
513 
514             fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE,
515                 strlen(kernel_cmdline) + 1);
516             fw_cfg_add_string(fw_cfg, FW_CFG_CMDLINE_DATA, kernel_cmdline);
517 
518             fw_cfg_add_i32(fw_cfg, FW_CFG_SETUP_SIZE, sizeof(header));
519             fw_cfg_add_bytes(fw_cfg, FW_CFG_SETUP_DATA,
520                              header, sizeof(header));
521 
522             /* load initrd */
523             if (initrd_filename) {
524                 GMappedFile *mapped_file;
525                 gsize initrd_size;
526                 gchar *initrd_data;
527                 GError *gerr = NULL;
528 
529                 mapped_file = g_mapped_file_new(initrd_filename, false, &gerr);
530                 if (!mapped_file) {
531                     fprintf(stderr, "qemu: error reading initrd %s: %s\n",
532                             initrd_filename, gerr->message);
533                     exit(1);
534                 }
535                 x86ms->initrd_mapped_file = mapped_file;
536 
537                 initrd_data = g_mapped_file_get_contents(mapped_file);
538                 initrd_size = g_mapped_file_get_length(mapped_file);
539                 initrd_max = x86ms->below_4g_mem_size - acpi_data_size - 1;
540                 if (initrd_size >= initrd_max) {
541                     fprintf(stderr, "qemu: initrd is too large, cannot support."
542                             "(max: %"PRIu32", need %"PRId64")\n",
543                             initrd_max, (uint64_t)initrd_size);
544                     exit(1);
545                 }
546 
547                 initrd_addr = (initrd_max - initrd_size) & ~4095;
548 
549                 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_addr);
550                 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
551                 fw_cfg_add_bytes(fw_cfg, FW_CFG_INITRD_DATA, initrd_data,
552                                  initrd_size);
553             }
554 
555             option_rom[nb_option_roms].bootindex = 0;
556             option_rom[nb_option_roms].name = "pvh.bin";
557             nb_option_roms++;
558 
559             return;
560         }
561         protocol = 0;
562     }
563 
564     if (protocol < 0x200 || !(header[0x211] & 0x01)) {
565         /* Low kernel */
566         real_addr    = 0x90000;
567         cmdline_addr = 0x9a000 - cmdline_size;
568         prot_addr    = 0x10000;
569     } else if (protocol < 0x202) {
570         /* High but ancient kernel */
571         real_addr    = 0x90000;
572         cmdline_addr = 0x9a000 - cmdline_size;
573         prot_addr    = 0x100000;
574     } else {
575         /* High and recent kernel */
576         real_addr    = 0x10000;
577         cmdline_addr = 0x20000;
578         prot_addr    = 0x100000;
579     }
580 
581     /* highest address for loading the initrd */
582     if (protocol >= 0x20c &&
583         lduw_p(header + 0x236) & XLF_CAN_BE_LOADED_ABOVE_4G) {
584         /*
585          * Linux has supported initrd up to 4 GB for a very long time (2007,
586          * long before XLF_CAN_BE_LOADED_ABOVE_4G which was added in 2013),
587          * though it only sets initrd_max to 2 GB to "work around bootloader
588          * bugs". Luckily, QEMU firmware(which does something like bootloader)
589          * has supported this.
590          *
591          * It's believed that if XLF_CAN_BE_LOADED_ABOVE_4G is set, initrd can
592          * be loaded into any address.
593          *
594          * In addition, initrd_max is uint32_t simply because QEMU doesn't
595          * support the 64-bit boot protocol (specifically the ext_ramdisk_image
596          * field).
597          *
598          * Therefore here just limit initrd_max to UINT32_MAX simply as well.
599          */
600         initrd_max = UINT32_MAX;
601     } else if (protocol >= 0x203) {
602         initrd_max = ldl_p(header + 0x22c);
603     } else {
604         initrd_max = 0x37ffffff;
605     }
606 
607     if (initrd_max >= x86ms->below_4g_mem_size - acpi_data_size) {
608         initrd_max = x86ms->below_4g_mem_size - acpi_data_size - 1;
609     }
610 
611     fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_ADDR, cmdline_addr);
612     fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE, strlen(kernel_cmdline) + 1);
613     fw_cfg_add_string(fw_cfg, FW_CFG_CMDLINE_DATA, kernel_cmdline);
614 
615     if (protocol >= 0x202) {
616         stl_p(header + 0x228, cmdline_addr);
617     } else {
618         stw_p(header + 0x20, 0xA33F);
619         stw_p(header + 0x22, cmdline_addr - real_addr);
620     }
621 
622     /* handle vga= parameter */
623     vmode = strstr(kernel_cmdline, "vga=");
624     if (vmode) {
625         unsigned int video_mode;
626         const char *end;
627         int ret;
628         /* skip "vga=" */
629         vmode += 4;
630         if (!strncmp(vmode, "normal", 6)) {
631             video_mode = 0xffff;
632         } else if (!strncmp(vmode, "ext", 3)) {
633             video_mode = 0xfffe;
634         } else if (!strncmp(vmode, "ask", 3)) {
635             video_mode = 0xfffd;
636         } else {
637             ret = qemu_strtoui(vmode, &end, 0, &video_mode);
638             if (ret != 0 || (*end && *end != ' ')) {
639                 fprintf(stderr, "qemu: invalid 'vga=' kernel parameter.\n");
640                 exit(1);
641             }
642         }
643         stw_p(header + 0x1fa, video_mode);
644     }
645 
646     /* loader type */
647     /*
648      * High nybble = B reserved for QEMU; low nybble is revision number.
649      * If this code is substantially changed, you may want to consider
650      * incrementing the revision.
651      */
652     if (protocol >= 0x200) {
653         header[0x210] = 0xB0;
654     }
655     /* heap */
656     if (protocol >= 0x201) {
657         header[0x211] |= 0x80; /* CAN_USE_HEAP */
658         stw_p(header + 0x224, cmdline_addr - real_addr - 0x200);
659     }
660 
661     /* load initrd */
662     if (initrd_filename) {
663         GMappedFile *mapped_file;
664         gsize initrd_size;
665         gchar *initrd_data;
666         GError *gerr = NULL;
667 
668         if (protocol < 0x200) {
669             fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
670             exit(1);
671         }
672 
673         mapped_file = g_mapped_file_new(initrd_filename, false, &gerr);
674         if (!mapped_file) {
675             fprintf(stderr, "qemu: error reading initrd %s: %s\n",
676                     initrd_filename, gerr->message);
677             exit(1);
678         }
679         x86ms->initrd_mapped_file = mapped_file;
680 
681         initrd_data = g_mapped_file_get_contents(mapped_file);
682         initrd_size = g_mapped_file_get_length(mapped_file);
683         if (initrd_size >= initrd_max) {
684             fprintf(stderr, "qemu: initrd is too large, cannot support."
685                     "(max: %"PRIu32", need %"PRId64")\n",
686                     initrd_max, (uint64_t)initrd_size);
687             exit(1);
688         }
689 
690         initrd_addr = (initrd_max - initrd_size) & ~4095;
691 
692         fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_addr);
693         fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
694         fw_cfg_add_bytes(fw_cfg, FW_CFG_INITRD_DATA, initrd_data, initrd_size);
695 
696         stl_p(header + 0x218, initrd_addr);
697         stl_p(header + 0x21c, initrd_size);
698     }
699 
700     /* load kernel and setup */
701     setup_size = header[0x1f1];
702     if (setup_size == 0) {
703         setup_size = 4;
704     }
705     setup_size = (setup_size + 1) * 512;
706     if (setup_size > kernel_size) {
707         fprintf(stderr, "qemu: invalid kernel header\n");
708         exit(1);
709     }
710     kernel_size -= setup_size;
711 
712     setup  = g_malloc(setup_size);
713     kernel = g_malloc(kernel_size);
714     fseek(f, 0, SEEK_SET);
715     if (fread(setup, 1, setup_size, f) != setup_size) {
716         fprintf(stderr, "fread() failed\n");
717         exit(1);
718     }
719     if (fread(kernel, 1, kernel_size, f) != kernel_size) {
720         fprintf(stderr, "fread() failed\n");
721         exit(1);
722     }
723     fclose(f);
724 
725     /* append dtb to kernel */
726     if (dtb_filename) {
727         if (protocol < 0x209) {
728             fprintf(stderr, "qemu: Linux kernel too old to load a dtb\n");
729             exit(1);
730         }
731 
732         dtb_size = get_image_size(dtb_filename);
733         if (dtb_size <= 0) {
734             fprintf(stderr, "qemu: error reading dtb %s: %s\n",
735                     dtb_filename, strerror(errno));
736             exit(1);
737         }
738 
739         setup_data_offset = QEMU_ALIGN_UP(kernel_size, 16);
740         kernel_size = setup_data_offset + sizeof(struct setup_data) + dtb_size;
741         kernel = g_realloc(kernel, kernel_size);
742 
743         stq_p(header + 0x250, prot_addr + setup_data_offset);
744 
745         setup_data = (struct setup_data *)(kernel + setup_data_offset);
746         setup_data->next = 0;
747         setup_data->type = cpu_to_le32(SETUP_DTB);
748         setup_data->len = cpu_to_le32(dtb_size);
749 
750         load_image_size(dtb_filename, setup_data->data, dtb_size);
751     }
752 
753     memcpy(setup, header, MIN(sizeof(header), setup_size));
754 
755     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, prot_addr);
756     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
757     fw_cfg_add_bytes(fw_cfg, FW_CFG_KERNEL_DATA, kernel, kernel_size);
758 
759     fw_cfg_add_i32(fw_cfg, FW_CFG_SETUP_ADDR, real_addr);
760     fw_cfg_add_i32(fw_cfg, FW_CFG_SETUP_SIZE, setup_size);
761     fw_cfg_add_bytes(fw_cfg, FW_CFG_SETUP_DATA, setup, setup_size);
762 
763     option_rom[nb_option_roms].bootindex = 0;
764     option_rom[nb_option_roms].name = "linuxboot.bin";
765     if (linuxboot_dma_enabled && fw_cfg_dma_enabled(fw_cfg)) {
766         option_rom[nb_option_roms].name = "linuxboot_dma.bin";
767     }
768     nb_option_roms++;
769 }
770 
771 void x86_bios_rom_init(MemoryRegion *rom_memory, bool isapc_ram_fw)
772 {
773     char *filename;
774     MemoryRegion *bios, *isa_bios;
775     int bios_size, isa_bios_size;
776     int ret;
777 
778     /* BIOS load */
779     if (bios_name == NULL) {
780         bios_name = BIOS_FILENAME;
781     }
782     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
783     if (filename) {
784         bios_size = get_image_size(filename);
785     } else {
786         bios_size = -1;
787     }
788     if (bios_size <= 0 ||
789         (bios_size % 65536) != 0) {
790         goto bios_error;
791     }
792     bios = g_malloc(sizeof(*bios));
793     memory_region_init_ram(bios, NULL, "pc.bios", bios_size, &error_fatal);
794     if (!isapc_ram_fw) {
795         memory_region_set_readonly(bios, true);
796     }
797     ret = rom_add_file_fixed(bios_name, (uint32_t)(-bios_size), -1);
798     if (ret != 0) {
799     bios_error:
800         fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", bios_name);
801         exit(1);
802     }
803     g_free(filename);
804 
805     /* map the last 128KB of the BIOS in ISA space */
806     isa_bios_size = MIN(bios_size, 128 * KiB);
807     isa_bios = g_malloc(sizeof(*isa_bios));
808     memory_region_init_alias(isa_bios, NULL, "isa-bios", bios,
809                              bios_size - isa_bios_size, isa_bios_size);
810     memory_region_add_subregion_overlap(rom_memory,
811                                         0x100000 - isa_bios_size,
812                                         isa_bios,
813                                         1);
814     if (!isapc_ram_fw) {
815         memory_region_set_readonly(isa_bios, true);
816     }
817 
818     /* map all the bios at the top of memory */
819     memory_region_add_subregion(rom_memory,
820                                 (uint32_t)(-bios_size),
821                                 bios);
822 }
823 
824 bool x86_machine_is_smm_enabled(X86MachineState *x86ms)
825 {
826     bool smm_available = false;
827 
828     if (x86ms->smm == ON_OFF_AUTO_OFF) {
829         return false;
830     }
831 
832     if (tcg_enabled() || qtest_enabled()) {
833         smm_available = true;
834     } else if (kvm_enabled()) {
835         smm_available = kvm_has_smm();
836     }
837 
838     if (smm_available) {
839         return true;
840     }
841 
842     if (x86ms->smm == ON_OFF_AUTO_ON) {
843         error_report("System Management Mode not supported by this hypervisor.");
844         exit(1);
845     }
846     return false;
847 }
848 
849 static void x86_machine_get_smm(Object *obj, Visitor *v, const char *name,
850                                void *opaque, Error **errp)
851 {
852     X86MachineState *x86ms = X86_MACHINE(obj);
853     OnOffAuto smm = x86ms->smm;
854 
855     visit_type_OnOffAuto(v, name, &smm, errp);
856 }
857 
858 static void x86_machine_set_smm(Object *obj, Visitor *v, const char *name,
859                                void *opaque, Error **errp)
860 {
861     X86MachineState *x86ms = X86_MACHINE(obj);
862 
863     visit_type_OnOffAuto(v, name, &x86ms->smm, errp);
864 }
865 
866 bool x86_machine_is_acpi_enabled(X86MachineState *x86ms)
867 {
868     if (x86ms->acpi == ON_OFF_AUTO_OFF) {
869         return false;
870     }
871     return true;
872 }
873 
874 static void x86_machine_get_acpi(Object *obj, Visitor *v, const char *name,
875                                  void *opaque, Error **errp)
876 {
877     X86MachineState *x86ms = X86_MACHINE(obj);
878     OnOffAuto acpi = x86ms->acpi;
879 
880     visit_type_OnOffAuto(v, name, &acpi, errp);
881 }
882 
883 static void x86_machine_set_acpi(Object *obj, Visitor *v, const char *name,
884                                  void *opaque, Error **errp)
885 {
886     X86MachineState *x86ms = X86_MACHINE(obj);
887 
888     visit_type_OnOffAuto(v, name, &x86ms->acpi, errp);
889 }
890 
891 static void x86_machine_initfn(Object *obj)
892 {
893     X86MachineState *x86ms = X86_MACHINE(obj);
894 
895     x86ms->smm = ON_OFF_AUTO_AUTO;
896     x86ms->acpi = ON_OFF_AUTO_AUTO;
897     x86ms->smp_dies = 1;
898 }
899 
900 static void x86_machine_class_init(ObjectClass *oc, void *data)
901 {
902     MachineClass *mc = MACHINE_CLASS(oc);
903     X86MachineClass *x86mc = X86_MACHINE_CLASS(oc);
904     NMIClass *nc = NMI_CLASS(oc);
905 
906     mc->cpu_index_to_instance_props = x86_cpu_index_to_props;
907     mc->get_default_cpu_node_id = x86_get_default_cpu_node_id;
908     mc->possible_cpu_arch_ids = x86_possible_cpu_arch_ids;
909     x86mc->compat_apic_id_mode = false;
910     x86mc->save_tsc_khz = true;
911     nc->nmi_monitor_handler = x86_nmi;
912 
913     object_class_property_add(oc, X86_MACHINE_SMM, "OnOffAuto",
914         x86_machine_get_smm, x86_machine_set_smm,
915         NULL, NULL);
916     object_class_property_set_description(oc, X86_MACHINE_SMM,
917         "Enable SMM");
918 
919     object_class_property_add(oc, X86_MACHINE_ACPI, "OnOffAuto",
920         x86_machine_get_acpi, x86_machine_set_acpi,
921         NULL, NULL);
922     object_class_property_set_description(oc, X86_MACHINE_ACPI,
923         "Enable ACPI");
924 }
925 
926 static const TypeInfo x86_machine_info = {
927     .name = TYPE_X86_MACHINE,
928     .parent = TYPE_MACHINE,
929     .abstract = true,
930     .instance_size = sizeof(X86MachineState),
931     .instance_init = x86_machine_initfn,
932     .class_size = sizeof(X86MachineClass),
933     .class_init = x86_machine_class_init,
934     .interfaces = (InterfaceInfo[]) {
935          { TYPE_NMI },
936          { }
937     },
938 };
939 
940 static void x86_machine_register_types(void)
941 {
942     type_register_static(&x86_machine_info);
943 }
944 
945 type_init(x86_machine_register_types)
946