1 /* 2 * Copyright (c) 2003-2004 Fabrice Bellard 3 * Copyright (c) 2019 Red Hat, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a copy 6 * of this software and associated documentation files (the "Software"), to deal 7 * in the Software without restriction, including without limitation the rights 8 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 9 * copies of the Software, and to permit persons to whom the Software is 10 * furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 21 * THE SOFTWARE. 22 */ 23 #include "qemu/osdep.h" 24 #include "qemu/error-report.h" 25 #include "qemu/option.h" 26 #include "qemu/cutils.h" 27 #include "qemu/units.h" 28 #include "qemu/datadir.h" 29 #include "qapi/error.h" 30 #include "qapi/qapi-visit-common.h" 31 #include "qapi/clone-visitor.h" 32 #include "qapi/qapi-visit-machine.h" 33 #include "qapi/visitor.h" 34 #include "sysemu/qtest.h" 35 #include "sysemu/whpx.h" 36 #include "sysemu/numa.h" 37 #include "sysemu/replay.h" 38 #include "sysemu/sysemu.h" 39 #include "sysemu/cpu-timers.h" 40 #include "sysemu/xen.h" 41 #include "trace.h" 42 43 #include "hw/i386/x86.h" 44 #include "target/i386/cpu.h" 45 #include "hw/i386/topology.h" 46 #include "hw/i386/fw_cfg.h" 47 #include "hw/intc/i8259.h" 48 #include "hw/rtc/mc146818rtc.h" 49 #include "target/i386/sev.h" 50 51 #include "hw/acpi/cpu_hotplug.h" 52 #include "hw/irq.h" 53 #include "hw/nmi.h" 54 #include "hw/loader.h" 55 #include "multiboot.h" 56 #include "elf.h" 57 #include "standard-headers/asm-x86/bootparam.h" 58 #include CONFIG_DEVICES 59 #include "kvm/kvm_i386.h" 60 61 /* Physical Address of PVH entry point read from kernel ELF NOTE */ 62 static size_t pvh_start_addr; 63 64 static void init_topo_info(X86CPUTopoInfo *topo_info, 65 const X86MachineState *x86ms) 66 { 67 MachineState *ms = MACHINE(x86ms); 68 69 topo_info->dies_per_pkg = ms->smp.dies; 70 topo_info->cores_per_die = ms->smp.cores; 71 topo_info->threads_per_core = ms->smp.threads; 72 } 73 74 /* 75 * Calculates initial APIC ID for a specific CPU index 76 * 77 * Currently we need to be able to calculate the APIC ID from the CPU index 78 * alone (without requiring a CPU object), as the QEMU<->Seabios interfaces have 79 * no concept of "CPU index", and the NUMA tables on fw_cfg need the APIC ID of 80 * all CPUs up to max_cpus. 81 */ 82 uint32_t x86_cpu_apic_id_from_index(X86MachineState *x86ms, 83 unsigned int cpu_index) 84 { 85 X86CPUTopoInfo topo_info; 86 87 init_topo_info(&topo_info, x86ms); 88 89 return x86_apicid_from_cpu_idx(&topo_info, cpu_index); 90 } 91 92 93 void x86_cpu_new(X86MachineState *x86ms, int64_t apic_id, Error **errp) 94 { 95 Object *cpu = object_new(MACHINE(x86ms)->cpu_type); 96 97 if (!object_property_set_uint(cpu, "apic-id", apic_id, errp)) { 98 goto out; 99 } 100 qdev_realize(DEVICE(cpu), NULL, errp); 101 102 out: 103 object_unref(cpu); 104 } 105 106 void x86_cpus_init(X86MachineState *x86ms, int default_cpu_version) 107 { 108 int i; 109 const CPUArchIdList *possible_cpus; 110 MachineState *ms = MACHINE(x86ms); 111 MachineClass *mc = MACHINE_GET_CLASS(x86ms); 112 113 x86_cpu_set_default_version(default_cpu_version); 114 115 /* 116 * Calculates the limit to CPU APIC ID values 117 * 118 * Limit for the APIC ID value, so that all 119 * CPU APIC IDs are < x86ms->apic_id_limit. 120 * 121 * This is used for FW_CFG_MAX_CPUS. See comments on fw_cfg_arch_create(). 122 */ 123 x86ms->apic_id_limit = x86_cpu_apic_id_from_index(x86ms, 124 ms->smp.max_cpus - 1) + 1; 125 126 /* 127 * Can we support APIC ID 255 or higher? 128 * 129 * Under Xen: yes. 130 * With userspace emulated lapic: no 131 * With KVM's in-kernel lapic: only if X2APIC API is enabled. 132 */ 133 if (x86ms->apic_id_limit > 255 && !xen_enabled() && 134 (!kvm_irqchip_in_kernel() || !kvm_enable_x2apic())) { 135 error_report("current -smp configuration requires kernel " 136 "irqchip and X2APIC API support."); 137 exit(EXIT_FAILURE); 138 } 139 140 if (kvm_enabled()) { 141 kvm_set_max_apic_id(x86ms->apic_id_limit); 142 } 143 144 possible_cpus = mc->possible_cpu_arch_ids(ms); 145 for (i = 0; i < ms->smp.cpus; i++) { 146 x86_cpu_new(x86ms, possible_cpus->cpus[i].arch_id, &error_fatal); 147 } 148 } 149 150 void x86_rtc_set_cpus_count(ISADevice *s, uint16_t cpus_count) 151 { 152 MC146818RtcState *rtc = MC146818_RTC(s); 153 154 if (cpus_count > 0xff) { 155 /* 156 * If the number of CPUs can't be represented in 8 bits, the 157 * BIOS must use "FW_CFG_NB_CPUS". Set RTC field to 0 just 158 * to make old BIOSes fail more predictably. 159 */ 160 mc146818rtc_set_cmos_data(rtc, 0x5f, 0); 161 } else { 162 mc146818rtc_set_cmos_data(rtc, 0x5f, cpus_count - 1); 163 } 164 } 165 166 static int x86_apic_cmp(const void *a, const void *b) 167 { 168 CPUArchId *apic_a = (CPUArchId *)a; 169 CPUArchId *apic_b = (CPUArchId *)b; 170 171 return apic_a->arch_id - apic_b->arch_id; 172 } 173 174 /* 175 * returns pointer to CPUArchId descriptor that matches CPU's apic_id 176 * in ms->possible_cpus->cpus, if ms->possible_cpus->cpus has no 177 * entry corresponding to CPU's apic_id returns NULL. 178 */ 179 CPUArchId *x86_find_cpu_slot(MachineState *ms, uint32_t id, int *idx) 180 { 181 CPUArchId apic_id, *found_cpu; 182 183 apic_id.arch_id = id; 184 found_cpu = bsearch(&apic_id, ms->possible_cpus->cpus, 185 ms->possible_cpus->len, sizeof(*ms->possible_cpus->cpus), 186 x86_apic_cmp); 187 if (found_cpu && idx) { 188 *idx = found_cpu - ms->possible_cpus->cpus; 189 } 190 return found_cpu; 191 } 192 193 void x86_cpu_plug(HotplugHandler *hotplug_dev, 194 DeviceState *dev, Error **errp) 195 { 196 CPUArchId *found_cpu; 197 Error *local_err = NULL; 198 X86CPU *cpu = X86_CPU(dev); 199 X86MachineState *x86ms = X86_MACHINE(hotplug_dev); 200 201 if (x86ms->acpi_dev) { 202 hotplug_handler_plug(x86ms->acpi_dev, dev, &local_err); 203 if (local_err) { 204 goto out; 205 } 206 } 207 208 /* increment the number of CPUs */ 209 x86ms->boot_cpus++; 210 if (x86ms->rtc) { 211 x86_rtc_set_cpus_count(x86ms->rtc, x86ms->boot_cpus); 212 } 213 if (x86ms->fw_cfg) { 214 fw_cfg_modify_i16(x86ms->fw_cfg, FW_CFG_NB_CPUS, x86ms->boot_cpus); 215 } 216 217 found_cpu = x86_find_cpu_slot(MACHINE(x86ms), cpu->apic_id, NULL); 218 found_cpu->cpu = OBJECT(dev); 219 out: 220 error_propagate(errp, local_err); 221 } 222 223 void x86_cpu_unplug_request_cb(HotplugHandler *hotplug_dev, 224 DeviceState *dev, Error **errp) 225 { 226 int idx = -1; 227 X86CPU *cpu = X86_CPU(dev); 228 X86MachineState *x86ms = X86_MACHINE(hotplug_dev); 229 230 if (!x86ms->acpi_dev) { 231 error_setg(errp, "CPU hot unplug not supported without ACPI"); 232 return; 233 } 234 235 x86_find_cpu_slot(MACHINE(x86ms), cpu->apic_id, &idx); 236 assert(idx != -1); 237 if (idx == 0) { 238 error_setg(errp, "Boot CPU is unpluggable"); 239 return; 240 } 241 242 hotplug_handler_unplug_request(x86ms->acpi_dev, dev, 243 errp); 244 } 245 246 void x86_cpu_unplug_cb(HotplugHandler *hotplug_dev, 247 DeviceState *dev, Error **errp) 248 { 249 CPUArchId *found_cpu; 250 Error *local_err = NULL; 251 X86CPU *cpu = X86_CPU(dev); 252 X86MachineState *x86ms = X86_MACHINE(hotplug_dev); 253 254 hotplug_handler_unplug(x86ms->acpi_dev, dev, &local_err); 255 if (local_err) { 256 goto out; 257 } 258 259 found_cpu = x86_find_cpu_slot(MACHINE(x86ms), cpu->apic_id, NULL); 260 found_cpu->cpu = NULL; 261 qdev_unrealize(dev); 262 263 /* decrement the number of CPUs */ 264 x86ms->boot_cpus--; 265 /* Update the number of CPUs in CMOS */ 266 x86_rtc_set_cpus_count(x86ms->rtc, x86ms->boot_cpus); 267 fw_cfg_modify_i16(x86ms->fw_cfg, FW_CFG_NB_CPUS, x86ms->boot_cpus); 268 out: 269 error_propagate(errp, local_err); 270 } 271 272 void x86_cpu_pre_plug(HotplugHandler *hotplug_dev, 273 DeviceState *dev, Error **errp) 274 { 275 int idx; 276 CPUState *cs; 277 CPUArchId *cpu_slot; 278 X86CPUTopoIDs topo_ids; 279 X86CPU *cpu = X86_CPU(dev); 280 CPUX86State *env = &cpu->env; 281 MachineState *ms = MACHINE(hotplug_dev); 282 X86MachineState *x86ms = X86_MACHINE(hotplug_dev); 283 unsigned int smp_cores = ms->smp.cores; 284 unsigned int smp_threads = ms->smp.threads; 285 X86CPUTopoInfo topo_info; 286 287 if (!object_dynamic_cast(OBJECT(cpu), ms->cpu_type)) { 288 error_setg(errp, "Invalid CPU type, expected cpu type: '%s'", 289 ms->cpu_type); 290 return; 291 } 292 293 if (x86ms->acpi_dev) { 294 Error *local_err = NULL; 295 296 hotplug_handler_pre_plug(HOTPLUG_HANDLER(x86ms->acpi_dev), dev, 297 &local_err); 298 if (local_err) { 299 error_propagate(errp, local_err); 300 return; 301 } 302 } 303 304 init_topo_info(&topo_info, x86ms); 305 306 env->nr_dies = ms->smp.dies; 307 308 /* 309 * If APIC ID is not set, 310 * set it based on socket/die/core/thread properties. 311 */ 312 if (cpu->apic_id == UNASSIGNED_APIC_ID) { 313 int max_socket = (ms->smp.max_cpus - 1) / 314 smp_threads / smp_cores / ms->smp.dies; 315 316 /* 317 * die-id was optional in QEMU 4.0 and older, so keep it optional 318 * if there's only one die per socket. 319 */ 320 if (cpu->die_id < 0 && ms->smp.dies == 1) { 321 cpu->die_id = 0; 322 } 323 324 if (cpu->socket_id < 0) { 325 error_setg(errp, "CPU socket-id is not set"); 326 return; 327 } else if (cpu->socket_id > max_socket) { 328 error_setg(errp, "Invalid CPU socket-id: %u must be in range 0:%u", 329 cpu->socket_id, max_socket); 330 return; 331 } 332 if (cpu->die_id < 0) { 333 error_setg(errp, "CPU die-id is not set"); 334 return; 335 } else if (cpu->die_id > ms->smp.dies - 1) { 336 error_setg(errp, "Invalid CPU die-id: %u must be in range 0:%u", 337 cpu->die_id, ms->smp.dies - 1); 338 return; 339 } 340 if (cpu->core_id < 0) { 341 error_setg(errp, "CPU core-id is not set"); 342 return; 343 } else if (cpu->core_id > (smp_cores - 1)) { 344 error_setg(errp, "Invalid CPU core-id: %u must be in range 0:%u", 345 cpu->core_id, smp_cores - 1); 346 return; 347 } 348 if (cpu->thread_id < 0) { 349 error_setg(errp, "CPU thread-id is not set"); 350 return; 351 } else if (cpu->thread_id > (smp_threads - 1)) { 352 error_setg(errp, "Invalid CPU thread-id: %u must be in range 0:%u", 353 cpu->thread_id, smp_threads - 1); 354 return; 355 } 356 357 topo_ids.pkg_id = cpu->socket_id; 358 topo_ids.die_id = cpu->die_id; 359 topo_ids.core_id = cpu->core_id; 360 topo_ids.smt_id = cpu->thread_id; 361 cpu->apic_id = x86_apicid_from_topo_ids(&topo_info, &topo_ids); 362 } 363 364 cpu_slot = x86_find_cpu_slot(MACHINE(x86ms), cpu->apic_id, &idx); 365 if (!cpu_slot) { 366 MachineState *ms = MACHINE(x86ms); 367 368 x86_topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids); 369 error_setg(errp, 370 "Invalid CPU [socket: %u, die: %u, core: %u, thread: %u] with" 371 " APIC ID %" PRIu32 ", valid index range 0:%d", 372 topo_ids.pkg_id, topo_ids.die_id, topo_ids.core_id, topo_ids.smt_id, 373 cpu->apic_id, ms->possible_cpus->len - 1); 374 return; 375 } 376 377 if (cpu_slot->cpu) { 378 error_setg(errp, "CPU[%d] with APIC ID %" PRIu32 " exists", 379 idx, cpu->apic_id); 380 return; 381 } 382 383 /* if 'address' properties socket-id/core-id/thread-id are not set, set them 384 * so that machine_query_hotpluggable_cpus would show correct values 385 */ 386 /* TODO: move socket_id/core_id/thread_id checks into x86_cpu_realizefn() 387 * once -smp refactoring is complete and there will be CPU private 388 * CPUState::nr_cores and CPUState::nr_threads fields instead of globals */ 389 x86_topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids); 390 if (cpu->socket_id != -1 && cpu->socket_id != topo_ids.pkg_id) { 391 error_setg(errp, "property socket-id: %u doesn't match set apic-id:" 392 " 0x%x (socket-id: %u)", cpu->socket_id, cpu->apic_id, 393 topo_ids.pkg_id); 394 return; 395 } 396 cpu->socket_id = topo_ids.pkg_id; 397 398 if (cpu->die_id != -1 && cpu->die_id != topo_ids.die_id) { 399 error_setg(errp, "property die-id: %u doesn't match set apic-id:" 400 " 0x%x (die-id: %u)", cpu->die_id, cpu->apic_id, topo_ids.die_id); 401 return; 402 } 403 cpu->die_id = topo_ids.die_id; 404 405 if (cpu->core_id != -1 && cpu->core_id != topo_ids.core_id) { 406 error_setg(errp, "property core-id: %u doesn't match set apic-id:" 407 " 0x%x (core-id: %u)", cpu->core_id, cpu->apic_id, 408 topo_ids.core_id); 409 return; 410 } 411 cpu->core_id = topo_ids.core_id; 412 413 if (cpu->thread_id != -1 && cpu->thread_id != topo_ids.smt_id) { 414 error_setg(errp, "property thread-id: %u doesn't match set apic-id:" 415 " 0x%x (thread-id: %u)", cpu->thread_id, cpu->apic_id, 416 topo_ids.smt_id); 417 return; 418 } 419 cpu->thread_id = topo_ids.smt_id; 420 421 if (hyperv_feat_enabled(cpu, HYPERV_FEAT_VPINDEX) && 422 !kvm_hv_vpindex_settable()) { 423 error_setg(errp, "kernel doesn't allow setting HyperV VP_INDEX"); 424 return; 425 } 426 427 cs = CPU(cpu); 428 cs->cpu_index = idx; 429 430 numa_cpu_pre_plug(cpu_slot, dev, errp); 431 } 432 433 CpuInstanceProperties 434 x86_cpu_index_to_props(MachineState *ms, unsigned cpu_index) 435 { 436 MachineClass *mc = MACHINE_GET_CLASS(ms); 437 const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(ms); 438 439 assert(cpu_index < possible_cpus->len); 440 return possible_cpus->cpus[cpu_index].props; 441 } 442 443 int64_t x86_get_default_cpu_node_id(const MachineState *ms, int idx) 444 { 445 X86CPUTopoIDs topo_ids; 446 X86MachineState *x86ms = X86_MACHINE(ms); 447 X86CPUTopoInfo topo_info; 448 449 init_topo_info(&topo_info, x86ms); 450 451 assert(idx < ms->possible_cpus->len); 452 x86_topo_ids_from_apicid(ms->possible_cpus->cpus[idx].arch_id, 453 &topo_info, &topo_ids); 454 return topo_ids.pkg_id % ms->numa_state->num_nodes; 455 } 456 457 const CPUArchIdList *x86_possible_cpu_arch_ids(MachineState *ms) 458 { 459 X86MachineState *x86ms = X86_MACHINE(ms); 460 unsigned int max_cpus = ms->smp.max_cpus; 461 X86CPUTopoInfo topo_info; 462 int i; 463 464 if (ms->possible_cpus) { 465 /* 466 * make sure that max_cpus hasn't changed since the first use, i.e. 467 * -smp hasn't been parsed after it 468 */ 469 assert(ms->possible_cpus->len == max_cpus); 470 return ms->possible_cpus; 471 } 472 473 ms->possible_cpus = g_malloc0(sizeof(CPUArchIdList) + 474 sizeof(CPUArchId) * max_cpus); 475 ms->possible_cpus->len = max_cpus; 476 477 init_topo_info(&topo_info, x86ms); 478 479 for (i = 0; i < ms->possible_cpus->len; i++) { 480 X86CPUTopoIDs topo_ids; 481 482 ms->possible_cpus->cpus[i].type = ms->cpu_type; 483 ms->possible_cpus->cpus[i].vcpus_count = 1; 484 ms->possible_cpus->cpus[i].arch_id = 485 x86_cpu_apic_id_from_index(x86ms, i); 486 x86_topo_ids_from_apicid(ms->possible_cpus->cpus[i].arch_id, 487 &topo_info, &topo_ids); 488 ms->possible_cpus->cpus[i].props.has_socket_id = true; 489 ms->possible_cpus->cpus[i].props.socket_id = topo_ids.pkg_id; 490 if (ms->smp.dies > 1) { 491 ms->possible_cpus->cpus[i].props.has_die_id = true; 492 ms->possible_cpus->cpus[i].props.die_id = topo_ids.die_id; 493 } 494 ms->possible_cpus->cpus[i].props.has_core_id = true; 495 ms->possible_cpus->cpus[i].props.core_id = topo_ids.core_id; 496 ms->possible_cpus->cpus[i].props.has_thread_id = true; 497 ms->possible_cpus->cpus[i].props.thread_id = topo_ids.smt_id; 498 } 499 return ms->possible_cpus; 500 } 501 502 static void x86_nmi(NMIState *n, int cpu_index, Error **errp) 503 { 504 /* cpu index isn't used */ 505 CPUState *cs; 506 507 CPU_FOREACH(cs) { 508 X86CPU *cpu = X86_CPU(cs); 509 510 if (!cpu->apic_state) { 511 cpu_interrupt(cs, CPU_INTERRUPT_NMI); 512 } else { 513 apic_deliver_nmi(cpu->apic_state); 514 } 515 } 516 } 517 518 static long get_file_size(FILE *f) 519 { 520 long where, size; 521 522 /* XXX: on Unix systems, using fstat() probably makes more sense */ 523 524 where = ftell(f); 525 fseek(f, 0, SEEK_END); 526 size = ftell(f); 527 fseek(f, where, SEEK_SET); 528 529 return size; 530 } 531 532 /* TSC handling */ 533 uint64_t cpu_get_tsc(CPUX86State *env) 534 { 535 return cpus_get_elapsed_ticks(); 536 } 537 538 /* IRQ handling */ 539 static void pic_irq_request(void *opaque, int irq, int level) 540 { 541 CPUState *cs = first_cpu; 542 X86CPU *cpu = X86_CPU(cs); 543 544 trace_x86_pic_interrupt(irq, level); 545 if (cpu->apic_state && !kvm_irqchip_in_kernel() && 546 !whpx_apic_in_platform()) { 547 CPU_FOREACH(cs) { 548 cpu = X86_CPU(cs); 549 if (apic_accept_pic_intr(cpu->apic_state)) { 550 apic_deliver_pic_intr(cpu->apic_state, level); 551 } 552 } 553 } else { 554 if (level) { 555 cpu_interrupt(cs, CPU_INTERRUPT_HARD); 556 } else { 557 cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); 558 } 559 } 560 } 561 562 qemu_irq x86_allocate_cpu_irq(void) 563 { 564 return qemu_allocate_irq(pic_irq_request, NULL, 0); 565 } 566 567 int cpu_get_pic_interrupt(CPUX86State *env) 568 { 569 X86CPU *cpu = env_archcpu(env); 570 int intno; 571 572 if (!kvm_irqchip_in_kernel() && !whpx_apic_in_platform()) { 573 intno = apic_get_interrupt(cpu->apic_state); 574 if (intno >= 0) { 575 return intno; 576 } 577 /* read the irq from the PIC */ 578 if (!apic_accept_pic_intr(cpu->apic_state)) { 579 return -1; 580 } 581 } 582 583 intno = pic_read_irq(isa_pic); 584 return intno; 585 } 586 587 DeviceState *cpu_get_current_apic(void) 588 { 589 if (current_cpu) { 590 X86CPU *cpu = X86_CPU(current_cpu); 591 return cpu->apic_state; 592 } else { 593 return NULL; 594 } 595 } 596 597 void gsi_handler(void *opaque, int n, int level) 598 { 599 GSIState *s = opaque; 600 601 trace_x86_gsi_interrupt(n, level); 602 switch (n) { 603 case 0 ... ISA_NUM_IRQS - 1: 604 if (s->i8259_irq[n]) { 605 /* Under KVM, Kernel will forward to both PIC and IOAPIC */ 606 qemu_set_irq(s->i8259_irq[n], level); 607 } 608 /* fall through */ 609 case ISA_NUM_IRQS ... IOAPIC_NUM_PINS - 1: 610 qemu_set_irq(s->ioapic_irq[n], level); 611 break; 612 case IO_APIC_SECONDARY_IRQBASE 613 ... IO_APIC_SECONDARY_IRQBASE + IOAPIC_NUM_PINS - 1: 614 qemu_set_irq(s->ioapic2_irq[n - IO_APIC_SECONDARY_IRQBASE], level); 615 break; 616 } 617 } 618 619 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name) 620 { 621 DeviceState *dev; 622 SysBusDevice *d; 623 unsigned int i; 624 625 assert(parent_name); 626 if (kvm_ioapic_in_kernel()) { 627 dev = qdev_new(TYPE_KVM_IOAPIC); 628 } else { 629 dev = qdev_new(TYPE_IOAPIC); 630 } 631 object_property_add_child(object_resolve_path(parent_name, NULL), 632 "ioapic", OBJECT(dev)); 633 d = SYS_BUS_DEVICE(dev); 634 sysbus_realize_and_unref(d, &error_fatal); 635 sysbus_mmio_map(d, 0, IO_APIC_DEFAULT_ADDRESS); 636 637 for (i = 0; i < IOAPIC_NUM_PINS; i++) { 638 gsi_state->ioapic_irq[i] = qdev_get_gpio_in(dev, i); 639 } 640 } 641 642 DeviceState *ioapic_init_secondary(GSIState *gsi_state) 643 { 644 DeviceState *dev; 645 SysBusDevice *d; 646 unsigned int i; 647 648 dev = qdev_new(TYPE_IOAPIC); 649 d = SYS_BUS_DEVICE(dev); 650 sysbus_realize_and_unref(d, &error_fatal); 651 sysbus_mmio_map(d, 0, IO_APIC_SECONDARY_ADDRESS); 652 653 for (i = 0; i < IOAPIC_NUM_PINS; i++) { 654 gsi_state->ioapic2_irq[i] = qdev_get_gpio_in(dev, i); 655 } 656 return dev; 657 } 658 659 struct setup_data { 660 uint64_t next; 661 uint32_t type; 662 uint32_t len; 663 uint8_t data[]; 664 } __attribute__((packed)); 665 666 667 /* 668 * The entry point into the kernel for PVH boot is different from 669 * the native entry point. The PVH entry is defined by the x86/HVM 670 * direct boot ABI and is available in an ELFNOTE in the kernel binary. 671 * 672 * This function is passed to load_elf() when it is called from 673 * load_elfboot() which then additionally checks for an ELF Note of 674 * type XEN_ELFNOTE_PHYS32_ENTRY and passes it to this function to 675 * parse the PVH entry address from the ELF Note. 676 * 677 * Due to trickery in elf_opts.h, load_elf() is actually available as 678 * load_elf32() or load_elf64() and this routine needs to be able 679 * to deal with being called as 32 or 64 bit. 680 * 681 * The address of the PVH entry point is saved to the 'pvh_start_addr' 682 * global variable. (although the entry point is 32-bit, the kernel 683 * binary can be either 32-bit or 64-bit). 684 */ 685 static uint64_t read_pvh_start_addr(void *arg1, void *arg2, bool is64) 686 { 687 size_t *elf_note_data_addr; 688 689 /* Check if ELF Note header passed in is valid */ 690 if (arg1 == NULL) { 691 return 0; 692 } 693 694 if (is64) { 695 struct elf64_note *nhdr64 = (struct elf64_note *)arg1; 696 uint64_t nhdr_size64 = sizeof(struct elf64_note); 697 uint64_t phdr_align = *(uint64_t *)arg2; 698 uint64_t nhdr_namesz = nhdr64->n_namesz; 699 700 elf_note_data_addr = 701 ((void *)nhdr64) + nhdr_size64 + 702 QEMU_ALIGN_UP(nhdr_namesz, phdr_align); 703 704 pvh_start_addr = *elf_note_data_addr; 705 } else { 706 struct elf32_note *nhdr32 = (struct elf32_note *)arg1; 707 uint32_t nhdr_size32 = sizeof(struct elf32_note); 708 uint32_t phdr_align = *(uint32_t *)arg2; 709 uint32_t nhdr_namesz = nhdr32->n_namesz; 710 711 elf_note_data_addr = 712 ((void *)nhdr32) + nhdr_size32 + 713 QEMU_ALIGN_UP(nhdr_namesz, phdr_align); 714 715 pvh_start_addr = *(uint32_t *)elf_note_data_addr; 716 } 717 718 return pvh_start_addr; 719 } 720 721 static bool load_elfboot(const char *kernel_filename, 722 int kernel_file_size, 723 uint8_t *header, 724 size_t pvh_xen_start_addr, 725 FWCfgState *fw_cfg) 726 { 727 uint32_t flags = 0; 728 uint32_t mh_load_addr = 0; 729 uint32_t elf_kernel_size = 0; 730 uint64_t elf_entry; 731 uint64_t elf_low, elf_high; 732 int kernel_size; 733 734 if (ldl_p(header) != 0x464c457f) { 735 return false; /* no elfboot */ 736 } 737 738 bool elf_is64 = header[EI_CLASS] == ELFCLASS64; 739 flags = elf_is64 ? 740 ((Elf64_Ehdr *)header)->e_flags : ((Elf32_Ehdr *)header)->e_flags; 741 742 if (flags & 0x00010004) { /* LOAD_ELF_HEADER_HAS_ADDR */ 743 error_report("elfboot unsupported flags = %x", flags); 744 exit(1); 745 } 746 747 uint64_t elf_note_type = XEN_ELFNOTE_PHYS32_ENTRY; 748 kernel_size = load_elf(kernel_filename, read_pvh_start_addr, 749 NULL, &elf_note_type, &elf_entry, 750 &elf_low, &elf_high, NULL, 0, I386_ELF_MACHINE, 751 0, 0); 752 753 if (kernel_size < 0) { 754 error_report("Error while loading elf kernel"); 755 exit(1); 756 } 757 mh_load_addr = elf_low; 758 elf_kernel_size = elf_high - elf_low; 759 760 if (pvh_start_addr == 0) { 761 error_report("Error loading uncompressed kernel without PVH ELF Note"); 762 exit(1); 763 } 764 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ENTRY, pvh_start_addr); 765 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, mh_load_addr); 766 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, elf_kernel_size); 767 768 return true; 769 } 770 771 void x86_load_linux(X86MachineState *x86ms, 772 FWCfgState *fw_cfg, 773 int acpi_data_size, 774 bool pvh_enabled) 775 { 776 bool linuxboot_dma_enabled = X86_MACHINE_GET_CLASS(x86ms)->fwcfg_dma_enabled; 777 uint16_t protocol; 778 int setup_size, kernel_size, cmdline_size; 779 int dtb_size, setup_data_offset; 780 uint32_t initrd_max; 781 uint8_t header[8192], *setup, *kernel; 782 hwaddr real_addr, prot_addr, cmdline_addr, initrd_addr = 0; 783 FILE *f; 784 char *vmode; 785 MachineState *machine = MACHINE(x86ms); 786 struct setup_data *setup_data; 787 const char *kernel_filename = machine->kernel_filename; 788 const char *initrd_filename = machine->initrd_filename; 789 const char *dtb_filename = machine->dtb; 790 const char *kernel_cmdline = machine->kernel_cmdline; 791 SevKernelLoaderContext sev_load_ctx = {}; 792 793 /* Align to 16 bytes as a paranoia measure */ 794 cmdline_size = (strlen(kernel_cmdline) + 16) & ~15; 795 796 /* load the kernel header */ 797 f = fopen(kernel_filename, "rb"); 798 if (!f) { 799 fprintf(stderr, "qemu: could not open kernel file '%s': %s\n", 800 kernel_filename, strerror(errno)); 801 exit(1); 802 } 803 804 kernel_size = get_file_size(f); 805 if (!kernel_size || 806 fread(header, 1, MIN(ARRAY_SIZE(header), kernel_size), f) != 807 MIN(ARRAY_SIZE(header), kernel_size)) { 808 fprintf(stderr, "qemu: could not load kernel '%s': %s\n", 809 kernel_filename, strerror(errno)); 810 exit(1); 811 } 812 813 /* kernel protocol version */ 814 if (ldl_p(header + 0x202) == 0x53726448) { 815 protocol = lduw_p(header + 0x206); 816 } else { 817 /* 818 * This could be a multiboot kernel. If it is, let's stop treating it 819 * like a Linux kernel. 820 * Note: some multiboot images could be in the ELF format (the same of 821 * PVH), so we try multiboot first since we check the multiboot magic 822 * header before to load it. 823 */ 824 if (load_multiboot(x86ms, fw_cfg, f, kernel_filename, initrd_filename, 825 kernel_cmdline, kernel_size, header)) { 826 return; 827 } 828 /* 829 * Check if the file is an uncompressed kernel file (ELF) and load it, 830 * saving the PVH entry point used by the x86/HVM direct boot ABI. 831 * If load_elfboot() is successful, populate the fw_cfg info. 832 */ 833 if (pvh_enabled && 834 load_elfboot(kernel_filename, kernel_size, 835 header, pvh_start_addr, fw_cfg)) { 836 fclose(f); 837 838 fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE, 839 strlen(kernel_cmdline) + 1); 840 fw_cfg_add_string(fw_cfg, FW_CFG_CMDLINE_DATA, kernel_cmdline); 841 842 fw_cfg_add_i32(fw_cfg, FW_CFG_SETUP_SIZE, sizeof(header)); 843 fw_cfg_add_bytes(fw_cfg, FW_CFG_SETUP_DATA, 844 header, sizeof(header)); 845 846 /* load initrd */ 847 if (initrd_filename) { 848 GMappedFile *mapped_file; 849 gsize initrd_size; 850 gchar *initrd_data; 851 GError *gerr = NULL; 852 853 mapped_file = g_mapped_file_new(initrd_filename, false, &gerr); 854 if (!mapped_file) { 855 fprintf(stderr, "qemu: error reading initrd %s: %s\n", 856 initrd_filename, gerr->message); 857 exit(1); 858 } 859 x86ms->initrd_mapped_file = mapped_file; 860 861 initrd_data = g_mapped_file_get_contents(mapped_file); 862 initrd_size = g_mapped_file_get_length(mapped_file); 863 initrd_max = x86ms->below_4g_mem_size - acpi_data_size - 1; 864 if (initrd_size >= initrd_max) { 865 fprintf(stderr, "qemu: initrd is too large, cannot support." 866 "(max: %"PRIu32", need %"PRId64")\n", 867 initrd_max, (uint64_t)initrd_size); 868 exit(1); 869 } 870 871 initrd_addr = (initrd_max - initrd_size) & ~4095; 872 873 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_addr); 874 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size); 875 fw_cfg_add_bytes(fw_cfg, FW_CFG_INITRD_DATA, initrd_data, 876 initrd_size); 877 } 878 879 option_rom[nb_option_roms].bootindex = 0; 880 option_rom[nb_option_roms].name = "pvh.bin"; 881 nb_option_roms++; 882 883 return; 884 } 885 protocol = 0; 886 } 887 888 if (protocol < 0x200 || !(header[0x211] & 0x01)) { 889 /* Low kernel */ 890 real_addr = 0x90000; 891 cmdline_addr = 0x9a000 - cmdline_size; 892 prot_addr = 0x10000; 893 } else if (protocol < 0x202) { 894 /* High but ancient kernel */ 895 real_addr = 0x90000; 896 cmdline_addr = 0x9a000 - cmdline_size; 897 prot_addr = 0x100000; 898 } else { 899 /* High and recent kernel */ 900 real_addr = 0x10000; 901 cmdline_addr = 0x20000; 902 prot_addr = 0x100000; 903 } 904 905 /* highest address for loading the initrd */ 906 if (protocol >= 0x20c && 907 lduw_p(header + 0x236) & XLF_CAN_BE_LOADED_ABOVE_4G) { 908 /* 909 * Linux has supported initrd up to 4 GB for a very long time (2007, 910 * long before XLF_CAN_BE_LOADED_ABOVE_4G which was added in 2013), 911 * though it only sets initrd_max to 2 GB to "work around bootloader 912 * bugs". Luckily, QEMU firmware(which does something like bootloader) 913 * has supported this. 914 * 915 * It's believed that if XLF_CAN_BE_LOADED_ABOVE_4G is set, initrd can 916 * be loaded into any address. 917 * 918 * In addition, initrd_max is uint32_t simply because QEMU doesn't 919 * support the 64-bit boot protocol (specifically the ext_ramdisk_image 920 * field). 921 * 922 * Therefore here just limit initrd_max to UINT32_MAX simply as well. 923 */ 924 initrd_max = UINT32_MAX; 925 } else if (protocol >= 0x203) { 926 initrd_max = ldl_p(header + 0x22c); 927 } else { 928 initrd_max = 0x37ffffff; 929 } 930 931 if (initrd_max >= x86ms->below_4g_mem_size - acpi_data_size) { 932 initrd_max = x86ms->below_4g_mem_size - acpi_data_size - 1; 933 } 934 935 fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_ADDR, cmdline_addr); 936 fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE, strlen(kernel_cmdline) + 1); 937 fw_cfg_add_string(fw_cfg, FW_CFG_CMDLINE_DATA, kernel_cmdline); 938 sev_load_ctx.cmdline_data = (char *)kernel_cmdline; 939 sev_load_ctx.cmdline_size = strlen(kernel_cmdline) + 1; 940 941 if (protocol >= 0x202) { 942 stl_p(header + 0x228, cmdline_addr); 943 } else { 944 stw_p(header + 0x20, 0xA33F); 945 stw_p(header + 0x22, cmdline_addr - real_addr); 946 } 947 948 /* handle vga= parameter */ 949 vmode = strstr(kernel_cmdline, "vga="); 950 if (vmode) { 951 unsigned int video_mode; 952 const char *end; 953 int ret; 954 /* skip "vga=" */ 955 vmode += 4; 956 if (!strncmp(vmode, "normal", 6)) { 957 video_mode = 0xffff; 958 } else if (!strncmp(vmode, "ext", 3)) { 959 video_mode = 0xfffe; 960 } else if (!strncmp(vmode, "ask", 3)) { 961 video_mode = 0xfffd; 962 } else { 963 ret = qemu_strtoui(vmode, &end, 0, &video_mode); 964 if (ret != 0 || (*end && *end != ' ')) { 965 fprintf(stderr, "qemu: invalid 'vga=' kernel parameter.\n"); 966 exit(1); 967 } 968 } 969 stw_p(header + 0x1fa, video_mode); 970 } 971 972 /* loader type */ 973 /* 974 * High nybble = B reserved for QEMU; low nybble is revision number. 975 * If this code is substantially changed, you may want to consider 976 * incrementing the revision. 977 */ 978 if (protocol >= 0x200) { 979 header[0x210] = 0xB0; 980 } 981 /* heap */ 982 if (protocol >= 0x201) { 983 header[0x211] |= 0x80; /* CAN_USE_HEAP */ 984 stw_p(header + 0x224, cmdline_addr - real_addr - 0x200); 985 } 986 987 /* load initrd */ 988 if (initrd_filename) { 989 GMappedFile *mapped_file; 990 gsize initrd_size; 991 gchar *initrd_data; 992 GError *gerr = NULL; 993 994 if (protocol < 0x200) { 995 fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n"); 996 exit(1); 997 } 998 999 mapped_file = g_mapped_file_new(initrd_filename, false, &gerr); 1000 if (!mapped_file) { 1001 fprintf(stderr, "qemu: error reading initrd %s: %s\n", 1002 initrd_filename, gerr->message); 1003 exit(1); 1004 } 1005 x86ms->initrd_mapped_file = mapped_file; 1006 1007 initrd_data = g_mapped_file_get_contents(mapped_file); 1008 initrd_size = g_mapped_file_get_length(mapped_file); 1009 if (initrd_size >= initrd_max) { 1010 fprintf(stderr, "qemu: initrd is too large, cannot support." 1011 "(max: %"PRIu32", need %"PRId64")\n", 1012 initrd_max, (uint64_t)initrd_size); 1013 exit(1); 1014 } 1015 1016 initrd_addr = (initrd_max - initrd_size) & ~4095; 1017 1018 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_addr); 1019 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size); 1020 fw_cfg_add_bytes(fw_cfg, FW_CFG_INITRD_DATA, initrd_data, initrd_size); 1021 sev_load_ctx.initrd_data = initrd_data; 1022 sev_load_ctx.initrd_size = initrd_size; 1023 1024 stl_p(header + 0x218, initrd_addr); 1025 stl_p(header + 0x21c, initrd_size); 1026 } 1027 1028 /* load kernel and setup */ 1029 setup_size = header[0x1f1]; 1030 if (setup_size == 0) { 1031 setup_size = 4; 1032 } 1033 setup_size = (setup_size + 1) * 512; 1034 if (setup_size > kernel_size) { 1035 fprintf(stderr, "qemu: invalid kernel header\n"); 1036 exit(1); 1037 } 1038 kernel_size -= setup_size; 1039 1040 setup = g_malloc(setup_size); 1041 kernel = g_malloc(kernel_size); 1042 fseek(f, 0, SEEK_SET); 1043 if (fread(setup, 1, setup_size, f) != setup_size) { 1044 fprintf(stderr, "fread() failed\n"); 1045 exit(1); 1046 } 1047 if (fread(kernel, 1, kernel_size, f) != kernel_size) { 1048 fprintf(stderr, "fread() failed\n"); 1049 exit(1); 1050 } 1051 fclose(f); 1052 1053 /* append dtb to kernel */ 1054 if (dtb_filename) { 1055 if (protocol < 0x209) { 1056 fprintf(stderr, "qemu: Linux kernel too old to load a dtb\n"); 1057 exit(1); 1058 } 1059 1060 dtb_size = get_image_size(dtb_filename); 1061 if (dtb_size <= 0) { 1062 fprintf(stderr, "qemu: error reading dtb %s: %s\n", 1063 dtb_filename, strerror(errno)); 1064 exit(1); 1065 } 1066 1067 setup_data_offset = QEMU_ALIGN_UP(kernel_size, 16); 1068 kernel_size = setup_data_offset + sizeof(struct setup_data) + dtb_size; 1069 kernel = g_realloc(kernel, kernel_size); 1070 1071 stq_p(header + 0x250, prot_addr + setup_data_offset); 1072 1073 setup_data = (struct setup_data *)(kernel + setup_data_offset); 1074 setup_data->next = 0; 1075 setup_data->type = cpu_to_le32(SETUP_DTB); 1076 setup_data->len = cpu_to_le32(dtb_size); 1077 1078 load_image_size(dtb_filename, setup_data->data, dtb_size); 1079 } 1080 1081 /* 1082 * If we're starting an encrypted VM, it will be OVMF based, which uses the 1083 * efi stub for booting and doesn't require any values to be placed in the 1084 * kernel header. We therefore don't update the header so the hash of the 1085 * kernel on the other side of the fw_cfg interface matches the hash of the 1086 * file the user passed in. 1087 */ 1088 if (!sev_enabled()) { 1089 memcpy(setup, header, MIN(sizeof(header), setup_size)); 1090 } 1091 1092 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, prot_addr); 1093 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size); 1094 fw_cfg_add_bytes(fw_cfg, FW_CFG_KERNEL_DATA, kernel, kernel_size); 1095 sev_load_ctx.kernel_data = (char *)kernel; 1096 sev_load_ctx.kernel_size = kernel_size; 1097 1098 fw_cfg_add_i32(fw_cfg, FW_CFG_SETUP_ADDR, real_addr); 1099 fw_cfg_add_i32(fw_cfg, FW_CFG_SETUP_SIZE, setup_size); 1100 fw_cfg_add_bytes(fw_cfg, FW_CFG_SETUP_DATA, setup, setup_size); 1101 sev_load_ctx.setup_data = (char *)setup; 1102 sev_load_ctx.setup_size = setup_size; 1103 1104 if (sev_enabled()) { 1105 sev_add_kernel_loader_hashes(&sev_load_ctx, &error_fatal); 1106 } 1107 1108 option_rom[nb_option_roms].bootindex = 0; 1109 option_rom[nb_option_roms].name = "linuxboot.bin"; 1110 if (linuxboot_dma_enabled && fw_cfg_dma_enabled(fw_cfg)) { 1111 option_rom[nb_option_roms].name = "linuxboot_dma.bin"; 1112 } 1113 nb_option_roms++; 1114 } 1115 1116 void x86_bios_rom_init(MachineState *ms, const char *default_firmware, 1117 MemoryRegion *rom_memory, bool isapc_ram_fw) 1118 { 1119 const char *bios_name; 1120 char *filename; 1121 MemoryRegion *bios, *isa_bios; 1122 int bios_size, isa_bios_size; 1123 ssize_t ret; 1124 1125 /* BIOS load */ 1126 bios_name = ms->firmware ?: default_firmware; 1127 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); 1128 if (filename) { 1129 bios_size = get_image_size(filename); 1130 } else { 1131 bios_size = -1; 1132 } 1133 if (bios_size <= 0 || 1134 (bios_size % 65536) != 0) { 1135 goto bios_error; 1136 } 1137 bios = g_malloc(sizeof(*bios)); 1138 memory_region_init_ram(bios, NULL, "pc.bios", bios_size, &error_fatal); 1139 if (sev_enabled()) { 1140 /* 1141 * The concept of a "reset" simply doesn't exist for 1142 * confidential computing guests, we have to destroy and 1143 * re-launch them instead. So there is no need to register 1144 * the firmware as rom to properly re-initialize on reset. 1145 * Just go for a straight file load instead. 1146 */ 1147 void *ptr = memory_region_get_ram_ptr(bios); 1148 load_image_size(filename, ptr, bios_size); 1149 x86_firmware_configure(ptr, bios_size); 1150 } else { 1151 if (!isapc_ram_fw) { 1152 memory_region_set_readonly(bios, true); 1153 } 1154 ret = rom_add_file_fixed(bios_name, (uint32_t)(-bios_size), -1); 1155 if (ret != 0) { 1156 goto bios_error; 1157 } 1158 } 1159 g_free(filename); 1160 1161 /* map the last 128KB of the BIOS in ISA space */ 1162 isa_bios_size = MIN(bios_size, 128 * KiB); 1163 isa_bios = g_malloc(sizeof(*isa_bios)); 1164 memory_region_init_alias(isa_bios, NULL, "isa-bios", bios, 1165 bios_size - isa_bios_size, isa_bios_size); 1166 memory_region_add_subregion_overlap(rom_memory, 1167 0x100000 - isa_bios_size, 1168 isa_bios, 1169 1); 1170 if (!isapc_ram_fw) { 1171 memory_region_set_readonly(isa_bios, true); 1172 } 1173 1174 /* map all the bios at the top of memory */ 1175 memory_region_add_subregion(rom_memory, 1176 (uint32_t)(-bios_size), 1177 bios); 1178 return; 1179 1180 bios_error: 1181 fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", bios_name); 1182 exit(1); 1183 } 1184 1185 bool x86_machine_is_smm_enabled(const X86MachineState *x86ms) 1186 { 1187 bool smm_available = false; 1188 1189 if (x86ms->smm == ON_OFF_AUTO_OFF) { 1190 return false; 1191 } 1192 1193 if (tcg_enabled() || qtest_enabled()) { 1194 smm_available = true; 1195 } else if (kvm_enabled()) { 1196 smm_available = kvm_has_smm(); 1197 } 1198 1199 if (smm_available) { 1200 return true; 1201 } 1202 1203 if (x86ms->smm == ON_OFF_AUTO_ON) { 1204 error_report("System Management Mode not supported by this hypervisor."); 1205 exit(1); 1206 } 1207 return false; 1208 } 1209 1210 static void x86_machine_get_smm(Object *obj, Visitor *v, const char *name, 1211 void *opaque, Error **errp) 1212 { 1213 X86MachineState *x86ms = X86_MACHINE(obj); 1214 OnOffAuto smm = x86ms->smm; 1215 1216 visit_type_OnOffAuto(v, name, &smm, errp); 1217 } 1218 1219 static void x86_machine_set_smm(Object *obj, Visitor *v, const char *name, 1220 void *opaque, Error **errp) 1221 { 1222 X86MachineState *x86ms = X86_MACHINE(obj); 1223 1224 visit_type_OnOffAuto(v, name, &x86ms->smm, errp); 1225 } 1226 1227 bool x86_machine_is_acpi_enabled(const X86MachineState *x86ms) 1228 { 1229 if (x86ms->acpi == ON_OFF_AUTO_OFF) { 1230 return false; 1231 } 1232 return true; 1233 } 1234 1235 static void x86_machine_get_acpi(Object *obj, Visitor *v, const char *name, 1236 void *opaque, Error **errp) 1237 { 1238 X86MachineState *x86ms = X86_MACHINE(obj); 1239 OnOffAuto acpi = x86ms->acpi; 1240 1241 visit_type_OnOffAuto(v, name, &acpi, errp); 1242 } 1243 1244 static void x86_machine_set_acpi(Object *obj, Visitor *v, const char *name, 1245 void *opaque, Error **errp) 1246 { 1247 X86MachineState *x86ms = X86_MACHINE(obj); 1248 1249 visit_type_OnOffAuto(v, name, &x86ms->acpi, errp); 1250 } 1251 1252 static void x86_machine_get_pit(Object *obj, Visitor *v, const char *name, 1253 void *opaque, Error **errp) 1254 { 1255 X86MachineState *x86ms = X86_MACHINE(obj); 1256 OnOffAuto pit = x86ms->pit; 1257 1258 visit_type_OnOffAuto(v, name, &pit, errp); 1259 } 1260 1261 static void x86_machine_set_pit(Object *obj, Visitor *v, const char *name, 1262 void *opaque, Error **errp) 1263 { 1264 X86MachineState *x86ms = X86_MACHINE(obj);; 1265 1266 visit_type_OnOffAuto(v, name, &x86ms->pit, errp); 1267 } 1268 1269 static void x86_machine_get_pic(Object *obj, Visitor *v, const char *name, 1270 void *opaque, Error **errp) 1271 { 1272 X86MachineState *x86ms = X86_MACHINE(obj); 1273 OnOffAuto pic = x86ms->pic; 1274 1275 visit_type_OnOffAuto(v, name, &pic, errp); 1276 } 1277 1278 static void x86_machine_set_pic(Object *obj, Visitor *v, const char *name, 1279 void *opaque, Error **errp) 1280 { 1281 X86MachineState *x86ms = X86_MACHINE(obj); 1282 1283 visit_type_OnOffAuto(v, name, &x86ms->pic, errp); 1284 } 1285 1286 static char *x86_machine_get_oem_id(Object *obj, Error **errp) 1287 { 1288 X86MachineState *x86ms = X86_MACHINE(obj); 1289 1290 return g_strdup(x86ms->oem_id); 1291 } 1292 1293 static void x86_machine_set_oem_id(Object *obj, const char *value, Error **errp) 1294 { 1295 X86MachineState *x86ms = X86_MACHINE(obj); 1296 size_t len = strlen(value); 1297 1298 if (len > 6) { 1299 error_setg(errp, 1300 "User specified "X86_MACHINE_OEM_ID" value is bigger than " 1301 "6 bytes in size"); 1302 return; 1303 } 1304 1305 strncpy(x86ms->oem_id, value, 6); 1306 } 1307 1308 static char *x86_machine_get_oem_table_id(Object *obj, Error **errp) 1309 { 1310 X86MachineState *x86ms = X86_MACHINE(obj); 1311 1312 return g_strdup(x86ms->oem_table_id); 1313 } 1314 1315 static void x86_machine_set_oem_table_id(Object *obj, const char *value, 1316 Error **errp) 1317 { 1318 X86MachineState *x86ms = X86_MACHINE(obj); 1319 size_t len = strlen(value); 1320 1321 if (len > 8) { 1322 error_setg(errp, 1323 "User specified "X86_MACHINE_OEM_TABLE_ID 1324 " value is bigger than " 1325 "8 bytes in size"); 1326 return; 1327 } 1328 strncpy(x86ms->oem_table_id, value, 8); 1329 } 1330 1331 static void x86_machine_get_bus_lock_ratelimit(Object *obj, Visitor *v, 1332 const char *name, void *opaque, Error **errp) 1333 { 1334 X86MachineState *x86ms = X86_MACHINE(obj); 1335 uint64_t bus_lock_ratelimit = x86ms->bus_lock_ratelimit; 1336 1337 visit_type_uint64(v, name, &bus_lock_ratelimit, errp); 1338 } 1339 1340 static void x86_machine_set_bus_lock_ratelimit(Object *obj, Visitor *v, 1341 const char *name, void *opaque, Error **errp) 1342 { 1343 X86MachineState *x86ms = X86_MACHINE(obj); 1344 1345 visit_type_uint64(v, name, &x86ms->bus_lock_ratelimit, errp); 1346 } 1347 1348 static void machine_get_sgx_epc(Object *obj, Visitor *v, const char *name, 1349 void *opaque, Error **errp) 1350 { 1351 X86MachineState *x86ms = X86_MACHINE(obj); 1352 SgxEPCList *list = x86ms->sgx_epc_list; 1353 1354 visit_type_SgxEPCList(v, name, &list, errp); 1355 } 1356 1357 static void machine_set_sgx_epc(Object *obj, Visitor *v, const char *name, 1358 void *opaque, Error **errp) 1359 { 1360 X86MachineState *x86ms = X86_MACHINE(obj); 1361 SgxEPCList *list; 1362 1363 list = x86ms->sgx_epc_list; 1364 visit_type_SgxEPCList(v, name, &x86ms->sgx_epc_list, errp); 1365 1366 qapi_free_SgxEPCList(list); 1367 } 1368 1369 static void x86_machine_initfn(Object *obj) 1370 { 1371 X86MachineState *x86ms = X86_MACHINE(obj); 1372 1373 x86ms->smm = ON_OFF_AUTO_AUTO; 1374 x86ms->acpi = ON_OFF_AUTO_AUTO; 1375 x86ms->pit = ON_OFF_AUTO_AUTO; 1376 x86ms->pic = ON_OFF_AUTO_AUTO; 1377 x86ms->pci_irq_mask = ACPI_BUILD_PCI_IRQS; 1378 x86ms->oem_id = g_strndup(ACPI_BUILD_APPNAME6, 6); 1379 x86ms->oem_table_id = g_strndup(ACPI_BUILD_APPNAME8, 8); 1380 x86ms->bus_lock_ratelimit = 0; 1381 x86ms->above_4g_mem_start = 4 * GiB; 1382 } 1383 1384 static void x86_machine_class_init(ObjectClass *oc, void *data) 1385 { 1386 MachineClass *mc = MACHINE_CLASS(oc); 1387 X86MachineClass *x86mc = X86_MACHINE_CLASS(oc); 1388 NMIClass *nc = NMI_CLASS(oc); 1389 1390 mc->cpu_index_to_instance_props = x86_cpu_index_to_props; 1391 mc->get_default_cpu_node_id = x86_get_default_cpu_node_id; 1392 mc->possible_cpu_arch_ids = x86_possible_cpu_arch_ids; 1393 x86mc->save_tsc_khz = true; 1394 x86mc->fwcfg_dma_enabled = true; 1395 nc->nmi_monitor_handler = x86_nmi; 1396 1397 object_class_property_add(oc, X86_MACHINE_SMM, "OnOffAuto", 1398 x86_machine_get_smm, x86_machine_set_smm, 1399 NULL, NULL); 1400 object_class_property_set_description(oc, X86_MACHINE_SMM, 1401 "Enable SMM"); 1402 1403 object_class_property_add(oc, X86_MACHINE_ACPI, "OnOffAuto", 1404 x86_machine_get_acpi, x86_machine_set_acpi, 1405 NULL, NULL); 1406 object_class_property_set_description(oc, X86_MACHINE_ACPI, 1407 "Enable ACPI"); 1408 1409 object_class_property_add(oc, X86_MACHINE_PIT, "OnOffAuto", 1410 x86_machine_get_pit, 1411 x86_machine_set_pit, 1412 NULL, NULL); 1413 object_class_property_set_description(oc, X86_MACHINE_PIT, 1414 "Enable i8254 PIT"); 1415 1416 object_class_property_add(oc, X86_MACHINE_PIC, "OnOffAuto", 1417 x86_machine_get_pic, 1418 x86_machine_set_pic, 1419 NULL, NULL); 1420 object_class_property_set_description(oc, X86_MACHINE_PIC, 1421 "Enable i8259 PIC"); 1422 1423 object_class_property_add_str(oc, X86_MACHINE_OEM_ID, 1424 x86_machine_get_oem_id, 1425 x86_machine_set_oem_id); 1426 object_class_property_set_description(oc, X86_MACHINE_OEM_ID, 1427 "Override the default value of field OEMID " 1428 "in ACPI table header." 1429 "The string may be up to 6 bytes in size"); 1430 1431 1432 object_class_property_add_str(oc, X86_MACHINE_OEM_TABLE_ID, 1433 x86_machine_get_oem_table_id, 1434 x86_machine_set_oem_table_id); 1435 object_class_property_set_description(oc, X86_MACHINE_OEM_TABLE_ID, 1436 "Override the default value of field OEM Table ID " 1437 "in ACPI table header." 1438 "The string may be up to 8 bytes in size"); 1439 1440 object_class_property_add(oc, X86_MACHINE_BUS_LOCK_RATELIMIT, "uint64_t", 1441 x86_machine_get_bus_lock_ratelimit, 1442 x86_machine_set_bus_lock_ratelimit, NULL, NULL); 1443 object_class_property_set_description(oc, X86_MACHINE_BUS_LOCK_RATELIMIT, 1444 "Set the ratelimit for the bus locks acquired in VMs"); 1445 1446 object_class_property_add(oc, "sgx-epc", "SgxEPC", 1447 machine_get_sgx_epc, machine_set_sgx_epc, 1448 NULL, NULL); 1449 object_class_property_set_description(oc, "sgx-epc", 1450 "SGX EPC device"); 1451 } 1452 1453 static const TypeInfo x86_machine_info = { 1454 .name = TYPE_X86_MACHINE, 1455 .parent = TYPE_MACHINE, 1456 .abstract = true, 1457 .instance_size = sizeof(X86MachineState), 1458 .instance_init = x86_machine_initfn, 1459 .class_size = sizeof(X86MachineClass), 1460 .class_init = x86_machine_class_init, 1461 .interfaces = (InterfaceInfo[]) { 1462 { TYPE_NMI }, 1463 { } 1464 }, 1465 }; 1466 1467 static void x86_machine_register_types(void) 1468 { 1469 type_register_static(&x86_machine_info); 1470 } 1471 1472 type_init(x86_machine_register_types) 1473