xref: /openbmc/qemu/hw/i386/x86-cpu.c (revision ba379542)
1 /*
2  * Copyright (c) 2003-2004 Fabrice Bellard
3  * Copyright (c) 2019, 2024 Red Hat, Inc.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a copy
6  * of this software and associated documentation files (the "Software"), to deal
7  * in the Software without restriction, including without limitation the rights
8  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
9  * copies of the Software, and to permit persons to whom the Software is
10  * furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice shall be included in
13  * all copies or substantial portions of the Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
21  * THE SOFTWARE.
22  */
23 #include "qemu/osdep.h"
24 #include "sysemu/whpx.h"
25 #include "sysemu/cpu-timers.h"
26 #include "trace.h"
27 
28 #include "hw/i386/x86.h"
29 #include "target/i386/cpu.h"
30 #include "hw/intc/i8259.h"
31 #include "hw/irq.h"
32 #include "sysemu/kvm.h"
33 
34 /* TSC handling */
35 uint64_t cpu_get_tsc(CPUX86State *env)
36 {
37     return cpus_get_elapsed_ticks();
38 }
39 
40 /* IRQ handling */
41 static void pic_irq_request(void *opaque, int irq, int level)
42 {
43     CPUState *cs = first_cpu;
44     X86CPU *cpu = X86_CPU(cs);
45 
46     trace_x86_pic_interrupt(irq, level);
47     if (cpu_is_apic_enabled(cpu->apic_state) && !kvm_irqchip_in_kernel() &&
48         !whpx_apic_in_platform()) {
49         CPU_FOREACH(cs) {
50             cpu = X86_CPU(cs);
51             if (apic_accept_pic_intr(cpu->apic_state)) {
52                 apic_deliver_pic_intr(cpu->apic_state, level);
53             }
54         }
55     } else {
56         if (level) {
57             cpu_interrupt(cs, CPU_INTERRUPT_HARD);
58         } else {
59             cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
60         }
61     }
62 }
63 
64 qemu_irq x86_allocate_cpu_irq(void)
65 {
66     return qemu_allocate_irq(pic_irq_request, NULL, 0);
67 }
68 
69 int cpu_get_pic_interrupt(CPUX86State *env)
70 {
71     X86CPU *cpu = env_archcpu(env);
72     int intno;
73 
74     if (!kvm_irqchip_in_kernel() && !whpx_apic_in_platform()) {
75         intno = apic_get_interrupt(cpu->apic_state);
76         if (intno >= 0) {
77             return intno;
78         }
79         /* read the irq from the PIC */
80         if (!apic_accept_pic_intr(cpu->apic_state)) {
81             return -1;
82         }
83     }
84 
85     intno = pic_read_irq(isa_pic);
86     return intno;
87 }
88 
89 DeviceState *cpu_get_current_apic(void)
90 {
91     if (current_cpu) {
92         X86CPU *cpu = X86_CPU(current_cpu);
93         return cpu->apic_state;
94     } else {
95         return NULL;
96     }
97 }
98