1 /* 2 * Q35 chipset based pc system emulator 3 * 4 * Copyright (c) 2003-2004 Fabrice Bellard 5 * Copyright (c) 2009, 2010 6 * Isaku Yamahata <yamahata at valinux co jp> 7 * VA Linux Systems Japan K.K. 8 * Copyright (C) 2012 Jason Baron <jbaron@redhat.com> 9 * 10 * This is based on pc.c, but heavily modified. 11 * 12 * Permission is hereby granted, free of charge, to any person obtaining a copy 13 * of this software and associated documentation files (the "Software"), to deal 14 * in the Software without restriction, including without limitation the rights 15 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 16 * copies of the Software, and to permit persons to whom the Software is 17 * furnished to do so, subject to the following conditions: 18 * 19 * The above copyright notice and this permission notice shall be included in 20 * all copies or substantial portions of the Software. 21 * 22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 24 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 27 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 28 * THE SOFTWARE. 29 */ 30 #include "hw/hw.h" 31 #include "hw/loader.h" 32 #include "sysemu/arch_init.h" 33 #include "hw/i2c/smbus.h" 34 #include "hw/boards.h" 35 #include "hw/timer/mc146818rtc.h" 36 #include "hw/xen/xen.h" 37 #include "sysemu/kvm.h" 38 #include "hw/kvm/clock.h" 39 #include "hw/pci-host/q35.h" 40 #include "exec/address-spaces.h" 41 #include "hw/i386/ich9.h" 42 #include "hw/smbios/smbios.h" 43 #include "hw/ide/pci.h" 44 #include "hw/ide/ahci.h" 45 #include "hw/usb.h" 46 #include "qemu/error-report.h" 47 #include "migration/migration.h" 48 49 /* ICH9 AHCI has 6 ports */ 50 #define MAX_SATA_PORTS 6 51 52 /* PC hardware initialisation */ 53 static void pc_q35_init(MachineState *machine) 54 { 55 PCMachineState *pcms = PC_MACHINE(machine); 56 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); 57 Q35PCIHost *q35_host; 58 PCIHostState *phb; 59 PCIBus *host_bus; 60 PCIDevice *lpc; 61 BusState *idebus[MAX_SATA_PORTS]; 62 ISADevice *rtc_state; 63 MemoryRegion *pci_memory; 64 MemoryRegion *rom_memory; 65 MemoryRegion *ram_memory; 66 GSIState *gsi_state; 67 ISABus *isa_bus; 68 qemu_irq *gsi; 69 qemu_irq *i8259; 70 int i; 71 ICH9LPCState *ich9_lpc; 72 PCIDevice *ahci; 73 PcGuestInfo *guest_info; 74 ram_addr_t lowmem; 75 DriveInfo *hd[MAX_SATA_PORTS]; 76 MachineClass *mc = MACHINE_GET_CLASS(machine); 77 78 /* Check whether RAM fits below 4G (leaving 1/2 GByte for IO memory 79 * and 256 Mbytes for PCI Express Enhanced Configuration Access Mapping 80 * also known as MMCFG). 81 * If it doesn't, we need to split it in chunks below and above 4G. 82 * In any case, try to make sure that guest addresses aligned at 83 * 1G boundaries get mapped to host addresses aligned at 1G boundaries. 84 * For old machine types, use whatever split we used historically to avoid 85 * breaking migration. 86 */ 87 if (machine->ram_size >= 0xb0000000) { 88 lowmem = pcmc->gigabyte_align ? 0x80000000 : 0xb0000000; 89 } else { 90 lowmem = 0xb0000000; 91 } 92 93 /* Handle the machine opt max-ram-below-4g. It is basically doing 94 * min(qemu limit, user limit). 95 */ 96 if (lowmem > pcms->max_ram_below_4g) { 97 lowmem = pcms->max_ram_below_4g; 98 if (machine->ram_size - lowmem > lowmem && 99 lowmem & ((1ULL << 30) - 1)) { 100 error_report("Warning: Large machine and max_ram_below_4g(%"PRIu64 101 ") not a multiple of 1G; possible bad performance.", 102 pcms->max_ram_below_4g); 103 } 104 } 105 106 if (machine->ram_size >= lowmem) { 107 pcms->above_4g_mem_size = machine->ram_size - lowmem; 108 pcms->below_4g_mem_size = lowmem; 109 } else { 110 pcms->above_4g_mem_size = 0; 111 pcms->below_4g_mem_size = machine->ram_size; 112 } 113 114 if (xen_enabled()) { 115 xen_hvm_init(pcms, &ram_memory); 116 } 117 118 pc_cpus_init(pcms); 119 if (!pcmc->has_acpi_build) { 120 /* only machine types 1.7 & older need this */ 121 pc_acpi_init("q35-acpi-dsdt.aml"); 122 } 123 124 kvmclock_create(); 125 126 /* pci enabled */ 127 if (pcmc->pci_enabled) { 128 pci_memory = g_new(MemoryRegion, 1); 129 memory_region_init(pci_memory, NULL, "pci", UINT64_MAX); 130 rom_memory = pci_memory; 131 } else { 132 pci_memory = NULL; 133 rom_memory = get_system_memory(); 134 } 135 136 guest_info = pc_guest_info_init(pcms); 137 guest_info->isapc_ram_fw = false; 138 guest_info->has_acpi_build = pcmc->has_acpi_build; 139 guest_info->has_reserved_memory = pcmc->has_reserved_memory; 140 guest_info->rsdp_in_ram = pcmc->rsdp_in_ram; 141 142 /* Migration was not supported in 2.0 for Q35, so do not bother 143 * with this hack (see hw/i386/acpi-build.c). 144 */ 145 guest_info->legacy_acpi_table_size = 0; 146 147 if (pcmc->smbios_defaults) { 148 /* These values are guest ABI, do not change */ 149 smbios_set_defaults("QEMU", "Standard PC (Q35 + ICH9, 2009)", 150 mc->name, pcmc->smbios_legacy_mode, 151 pcmc->smbios_uuid_encoded, 152 SMBIOS_ENTRY_POINT_21); 153 } 154 155 /* allocate ram and load rom/bios */ 156 if (!xen_enabled()) { 157 pc_memory_init(pcms, get_system_memory(), 158 rom_memory, &ram_memory, guest_info); 159 } 160 161 /* irq lines */ 162 gsi_state = g_malloc0(sizeof(*gsi_state)); 163 if (kvm_irqchip_in_kernel()) { 164 kvm_pc_setup_irq_routing(pcmc->pci_enabled); 165 gsi = qemu_allocate_irqs(kvm_pc_gsi_handler, gsi_state, 166 GSI_NUM_PINS); 167 } else { 168 gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS); 169 } 170 171 /* create pci host bus */ 172 q35_host = Q35_HOST_DEVICE(qdev_create(NULL, TYPE_Q35_HOST_DEVICE)); 173 174 object_property_add_child(qdev_get_machine(), "q35", OBJECT(q35_host), NULL); 175 q35_host->mch.ram_memory = ram_memory; 176 q35_host->mch.pci_address_space = pci_memory; 177 q35_host->mch.system_memory = get_system_memory(); 178 q35_host->mch.address_space_io = get_system_io(); 179 q35_host->mch.below_4g_mem_size = pcms->below_4g_mem_size; 180 q35_host->mch.above_4g_mem_size = pcms->above_4g_mem_size; 181 /* pci */ 182 qdev_init_nofail(DEVICE(q35_host)); 183 phb = PCI_HOST_BRIDGE(q35_host); 184 host_bus = phb->bus; 185 pcms->bus = phb->bus; 186 /* create ISA bus */ 187 lpc = pci_create_simple_multifunction(host_bus, PCI_DEVFN(ICH9_LPC_DEV, 188 ICH9_LPC_FUNC), true, 189 TYPE_ICH9_LPC_DEVICE); 190 191 object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP, 192 TYPE_HOTPLUG_HANDLER, 193 (Object **)&pcms->acpi_dev, 194 object_property_allow_set_link, 195 OBJ_PROP_LINK_UNREF_ON_RELEASE, &error_abort); 196 object_property_set_link(OBJECT(machine), OBJECT(lpc), 197 PC_MACHINE_ACPI_DEVICE_PROP, &error_abort); 198 199 ich9_lpc = ICH9_LPC_DEVICE(lpc); 200 ich9_lpc->pic = gsi; 201 ich9_lpc->ioapic = gsi_state->ioapic_irq; 202 pci_bus_irqs(host_bus, ich9_lpc_set_irq, ich9_lpc_map_irq, ich9_lpc, 203 ICH9_LPC_NB_PIRQS); 204 pci_bus_set_route_irq_fn(host_bus, ich9_route_intx_pin_to_irq); 205 isa_bus = ich9_lpc->isa_bus; 206 207 /*end early*/ 208 isa_bus_irqs(isa_bus, gsi); 209 210 if (kvm_irqchip_in_kernel()) { 211 i8259 = kvm_i8259_init(isa_bus); 212 } else if (xen_enabled()) { 213 i8259 = xen_interrupt_controller_init(); 214 } else { 215 i8259 = i8259_init(isa_bus, pc_allocate_cpu_irq()); 216 } 217 218 for (i = 0; i < ISA_NUM_IRQS; i++) { 219 gsi_state->i8259_irq[i] = i8259[i]; 220 } 221 if (pcmc->pci_enabled) { 222 ioapic_init_gsi(gsi_state, "q35"); 223 } 224 225 pc_register_ferr_irq(gsi[13]); 226 227 assert(pcms->vmport != ON_OFF_AUTO__MAX); 228 if (pcms->vmport == ON_OFF_AUTO_AUTO) { 229 pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON; 230 } 231 232 /* init basic PC hardware */ 233 pc_basic_device_init(isa_bus, gsi, &rtc_state, !mc->no_floppy, 234 (pcms->vmport != ON_OFF_AUTO_ON), 0xff0104); 235 236 /* connect pm stuff to lpc */ 237 ich9_lpc_pm_init(lpc, pc_machine_is_smm_enabled(pcms), !mc->no_tco); 238 239 /* ahci and SATA device, for q35 1 ahci controller is built-in */ 240 ahci = pci_create_simple_multifunction(host_bus, 241 PCI_DEVFN(ICH9_SATA1_DEV, 242 ICH9_SATA1_FUNC), 243 true, "ich9-ahci"); 244 idebus[0] = qdev_get_child_bus(&ahci->qdev, "ide.0"); 245 idebus[1] = qdev_get_child_bus(&ahci->qdev, "ide.1"); 246 g_assert(MAX_SATA_PORTS == ICH_AHCI(ahci)->ahci.ports); 247 ide_drive_get(hd, ICH_AHCI(ahci)->ahci.ports); 248 ahci_ide_create_devs(ahci, hd); 249 250 if (usb_enabled()) { 251 /* Should we create 6 UHCI according to ich9 spec? */ 252 ehci_create_ich9_with_companions(host_bus, 0x1d); 253 } 254 255 /* TODO: Populate SPD eeprom data. */ 256 smbus_eeprom_init(ich9_smb_init(host_bus, 257 PCI_DEVFN(ICH9_SMB_DEV, ICH9_SMB_FUNC), 258 0xb100), 259 8, NULL, 0); 260 261 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state); 262 263 /* the rest devices to which pci devfn is automatically assigned */ 264 pc_vga_init(isa_bus, host_bus); 265 pc_nic_init(isa_bus, host_bus); 266 if (pcmc->pci_enabled) { 267 pc_pci_device_init(host_bus); 268 } 269 } 270 271 /* Looking for a pc_compat_2_4() function? It doesn't exist. 272 * pc_compat_*() functions that run on machine-init time and 273 * change global QEMU state are deprecated. Please don't create 274 * one, and implement any pc-*-2.4 (and newer) compat code in 275 * HW_COMPAT_*, PC_COMPAT_*, or * pc_*_machine_options(). 276 */ 277 278 static void pc_compat_2_3(MachineState *machine) 279 { 280 PCMachineState *pcms = PC_MACHINE(machine); 281 savevm_skip_section_footers(); 282 if (kvm_enabled()) { 283 pcms->smm = ON_OFF_AUTO_OFF; 284 } 285 global_state_set_optional(); 286 savevm_skip_configuration(); 287 } 288 289 static void pc_compat_2_2(MachineState *machine) 290 { 291 pc_compat_2_3(machine); 292 machine->suppress_vmdesc = true; 293 } 294 295 static void pc_compat_2_1(MachineState *machine) 296 { 297 pc_compat_2_2(machine); 298 x86_cpu_change_kvm_default("svm", NULL); 299 } 300 301 static void pc_compat_2_0(MachineState *machine) 302 { 303 pc_compat_2_1(machine); 304 } 305 306 static void pc_compat_1_7(MachineState *machine) 307 { 308 pc_compat_2_0(machine); 309 x86_cpu_change_kvm_default("x2apic", NULL); 310 } 311 312 static void pc_compat_1_6(MachineState *machine) 313 { 314 pc_compat_1_7(machine); 315 } 316 317 static void pc_compat_1_5(MachineState *machine) 318 { 319 pc_compat_1_6(machine); 320 } 321 322 static void pc_compat_1_4(MachineState *machine) 323 { 324 pc_compat_1_5(machine); 325 } 326 327 #define DEFINE_Q35_MACHINE(suffix, name, compatfn, optionfn) \ 328 static void pc_init_##suffix(MachineState *machine) \ 329 { \ 330 void (*compat)(MachineState *m) = (compatfn); \ 331 if (compat) { \ 332 compat(machine); \ 333 } \ 334 pc_q35_init(machine); \ 335 } \ 336 DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn) 337 338 339 static void pc_q35_machine_options(MachineClass *m) 340 { 341 m->family = "pc_q35"; 342 m->desc = "Standard PC (Q35 + ICH9, 2009)"; 343 m->hot_add_cpu = pc_hot_add_cpu; 344 m->units_per_default_bus = 1; 345 m->default_machine_opts = "firmware=bios-256k.bin"; 346 m->default_display = "std"; 347 m->no_floppy = 1; 348 m->no_tco = 0; 349 } 350 351 static void pc_q35_2_6_machine_options(MachineClass *m) 352 { 353 pc_q35_machine_options(m); 354 m->alias = "q35"; 355 } 356 357 DEFINE_Q35_MACHINE(v2_6, "pc-q35-2.6", NULL, 358 pc_q35_2_6_machine_options); 359 360 static void pc_q35_2_5_machine_options(MachineClass *m) 361 { 362 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 363 pc_q35_2_6_machine_options(m); 364 m->alias = NULL; 365 pcmc->save_tsc_khz = false; 366 SET_MACHINE_COMPAT(m, PC_COMPAT_2_5); 367 } 368 369 DEFINE_Q35_MACHINE(v2_5, "pc-q35-2.5", NULL, 370 pc_q35_2_5_machine_options); 371 372 static void pc_q35_2_4_machine_options(MachineClass *m) 373 { 374 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 375 pc_q35_2_5_machine_options(m); 376 m->hw_version = "2.4.0"; 377 pcmc->broken_reserved_end = true; 378 SET_MACHINE_COMPAT(m, PC_COMPAT_2_4); 379 } 380 381 DEFINE_Q35_MACHINE(v2_4, "pc-q35-2.4", NULL, 382 pc_q35_2_4_machine_options); 383 384 385 static void pc_q35_2_3_machine_options(MachineClass *m) 386 { 387 pc_q35_2_4_machine_options(m); 388 m->hw_version = "2.3.0"; 389 m->no_floppy = 0; 390 m->no_tco = 1; 391 SET_MACHINE_COMPAT(m, PC_COMPAT_2_3); 392 } 393 394 DEFINE_Q35_MACHINE(v2_3, "pc-q35-2.3", pc_compat_2_3, 395 pc_q35_2_3_machine_options); 396 397 398 static void pc_q35_2_2_machine_options(MachineClass *m) 399 { 400 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 401 pc_q35_2_3_machine_options(m); 402 m->hw_version = "2.2.0"; 403 SET_MACHINE_COMPAT(m, PC_COMPAT_2_2); 404 pcmc->rsdp_in_ram = false; 405 } 406 407 DEFINE_Q35_MACHINE(v2_2, "pc-q35-2.2", pc_compat_2_2, 408 pc_q35_2_2_machine_options); 409 410 411 static void pc_q35_2_1_machine_options(MachineClass *m) 412 { 413 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 414 pc_q35_2_2_machine_options(m); 415 m->hw_version = "2.1.0"; 416 m->default_display = NULL; 417 SET_MACHINE_COMPAT(m, PC_COMPAT_2_1); 418 pcmc->smbios_uuid_encoded = false; 419 pcmc->enforce_aligned_dimm = false; 420 } 421 422 DEFINE_Q35_MACHINE(v2_1, "pc-q35-2.1", pc_compat_2_1, 423 pc_q35_2_1_machine_options); 424 425 426 static void pc_q35_2_0_machine_options(MachineClass *m) 427 { 428 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 429 pc_q35_2_1_machine_options(m); 430 m->hw_version = "2.0.0"; 431 SET_MACHINE_COMPAT(m, PC_COMPAT_2_0); 432 pcmc->has_reserved_memory = false; 433 pcmc->smbios_legacy_mode = true; 434 pcmc->acpi_data_size = 0x10000; 435 } 436 437 DEFINE_Q35_MACHINE(v2_0, "pc-q35-2.0", pc_compat_2_0, 438 pc_q35_2_0_machine_options); 439 440 441 static void pc_q35_1_7_machine_options(MachineClass *m) 442 { 443 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 444 pc_q35_2_0_machine_options(m); 445 m->hw_version = "1.7.0"; 446 m->default_machine_opts = NULL; 447 m->option_rom_has_mr = true; 448 SET_MACHINE_COMPAT(m, PC_COMPAT_1_7); 449 pcmc->smbios_defaults = false; 450 pcmc->gigabyte_align = false; 451 } 452 453 DEFINE_Q35_MACHINE(v1_7, "pc-q35-1.7", pc_compat_1_7, 454 pc_q35_1_7_machine_options); 455 456 457 static void pc_q35_1_6_machine_options(MachineClass *m) 458 { 459 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 460 pc_q35_machine_options(m); 461 m->hw_version = "1.6.0"; 462 m->rom_file_has_mr = false; 463 SET_MACHINE_COMPAT(m, PC_COMPAT_1_6); 464 pcmc->has_acpi_build = false; 465 } 466 467 DEFINE_Q35_MACHINE(v1_6, "pc-q35-1.6", pc_compat_1_6, 468 pc_q35_1_6_machine_options); 469 470 471 static void pc_q35_1_5_machine_options(MachineClass *m) 472 { 473 pc_q35_1_6_machine_options(m); 474 m->hw_version = "1.5.0"; 475 SET_MACHINE_COMPAT(m, PC_COMPAT_1_5); 476 } 477 478 DEFINE_Q35_MACHINE(v1_5, "pc-q35-1.5", pc_compat_1_5, 479 pc_q35_1_5_machine_options); 480 481 482 static void pc_q35_1_4_machine_options(MachineClass *m) 483 { 484 pc_q35_1_5_machine_options(m); 485 m->hw_version = "1.4.0"; 486 m->hot_add_cpu = NULL; 487 SET_MACHINE_COMPAT(m, PC_COMPAT_1_4); 488 } 489 490 DEFINE_Q35_MACHINE(v1_4, "pc-q35-1.4", pc_compat_1_4, 491 pc_q35_1_4_machine_options); 492