xref: /openbmc/qemu/hw/i386/pc_piix.c (revision f480f6e8)
1 /*
2  * QEMU PC System Emulator
3  *
4  * Copyright (c) 2003-2004 Fabrice Bellard
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to deal
8  * in the Software without restriction, including without limitation the rights
9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10  * copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22  * THE SOFTWARE.
23  */
24 
25 #include "qemu/osdep.h"
26 #include "config-devices.h"
27 
28 #include "qemu/units.h"
29 #include "hw/loader.h"
30 #include "hw/i386/x86.h"
31 #include "hw/i386/pc.h"
32 #include "hw/i386/apic.h"
33 #include "hw/pci-host/i440fx.h"
34 #include "hw/southbridge/piix.h"
35 #include "hw/display/ramfb.h"
36 #include "hw/firmware/smbios.h"
37 #include "hw/pci/pci.h"
38 #include "hw/pci/pci_ids.h"
39 #include "hw/usb.h"
40 #include "net/net.h"
41 #include "hw/ide.h"
42 #include "hw/irq.h"
43 #include "sysemu/kvm.h"
44 #include "hw/kvm/clock.h"
45 #include "sysemu/sysemu.h"
46 #include "hw/sysbus.h"
47 #include "sysemu/arch_init.h"
48 #include "hw/i2c/smbus_eeprom.h"
49 #include "hw/xen/xen.h"
50 #include "exec/memory.h"
51 #include "exec/address-spaces.h"
52 #include "hw/acpi/acpi.h"
53 #include "cpu.h"
54 #include "qapi/error.h"
55 #include "qemu/error-report.h"
56 #ifdef CONFIG_XEN
57 #include <xen/hvm/hvm_info_table.h>
58 #include "hw/xen/xen_pt.h"
59 #endif
60 #include "migration/global_state.h"
61 #include "migration/misc.h"
62 #include "sysemu/numa.h"
63 
64 #define MAX_IDE_BUS 2
65 
66 #ifdef CONFIG_IDE_ISA
67 static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 };
68 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 };
69 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
70 #endif
71 
72 /* PC hardware initialisation */
73 static void pc_init1(MachineState *machine,
74                      const char *host_type, const char *pci_type)
75 {
76     PCMachineState *pcms = PC_MACHINE(machine);
77     PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
78     X86MachineState *x86ms = X86_MACHINE(machine);
79     MemoryRegion *system_memory = get_system_memory();
80     MemoryRegion *system_io = get_system_io();
81     int i;
82     PCIBus *pci_bus;
83     ISABus *isa_bus;
84     PCII440FXState *i440fx_state;
85     int piix3_devfn = -1;
86     qemu_irq smi_irq;
87     GSIState *gsi_state;
88     DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
89     BusState *idebus[MAX_IDE_BUS];
90     ISADevice *rtc_state;
91     MemoryRegion *ram_memory;
92     MemoryRegion *pci_memory;
93     MemoryRegion *rom_memory;
94     ram_addr_t lowmem;
95 
96     /*
97      * Calculate ram split, for memory below and above 4G.  It's a bit
98      * complicated for backward compatibility reasons ...
99      *
100      *  - Traditional split is 3.5G (lowmem = 0xe0000000).  This is the
101      *    default value for max_ram_below_4g now.
102      *
103      *  - Then, to gigabyte align the memory, we move the split to 3G
104      *    (lowmem = 0xc0000000).  But only in case we have to split in
105      *    the first place, i.e. ram_size is larger than (traditional)
106      *    lowmem.  And for new machine types (gigabyte_align = true)
107      *    only, for live migration compatibility reasons.
108      *
109      *  - Next the max-ram-below-4g option was added, which allowed to
110      *    reduce lowmem to a smaller value, to allow a larger PCI I/O
111      *    window below 4G.  qemu doesn't enforce gigabyte alignment here,
112      *    but prints a warning.
113      *
114      *  - Finally max-ram-below-4g got updated to also allow raising lowmem,
115      *    so legacy non-PAE guests can get as much memory as possible in
116      *    the 32bit address space below 4G.
117      *
118      *  - Note that Xen has its own ram setp code in xen_ram_init(),
119      *    called via xen_hvm_init().
120      *
121      * Examples:
122      *    qemu -M pc-1.7 -m 4G    (old default)    -> 3584M low,  512M high
123      *    qemu -M pc -m 4G        (new default)    -> 3072M low, 1024M high
124      *    qemu -M pc,max-ram-below-4g=2G -m 4G     -> 2048M low, 2048M high
125      *    qemu -M pc,max-ram-below-4g=4G -m 3968M  -> 3968M low (=4G-128M)
126      */
127     if (xen_enabled()) {
128         xen_hvm_init(pcms, &ram_memory);
129     } else {
130         if (!x86ms->max_ram_below_4g) {
131             x86ms->max_ram_below_4g = 0xe0000000; /* default: 3.5G */
132         }
133         lowmem = x86ms->max_ram_below_4g;
134         if (machine->ram_size >= x86ms->max_ram_below_4g) {
135             if (pcmc->gigabyte_align) {
136                 if (lowmem > 0xc0000000) {
137                     lowmem = 0xc0000000;
138                 }
139                 if (lowmem & (1 * GiB - 1)) {
140                     warn_report("Large machine and max_ram_below_4g "
141                                 "(%" PRIu64 ") not a multiple of 1G; "
142                                 "possible bad performance.",
143                                 x86ms->max_ram_below_4g);
144                 }
145             }
146         }
147 
148         if (machine->ram_size >= lowmem) {
149             x86ms->above_4g_mem_size = machine->ram_size - lowmem;
150             x86ms->below_4g_mem_size = lowmem;
151         } else {
152             x86ms->above_4g_mem_size = 0;
153             x86ms->below_4g_mem_size = machine->ram_size;
154         }
155     }
156 
157     x86_cpus_init(x86ms, pcmc->default_cpu_version);
158 
159     if (kvm_enabled() && pcmc->kvmclock_enabled) {
160         kvmclock_create();
161     }
162 
163     if (pcmc->pci_enabled) {
164         pci_memory = g_new(MemoryRegion, 1);
165         memory_region_init(pci_memory, NULL, "pci", UINT64_MAX);
166         rom_memory = pci_memory;
167     } else {
168         pci_memory = NULL;
169         rom_memory = system_memory;
170     }
171 
172     pc_guest_info_init(pcms);
173 
174     if (pcmc->smbios_defaults) {
175         MachineClass *mc = MACHINE_GET_CLASS(machine);
176         /* These values are guest ABI, do not change */
177         smbios_set_defaults("QEMU", "Standard PC (i440FX + PIIX, 1996)",
178                             mc->name, pcmc->smbios_legacy_mode,
179                             pcmc->smbios_uuid_encoded,
180                             SMBIOS_ENTRY_POINT_21);
181     }
182 
183     /* allocate ram and load rom/bios */
184     if (!xen_enabled()) {
185         pc_memory_init(pcms, system_memory,
186                        rom_memory, &ram_memory);
187     } else if (machine->kernel_filename != NULL) {
188         /* For xen HVM direct kernel boot, load linux here */
189         xen_load_linux(pcms);
190     }
191 
192     gsi_state = pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled);
193 
194     if (pcmc->pci_enabled) {
195         PIIX3State *piix3;
196 
197         pci_bus = i440fx_init(host_type,
198                               pci_type,
199                               &i440fx_state,
200                               system_memory, system_io, machine->ram_size,
201                               x86ms->below_4g_mem_size,
202                               x86ms->above_4g_mem_size,
203                               pci_memory, ram_memory);
204         pcms->bus = pci_bus;
205 
206         piix3 = piix3_create(pci_bus, &isa_bus);
207         piix3->pic = x86ms->gsi;
208         piix3_devfn = piix3->dev.devfn;
209     } else {
210         pci_bus = NULL;
211         i440fx_state = NULL;
212         isa_bus = isa_bus_new(NULL, get_system_memory(), system_io,
213                               &error_abort);
214         no_hpet = 1;
215     }
216     isa_bus_irqs(isa_bus, x86ms->gsi);
217 
218     pc_i8259_create(isa_bus, gsi_state->i8259_irq);
219 
220     if (pcmc->pci_enabled) {
221         ioapic_init_gsi(gsi_state, "i440fx");
222     }
223 
224     if (tcg_enabled()) {
225         x86_register_ferr_irq(x86ms->gsi[13]);
226     }
227 
228     pc_vga_init(isa_bus, pcmc->pci_enabled ? pci_bus : NULL);
229 
230     assert(pcms->vmport != ON_OFF_AUTO__MAX);
231     if (pcms->vmport == ON_OFF_AUTO_AUTO) {
232         pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON;
233     }
234 
235     /* init basic PC hardware */
236     pc_basic_device_init(isa_bus, x86ms->gsi, &rtc_state, true,
237                          (pcms->vmport != ON_OFF_AUTO_ON), pcms->pit_enabled,
238                          0x4);
239 
240     pc_nic_init(pcmc, isa_bus, pci_bus);
241 
242     ide_drive_get(hd, ARRAY_SIZE(hd));
243     if (pcmc->pci_enabled) {
244         PCIDevice *dev;
245         if (xen_enabled()) {
246             dev = pci_piix3_xen_ide_init(pci_bus, hd, piix3_devfn + 1);
247         } else {
248             dev = pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1);
249         }
250         idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0");
251         idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1");
252         pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
253     }
254 #ifdef CONFIG_IDE_ISA
255 else {
256         for(i = 0; i < MAX_IDE_BUS; i++) {
257             ISADevice *dev;
258             char busname[] = "ide.0";
259             dev = isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i],
260                                ide_irq[i],
261                                hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
262             /*
263              * The ide bus name is ide.0 for the first bus and ide.1 for the
264              * second one.
265              */
266             busname[4] = '0' + i;
267             idebus[i] = qdev_get_child_bus(DEVICE(dev), busname);
268         }
269         pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
270     }
271 #endif
272 
273     if (pcmc->pci_enabled && machine_usb(machine)) {
274         pci_create_simple(pci_bus, piix3_devfn + 2, "piix3-usb-uhci");
275     }
276 
277     if (pcmc->pci_enabled && acpi_enabled) {
278         DeviceState *piix4_pm;
279 
280         smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0);
281         /* TODO: Populate SPD eeprom data.  */
282         pcms->smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
283                                     x86ms->gsi[9], smi_irq,
284                                     pc_machine_is_smm_enabled(pcms),
285                                     &piix4_pm);
286         smbus_eeprom_init(pcms->smbus, 8, NULL, 0);
287 
288         object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
289                                  TYPE_HOTPLUG_HANDLER,
290                                  (Object **)&pcms->acpi_dev,
291                                  object_property_allow_set_link,
292                                  OBJ_PROP_LINK_STRONG, &error_abort);
293         object_property_set_link(OBJECT(machine), OBJECT(piix4_pm),
294                                  PC_MACHINE_ACPI_DEVICE_PROP, &error_abort);
295     }
296 
297     if (machine->nvdimms_state->is_enabled) {
298         nvdimm_init_acpi_state(machine->nvdimms_state, system_io,
299                                x86ms->fw_cfg, OBJECT(pcms));
300     }
301 }
302 
303 /* Looking for a pc_compat_2_4() function? It doesn't exist.
304  * pc_compat_*() functions that run on machine-init time and
305  * change global QEMU state are deprecated. Please don't create
306  * one, and implement any pc-*-2.4 (and newer) compat code in
307  * hw_compat_*, pc_compat_*, or * pc_*_machine_options().
308  */
309 
310 static void pc_compat_2_3_fn(MachineState *machine)
311 {
312     PCMachineState *pcms = PC_MACHINE(machine);
313     if (kvm_enabled()) {
314         pcms->smm = ON_OFF_AUTO_OFF;
315     }
316 }
317 
318 static void pc_compat_2_2_fn(MachineState *machine)
319 {
320     pc_compat_2_3_fn(machine);
321 }
322 
323 static void pc_compat_2_1_fn(MachineState *machine)
324 {
325     pc_compat_2_2_fn(machine);
326     x86_cpu_change_kvm_default("svm", NULL);
327 }
328 
329 static void pc_compat_2_0_fn(MachineState *machine)
330 {
331     pc_compat_2_1_fn(machine);
332 }
333 
334 static void pc_compat_1_7_fn(MachineState *machine)
335 {
336     pc_compat_2_0_fn(machine);
337     x86_cpu_change_kvm_default("x2apic", NULL);
338 }
339 
340 static void pc_compat_1_6_fn(MachineState *machine)
341 {
342     pc_compat_1_7_fn(machine);
343 }
344 
345 static void pc_compat_1_5_fn(MachineState *machine)
346 {
347     pc_compat_1_6_fn(machine);
348 }
349 
350 static void pc_compat_1_4_fn(MachineState *machine)
351 {
352     pc_compat_1_5_fn(machine);
353 }
354 
355 static void pc_compat_1_3(MachineState *machine)
356 {
357     pc_compat_1_4_fn(machine);
358 }
359 
360 /* PC compat function for pc-0.14 to pc-1.2 */
361 static void pc_compat_1_2(MachineState *machine)
362 {
363     pc_compat_1_3(machine);
364     x86_cpu_change_kvm_default("kvm-pv-eoi", NULL);
365 }
366 
367 /* PC compat function for pc-0.12 and pc-0.13 */
368 static void pc_compat_0_13(MachineState *machine)
369 {
370     pc_compat_1_2(machine);
371 }
372 
373 static void pc_init_isa(MachineState *machine)
374 {
375     pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, TYPE_I440FX_PCI_DEVICE);
376 }
377 
378 #ifdef CONFIG_XEN
379 static void pc_xen_hvm_init_pci(MachineState *machine)
380 {
381     const char *pci_type = has_igd_gfx_passthru ?
382                 TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE : TYPE_I440FX_PCI_DEVICE;
383 
384     pc_init1(machine,
385              TYPE_I440FX_PCI_HOST_BRIDGE,
386              pci_type);
387 }
388 
389 static void pc_xen_hvm_init(MachineState *machine)
390 {
391     PCMachineState *pcms = PC_MACHINE(machine);
392 
393     if (!xen_enabled()) {
394         error_report("xenfv machine requires the xen accelerator");
395         exit(1);
396     }
397 
398     pc_xen_hvm_init_pci(machine);
399     pci_create_simple(pcms->bus, -1, "xen-platform");
400 }
401 #endif
402 
403 #define DEFINE_I440FX_MACHINE(suffix, name, compatfn, optionfn) \
404     static void pc_init_##suffix(MachineState *machine) \
405     { \
406         void (*compat)(MachineState *m) = (compatfn); \
407         if (compat) { \
408             compat(machine); \
409         } \
410         pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, \
411                  TYPE_I440FX_PCI_DEVICE); \
412     } \
413     DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn)
414 
415 static void pc_i440fx_machine_options(MachineClass *m)
416 {
417     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
418     pcmc->default_nic_model = "e1000";
419 
420     m->family = "pc_piix";
421     m->desc = "Standard PC (i440FX + PIIX, 1996)";
422     m->default_machine_opts = "firmware=bios-256k.bin";
423     m->default_display = "std";
424     machine_class_allow_dynamic_sysbus_dev(m, TYPE_RAMFB_DEVICE);
425 }
426 
427 static void pc_i440fx_4_2_machine_options(MachineClass *m)
428 {
429     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
430     pc_i440fx_machine_options(m);
431     m->alias = "pc";
432     m->is_default = 1;
433     pcmc->default_cpu_version = 1;
434 }
435 
436 DEFINE_I440FX_MACHINE(v4_2, "pc-i440fx-4.2", NULL,
437                       pc_i440fx_4_2_machine_options);
438 
439 static void pc_i440fx_4_1_machine_options(MachineClass *m)
440 {
441     pc_i440fx_4_2_machine_options(m);
442     m->alias = NULL;
443     m->is_default = 0;
444     compat_props_add(m->compat_props, hw_compat_4_1, hw_compat_4_1_len);
445     compat_props_add(m->compat_props, pc_compat_4_1, pc_compat_4_1_len);
446 }
447 
448 DEFINE_I440FX_MACHINE(v4_1, "pc-i440fx-4.1", NULL,
449                       pc_i440fx_4_1_machine_options);
450 
451 static void pc_i440fx_4_0_machine_options(MachineClass *m)
452 {
453     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
454     pc_i440fx_4_1_machine_options(m);
455     m->alias = NULL;
456     m->is_default = 0;
457     pcmc->default_cpu_version = CPU_VERSION_LEGACY;
458     compat_props_add(m->compat_props, hw_compat_4_0, hw_compat_4_0_len);
459     compat_props_add(m->compat_props, pc_compat_4_0, pc_compat_4_0_len);
460 }
461 
462 DEFINE_I440FX_MACHINE(v4_0, "pc-i440fx-4.0", NULL,
463                       pc_i440fx_4_0_machine_options);
464 
465 static void pc_i440fx_3_1_machine_options(MachineClass *m)
466 {
467     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
468 
469     pc_i440fx_4_0_machine_options(m);
470     m->is_default = 0;
471     pcmc->do_not_add_smb_acpi = true;
472     m->smbus_no_migration_support = true;
473     m->alias = NULL;
474     pcmc->pvh_enabled = false;
475     compat_props_add(m->compat_props, hw_compat_3_1, hw_compat_3_1_len);
476     compat_props_add(m->compat_props, pc_compat_3_1, pc_compat_3_1_len);
477 }
478 
479 DEFINE_I440FX_MACHINE(v3_1, "pc-i440fx-3.1", NULL,
480                       pc_i440fx_3_1_machine_options);
481 
482 static void pc_i440fx_3_0_machine_options(MachineClass *m)
483 {
484     pc_i440fx_3_1_machine_options(m);
485     compat_props_add(m->compat_props, hw_compat_3_0, hw_compat_3_0_len);
486     compat_props_add(m->compat_props, pc_compat_3_0, pc_compat_3_0_len);
487 }
488 
489 DEFINE_I440FX_MACHINE(v3_0, "pc-i440fx-3.0", NULL,
490                       pc_i440fx_3_0_machine_options);
491 
492 static void pc_i440fx_2_12_machine_options(MachineClass *m)
493 {
494     pc_i440fx_3_0_machine_options(m);
495     compat_props_add(m->compat_props, hw_compat_2_12, hw_compat_2_12_len);
496     compat_props_add(m->compat_props, pc_compat_2_12, pc_compat_2_12_len);
497 }
498 
499 DEFINE_I440FX_MACHINE(v2_12, "pc-i440fx-2.12", NULL,
500                       pc_i440fx_2_12_machine_options);
501 
502 static void pc_i440fx_2_11_machine_options(MachineClass *m)
503 {
504     pc_i440fx_2_12_machine_options(m);
505     compat_props_add(m->compat_props, hw_compat_2_11, hw_compat_2_11_len);
506     compat_props_add(m->compat_props, pc_compat_2_11, pc_compat_2_11_len);
507 }
508 
509 DEFINE_I440FX_MACHINE(v2_11, "pc-i440fx-2.11", NULL,
510                       pc_i440fx_2_11_machine_options);
511 
512 static void pc_i440fx_2_10_machine_options(MachineClass *m)
513 {
514     pc_i440fx_2_11_machine_options(m);
515     compat_props_add(m->compat_props, hw_compat_2_10, hw_compat_2_10_len);
516     compat_props_add(m->compat_props, pc_compat_2_10, pc_compat_2_10_len);
517     m->auto_enable_numa_with_memhp = false;
518 }
519 
520 DEFINE_I440FX_MACHINE(v2_10, "pc-i440fx-2.10", NULL,
521                       pc_i440fx_2_10_machine_options);
522 
523 static void pc_i440fx_2_9_machine_options(MachineClass *m)
524 {
525     pc_i440fx_2_10_machine_options(m);
526     compat_props_add(m->compat_props, hw_compat_2_9, hw_compat_2_9_len);
527     compat_props_add(m->compat_props, pc_compat_2_9, pc_compat_2_9_len);
528     m->numa_auto_assign_ram = numa_legacy_auto_assign_ram;
529 }
530 
531 DEFINE_I440FX_MACHINE(v2_9, "pc-i440fx-2.9", NULL,
532                       pc_i440fx_2_9_machine_options);
533 
534 static void pc_i440fx_2_8_machine_options(MachineClass *m)
535 {
536     pc_i440fx_2_9_machine_options(m);
537     compat_props_add(m->compat_props, hw_compat_2_8, hw_compat_2_8_len);
538     compat_props_add(m->compat_props, pc_compat_2_8, pc_compat_2_8_len);
539 }
540 
541 DEFINE_I440FX_MACHINE(v2_8, "pc-i440fx-2.8", NULL,
542                       pc_i440fx_2_8_machine_options);
543 
544 static void pc_i440fx_2_7_machine_options(MachineClass *m)
545 {
546     pc_i440fx_2_8_machine_options(m);
547     compat_props_add(m->compat_props, hw_compat_2_7, hw_compat_2_7_len);
548     compat_props_add(m->compat_props, pc_compat_2_7, pc_compat_2_7_len);
549 }
550 
551 DEFINE_I440FX_MACHINE(v2_7, "pc-i440fx-2.7", NULL,
552                       pc_i440fx_2_7_machine_options);
553 
554 static void pc_i440fx_2_6_machine_options(MachineClass *m)
555 {
556     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
557 
558     pc_i440fx_2_7_machine_options(m);
559     pcmc->legacy_cpu_hotplug = true;
560     pcmc->linuxboot_dma_enabled = false;
561     compat_props_add(m->compat_props, hw_compat_2_6, hw_compat_2_6_len);
562     compat_props_add(m->compat_props, pc_compat_2_6, pc_compat_2_6_len);
563 }
564 
565 DEFINE_I440FX_MACHINE(v2_6, "pc-i440fx-2.6", NULL,
566                       pc_i440fx_2_6_machine_options);
567 
568 static void pc_i440fx_2_5_machine_options(MachineClass *m)
569 {
570     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
571 
572     pc_i440fx_2_6_machine_options(m);
573     pcmc->save_tsc_khz = false;
574     m->legacy_fw_cfg_order = 1;
575     compat_props_add(m->compat_props, hw_compat_2_5, hw_compat_2_5_len);
576     compat_props_add(m->compat_props, pc_compat_2_5, pc_compat_2_5_len);
577 }
578 
579 DEFINE_I440FX_MACHINE(v2_5, "pc-i440fx-2.5", NULL,
580                       pc_i440fx_2_5_machine_options);
581 
582 static void pc_i440fx_2_4_machine_options(MachineClass *m)
583 {
584     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
585 
586     pc_i440fx_2_5_machine_options(m);
587     m->hw_version = "2.4.0";
588     pcmc->broken_reserved_end = true;
589     compat_props_add(m->compat_props, hw_compat_2_4, hw_compat_2_4_len);
590     compat_props_add(m->compat_props, pc_compat_2_4, pc_compat_2_4_len);
591 }
592 
593 DEFINE_I440FX_MACHINE(v2_4, "pc-i440fx-2.4", NULL,
594                       pc_i440fx_2_4_machine_options)
595 
596 static void pc_i440fx_2_3_machine_options(MachineClass *m)
597 {
598     pc_i440fx_2_4_machine_options(m);
599     m->hw_version = "2.3.0";
600     compat_props_add(m->compat_props, hw_compat_2_3, hw_compat_2_3_len);
601     compat_props_add(m->compat_props, pc_compat_2_3, pc_compat_2_3_len);
602 }
603 
604 DEFINE_I440FX_MACHINE(v2_3, "pc-i440fx-2.3", pc_compat_2_3_fn,
605                       pc_i440fx_2_3_machine_options);
606 
607 static void pc_i440fx_2_2_machine_options(MachineClass *m)
608 {
609     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
610 
611     pc_i440fx_2_3_machine_options(m);
612     m->hw_version = "2.2.0";
613     m->default_machine_opts = "firmware=bios-256k.bin,suppress-vmdesc=on";
614     compat_props_add(m->compat_props, hw_compat_2_2, hw_compat_2_2_len);
615     compat_props_add(m->compat_props, pc_compat_2_2, pc_compat_2_2_len);
616     pcmc->rsdp_in_ram = false;
617 }
618 
619 DEFINE_I440FX_MACHINE(v2_2, "pc-i440fx-2.2", pc_compat_2_2_fn,
620                       pc_i440fx_2_2_machine_options);
621 
622 static void pc_i440fx_2_1_machine_options(MachineClass *m)
623 {
624     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
625 
626     pc_i440fx_2_2_machine_options(m);
627     m->hw_version = "2.1.0";
628     m->default_display = NULL;
629     compat_props_add(m->compat_props, hw_compat_2_1, hw_compat_2_1_len);
630     compat_props_add(m->compat_props, pc_compat_2_1, pc_compat_2_1_len);
631     pcmc->smbios_uuid_encoded = false;
632     pcmc->enforce_aligned_dimm = false;
633 }
634 
635 DEFINE_I440FX_MACHINE(v2_1, "pc-i440fx-2.1", pc_compat_2_1_fn,
636                       pc_i440fx_2_1_machine_options);
637 
638 static void pc_i440fx_2_0_machine_options(MachineClass *m)
639 {
640     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
641 
642     pc_i440fx_2_1_machine_options(m);
643     m->hw_version = "2.0.0";
644     compat_props_add(m->compat_props, pc_compat_2_0, pc_compat_2_0_len);
645     pcmc->smbios_legacy_mode = true;
646     pcmc->has_reserved_memory = false;
647     /* This value depends on the actual DSDT and SSDT compiled into
648      * the source QEMU; unfortunately it depends on the binary and
649      * not on the machine type, so we cannot make pc-i440fx-1.7 work on
650      * both QEMU 1.7 and QEMU 2.0.
651      *
652      * Large variations cause migration to fail for more than one
653      * consecutive value of the "-smp" maxcpus option.
654      *
655      * For small variations of the kind caused by different iasl versions,
656      * the 4k rounding usually leaves slack.  However, there could be still
657      * one or two values that break.  For QEMU 1.7 and QEMU 2.0 the
658      * slack is only ~10 bytes before one "-smp maxcpus" value breaks!
659      *
660      * 6652 is valid for QEMU 2.0, the right value for pc-i440fx-1.7 on
661      * QEMU 1.7 it is 6414.  For RHEL/CentOS 7.0 it is 6418.
662      */
663     pcmc->legacy_acpi_table_size = 6652;
664     pcmc->acpi_data_size = 0x10000;
665 }
666 
667 DEFINE_I440FX_MACHINE(v2_0, "pc-i440fx-2.0", pc_compat_2_0_fn,
668                       pc_i440fx_2_0_machine_options);
669 
670 static void pc_i440fx_1_7_machine_options(MachineClass *m)
671 {
672     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
673 
674     pc_i440fx_2_0_machine_options(m);
675     m->hw_version = "1.7.0";
676     m->default_machine_opts = NULL;
677     m->option_rom_has_mr = true;
678     compat_props_add(m->compat_props, pc_compat_1_7, pc_compat_1_7_len);
679     pcmc->smbios_defaults = false;
680     pcmc->gigabyte_align = false;
681     pcmc->legacy_acpi_table_size = 6414;
682 }
683 
684 DEFINE_I440FX_MACHINE(v1_7, "pc-i440fx-1.7", pc_compat_1_7_fn,
685                       pc_i440fx_1_7_machine_options);
686 
687 static void pc_i440fx_1_6_machine_options(MachineClass *m)
688 {
689     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
690 
691     pc_i440fx_1_7_machine_options(m);
692     m->hw_version = "1.6.0";
693     m->rom_file_has_mr = false;
694     compat_props_add(m->compat_props, pc_compat_1_6, pc_compat_1_6_len);
695     pcmc->has_acpi_build = false;
696 }
697 
698 DEFINE_I440FX_MACHINE(v1_6, "pc-i440fx-1.6", pc_compat_1_6_fn,
699                       pc_i440fx_1_6_machine_options);
700 
701 static void pc_i440fx_1_5_machine_options(MachineClass *m)
702 {
703     pc_i440fx_1_6_machine_options(m);
704     m->hw_version = "1.5.0";
705     compat_props_add(m->compat_props, pc_compat_1_5, pc_compat_1_5_len);
706 }
707 
708 DEFINE_I440FX_MACHINE(v1_5, "pc-i440fx-1.5", pc_compat_1_5_fn,
709                       pc_i440fx_1_5_machine_options);
710 
711 static void pc_i440fx_1_4_machine_options(MachineClass *m)
712 {
713     pc_i440fx_1_5_machine_options(m);
714     m->hw_version = "1.4.0";
715     m->hot_add_cpu = NULL;
716     compat_props_add(m->compat_props, pc_compat_1_4, pc_compat_1_4_len);
717 }
718 
719 DEFINE_I440FX_MACHINE(v1_4, "pc-i440fx-1.4", pc_compat_1_4_fn,
720                       pc_i440fx_1_4_machine_options);
721 
722 static void pc_i440fx_1_3_machine_options(MachineClass *m)
723 {
724     X86MachineClass *x86mc = X86_MACHINE_CLASS(m);
725     static GlobalProperty compat[] = {
726         PC_CPU_MODEL_IDS("1.3.0")
727         { "usb-tablet", "usb_version", "1" },
728         { "virtio-net-pci", "ctrl_mac_addr", "off" },
729         { "virtio-net-pci", "mq", "off" },
730         { "e1000", "autonegotiation", "off" },
731     };
732 
733     pc_i440fx_1_4_machine_options(m);
734     m->hw_version = "1.3.0";
735     x86mc->compat_apic_id_mode = true;
736     compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
737 }
738 
739 DEFINE_I440FX_MACHINE(v1_3, "pc-1.3", pc_compat_1_3,
740                       pc_i440fx_1_3_machine_options);
741 
742 
743 static void pc_i440fx_1_2_machine_options(MachineClass *m)
744 {
745     static GlobalProperty compat[] = {
746         PC_CPU_MODEL_IDS("1.2.0")
747         { "nec-usb-xhci", "msi", "off" },
748         { "nec-usb-xhci", "msix", "off" },
749         { "qxl", "revision", "3" },
750         { "qxl-vga", "revision", "3" },
751         { "VGA", "mmio", "off" },
752     };
753 
754     pc_i440fx_1_3_machine_options(m);
755     m->hw_version = "1.2.0";
756     compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
757 }
758 
759 DEFINE_I440FX_MACHINE(v1_2, "pc-1.2", pc_compat_1_2,
760                       pc_i440fx_1_2_machine_options);
761 
762 
763 static void pc_i440fx_1_1_machine_options(MachineClass *m)
764 {
765     static GlobalProperty compat[] = {
766         PC_CPU_MODEL_IDS("1.1.0")
767         { "virtio-scsi-pci", "hotplug", "off" },
768         { "virtio-scsi-pci", "param_change", "off" },
769         { "VGA", "vgamem_mb", "8" },
770         { "vmware-svga", "vgamem_mb", "8" },
771         { "qxl-vga", "vgamem_mb", "8" },
772         { "qxl", "vgamem_mb", "8" },
773         { "virtio-blk-pci", "config-wce", "off" },
774     };
775 
776     pc_i440fx_1_2_machine_options(m);
777     m->hw_version = "1.1.0";
778     compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
779 }
780 
781 DEFINE_I440FX_MACHINE(v1_1, "pc-1.1", pc_compat_1_2,
782                       pc_i440fx_1_1_machine_options);
783 
784 static void pc_i440fx_1_0_machine_options(MachineClass *m)
785 {
786     static GlobalProperty compat[] = {
787         PC_CPU_MODEL_IDS("1.0")
788         { TYPE_ISA_FDC, "check_media_rate", "off" },
789         { "virtio-balloon-pci", "class", stringify(PCI_CLASS_MEMORY_RAM) },
790         { "apic-common", "vapic", "off" },
791         { TYPE_USB_DEVICE, "full-path", "no" },
792     };
793 
794     pc_i440fx_1_1_machine_options(m);
795     m->hw_version = "1.0";
796     compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
797 }
798 
799 DEFINE_I440FX_MACHINE(v1_0, "pc-1.0", pc_compat_1_2,
800                       pc_i440fx_1_0_machine_options);
801 
802 
803 static void pc_i440fx_0_15_machine_options(MachineClass *m)
804 {
805     static GlobalProperty compat[] = {
806         PC_CPU_MODEL_IDS("0.15")
807     };
808 
809     pc_i440fx_1_0_machine_options(m);
810     m->hw_version = "0.15";
811     m->deprecation_reason = "use a newer machine type instead";
812     compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
813 }
814 
815 DEFINE_I440FX_MACHINE(v0_15, "pc-0.15", pc_compat_1_2,
816                       pc_i440fx_0_15_machine_options);
817 
818 
819 static void pc_i440fx_0_14_machine_options(MachineClass *m)
820 {
821     static GlobalProperty compat[] = {
822         PC_CPU_MODEL_IDS("0.14")
823         { "virtio-blk-pci", "event_idx", "off" },
824         { "virtio-serial-pci", "event_idx", "off" },
825         { "virtio-net-pci", "event_idx", "off" },
826         { "virtio-balloon-pci", "event_idx", "off" },
827         { "qxl", "revision", "2" },
828         { "qxl-vga", "revision", "2" },
829     };
830 
831     pc_i440fx_0_15_machine_options(m);
832     m->hw_version = "0.14";
833     compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
834 }
835 
836 DEFINE_I440FX_MACHINE(v0_14, "pc-0.14", pc_compat_1_2,
837                       pc_i440fx_0_14_machine_options);
838 
839 static void pc_i440fx_0_13_machine_options(MachineClass *m)
840 {
841     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
842     static GlobalProperty compat[] = {
843         PC_CPU_MODEL_IDS("0.13")
844         { TYPE_PCI_DEVICE, "command_serr_enable", "off" },
845         { "AC97", "use_broken_id", "1" },
846         { "virtio-9p-pci", "vectors", "0" },
847         { "VGA", "rombar", "0" },
848         { "vmware-svga", "rombar", "0" },
849     };
850 
851     pc_i440fx_0_14_machine_options(m);
852     m->hw_version = "0.13";
853     compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
854     pcmc->kvmclock_enabled = false;
855 }
856 
857 DEFINE_I440FX_MACHINE(v0_13, "pc-0.13", pc_compat_0_13,
858                       pc_i440fx_0_13_machine_options);
859 
860 static void pc_i440fx_0_12_machine_options(MachineClass *m)
861 {
862     static GlobalProperty compat[] = {
863         PC_CPU_MODEL_IDS("0.12")
864         { "virtio-serial-pci", "max_ports", "1" },
865         { "virtio-serial-pci", "vectors", "0" },
866         { "usb-mouse", "serial", "1" },
867         { "usb-tablet", "serial", "1" },
868         { "usb-kbd", "serial", "1" },
869     };
870 
871     pc_i440fx_0_13_machine_options(m);
872     m->hw_version = "0.12";
873     compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
874 }
875 
876 DEFINE_I440FX_MACHINE(v0_12, "pc-0.12", pc_compat_0_13,
877                       pc_i440fx_0_12_machine_options);
878 
879 typedef struct {
880     uint16_t gpu_device_id;
881     uint16_t pch_device_id;
882     uint8_t pch_revision_id;
883 } IGDDeviceIDInfo;
884 
885 /* In real world different GPU should have different PCH. But actually
886  * the different PCH DIDs likely map to different PCH SKUs. We do the
887  * same thing for the GPU. For PCH, the different SKUs are going to be
888  * all the same silicon design and implementation, just different
889  * features turn on and off with fuses. The SW interfaces should be
890  * consistent across all SKUs in a given family (eg LPT). But just same
891  * features may not be supported.
892  *
893  * Most of these different PCH features probably don't matter to the
894  * Gfx driver, but obviously any difference in display port connections
895  * will so it should be fine with any PCH in case of passthrough.
896  *
897  * So currently use one PCH version, 0x8c4e, to cover all HSW(Haswell)
898  * scenarios, 0x9cc3 for BDW(Broadwell).
899  */
900 static const IGDDeviceIDInfo igd_combo_id_infos[] = {
901     /* HSW Classic */
902     {0x0402, 0x8c4e, 0x04}, /* HSWGT1D, HSWD_w7 */
903     {0x0406, 0x8c4e, 0x04}, /* HSWGT1M, HSWM_w7 */
904     {0x0412, 0x8c4e, 0x04}, /* HSWGT2D, HSWD_w7 */
905     {0x0416, 0x8c4e, 0x04}, /* HSWGT2M, HSWM_w7 */
906     {0x041E, 0x8c4e, 0x04}, /* HSWGT15D, HSWD_w7 */
907     /* HSW ULT */
908     {0x0A06, 0x8c4e, 0x04}, /* HSWGT1UT, HSWM_w7 */
909     {0x0A16, 0x8c4e, 0x04}, /* HSWGT2UT, HSWM_w7 */
910     {0x0A26, 0x8c4e, 0x06}, /* HSWGT3UT, HSWM_w7 */
911     {0x0A2E, 0x8c4e, 0x04}, /* HSWGT3UT28W, HSWM_w7 */
912     {0x0A1E, 0x8c4e, 0x04}, /* HSWGT2UX, HSWM_w7 */
913     {0x0A0E, 0x8c4e, 0x04}, /* HSWGT1ULX, HSWM_w7 */
914     /* HSW CRW */
915     {0x0D26, 0x8c4e, 0x04}, /* HSWGT3CW, HSWM_w7 */
916     {0x0D22, 0x8c4e, 0x04}, /* HSWGT3CWDT, HSWD_w7 */
917     /* HSW Server */
918     {0x041A, 0x8c4e, 0x04}, /* HSWSVGT2, HSWD_w7 */
919     /* HSW SRVR */
920     {0x040A, 0x8c4e, 0x04}, /* HSWSVGT1, HSWD_w7 */
921     /* BSW */
922     {0x1606, 0x9cc3, 0x03}, /* BDWULTGT1, BDWM_w7 */
923     {0x1616, 0x9cc3, 0x03}, /* BDWULTGT2, BDWM_w7 */
924     {0x1626, 0x9cc3, 0x03}, /* BDWULTGT3, BDWM_w7 */
925     {0x160E, 0x9cc3, 0x03}, /* BDWULXGT1, BDWM_w7 */
926     {0x161E, 0x9cc3, 0x03}, /* BDWULXGT2, BDWM_w7 */
927     {0x1602, 0x9cc3, 0x03}, /* BDWHALOGT1, BDWM_w7 */
928     {0x1612, 0x9cc3, 0x03}, /* BDWHALOGT2, BDWM_w7 */
929     {0x1622, 0x9cc3, 0x03}, /* BDWHALOGT3, BDWM_w7 */
930     {0x162B, 0x9cc3, 0x03}, /* BDWHALO28W, BDWM_w7 */
931     {0x162A, 0x9cc3, 0x03}, /* BDWGT3WRKS, BDWM_w7 */
932     {0x162D, 0x9cc3, 0x03}, /* BDWGT3SRVR, BDWM_w7 */
933 };
934 
935 static void isa_bridge_class_init(ObjectClass *klass, void *data)
936 {
937     DeviceClass *dc = DEVICE_CLASS(klass);
938     PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
939 
940     dc->desc        = "ISA bridge faked to support IGD PT";
941     set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
942     k->vendor_id    = PCI_VENDOR_ID_INTEL;
943     k->class_id     = PCI_CLASS_BRIDGE_ISA;
944 };
945 
946 static TypeInfo isa_bridge_info = {
947     .name          = "igd-passthrough-isa-bridge",
948     .parent        = TYPE_PCI_DEVICE,
949     .instance_size = sizeof(PCIDevice),
950     .class_init = isa_bridge_class_init,
951     .interfaces = (InterfaceInfo[]) {
952         { INTERFACE_CONVENTIONAL_PCI_DEVICE },
953         { },
954     },
955 };
956 
957 static void pt_graphics_register_types(void)
958 {
959     type_register_static(&isa_bridge_info);
960 }
961 type_init(pt_graphics_register_types)
962 
963 void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id)
964 {
965     struct PCIDevice *bridge_dev;
966     int i, num;
967     uint16_t pch_dev_id = 0xffff;
968     uint8_t pch_rev_id;
969 
970     num = ARRAY_SIZE(igd_combo_id_infos);
971     for (i = 0; i < num; i++) {
972         if (gpu_dev_id == igd_combo_id_infos[i].gpu_device_id) {
973             pch_dev_id = igd_combo_id_infos[i].pch_device_id;
974             pch_rev_id = igd_combo_id_infos[i].pch_revision_id;
975         }
976     }
977 
978     if (pch_dev_id == 0xffff) {
979         return;
980     }
981 
982     /* Currently IGD drivers always need to access PCH by 1f.0. */
983     bridge_dev = pci_create_simple(bus, PCI_DEVFN(0x1f, 0),
984                                    "igd-passthrough-isa-bridge");
985 
986     /*
987      * Note that vendor id is always PCI_VENDOR_ID_INTEL.
988      */
989     if (!bridge_dev) {
990         fprintf(stderr, "set igd-passthrough-isa-bridge failed!\n");
991         return;
992     }
993     pci_config_set_device_id(bridge_dev->config, pch_dev_id);
994     pci_config_set_revision(bridge_dev->config, pch_rev_id);
995 }
996 
997 static void isapc_machine_options(MachineClass *m)
998 {
999     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
1000     m->desc = "ISA-only PC";
1001     m->max_cpus = 1;
1002     m->option_rom_has_mr = true;
1003     m->rom_file_has_mr = false;
1004     pcmc->pci_enabled = false;
1005     pcmc->has_acpi_build = false;
1006     pcmc->smbios_defaults = false;
1007     pcmc->gigabyte_align = false;
1008     pcmc->smbios_legacy_mode = true;
1009     pcmc->has_reserved_memory = false;
1010     pcmc->default_nic_model = "ne2k_isa";
1011     m->default_cpu_type = X86_CPU_TYPE_NAME("486");
1012 }
1013 
1014 DEFINE_PC_MACHINE(isapc, "isapc", pc_init_isa,
1015                   isapc_machine_options);
1016 
1017 
1018 #ifdef CONFIG_XEN
1019 static void xenfv_machine_options(MachineClass *m)
1020 {
1021     m->desc = "Xen Fully-virtualized PC";
1022     m->max_cpus = HVM_MAX_VCPUS;
1023     m->default_machine_opts = "accel=xen";
1024 }
1025 
1026 DEFINE_PC_MACHINE(xenfv, "xenfv", pc_xen_hvm_init,
1027                   xenfv_machine_options);
1028 #endif
1029