1 /* 2 * QEMU PC System Emulator 3 * 4 * Copyright (c) 2003-2004 Fabrice Bellard 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 #include "qemu/osdep.h" 26 #include CONFIG_DEVICES 27 28 #include "qemu/units.h" 29 #include "hw/loader.h" 30 #include "hw/i386/x86.h" 31 #include "hw/i386/pc.h" 32 #include "hw/i386/apic.h" 33 #include "hw/pci-host/i440fx.h" 34 #include "hw/southbridge/piix.h" 35 #include "hw/display/ramfb.h" 36 #include "hw/firmware/smbios.h" 37 #include "hw/pci/pci.h" 38 #include "hw/pci/pci_ids.h" 39 #include "hw/usb.h" 40 #include "net/net.h" 41 #include "hw/ide/pci.h" 42 #include "hw/irq.h" 43 #include "sysemu/kvm.h" 44 #include "hw/kvm/clock.h" 45 #include "hw/sysbus.h" 46 #include "hw/i2c/smbus_eeprom.h" 47 #include "hw/xen/xen-x86.h" 48 #include "exec/memory.h" 49 #include "hw/acpi/acpi.h" 50 #include "qapi/error.h" 51 #include "qemu/error-report.h" 52 #include "sysemu/xen.h" 53 #ifdef CONFIG_XEN 54 #include <xen/hvm/hvm_info_table.h> 55 #include "hw/xen/xen_pt.h" 56 #endif 57 #include "migration/global_state.h" 58 #include "migration/misc.h" 59 #include "sysemu/numa.h" 60 #include "hw/hyperv/vmbus-bridge.h" 61 #include "hw/mem/nvdimm.h" 62 #include "hw/i386/acpi-build.h" 63 #include "kvm/kvm-cpu.h" 64 65 #define MAX_IDE_BUS 2 66 67 #ifdef CONFIG_IDE_ISA 68 static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 }; 69 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 }; 70 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 }; 71 #endif 72 73 /* PC hardware initialisation */ 74 static void pc_init1(MachineState *machine, 75 const char *host_type, const char *pci_type) 76 { 77 PCMachineState *pcms = PC_MACHINE(machine); 78 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); 79 X86MachineState *x86ms = X86_MACHINE(machine); 80 MemoryRegion *system_memory = get_system_memory(); 81 MemoryRegion *system_io = get_system_io(); 82 PCIBus *pci_bus; 83 ISABus *isa_bus; 84 PCII440FXState *i440fx_state; 85 int piix3_devfn = -1; 86 qemu_irq smi_irq; 87 GSIState *gsi_state; 88 BusState *idebus[MAX_IDE_BUS]; 89 ISADevice *rtc_state; 90 MemoryRegion *ram_memory; 91 MemoryRegion *pci_memory; 92 MemoryRegion *rom_memory; 93 ram_addr_t lowmem; 94 95 /* 96 * Calculate ram split, for memory below and above 4G. It's a bit 97 * complicated for backward compatibility reasons ... 98 * 99 * - Traditional split is 3.5G (lowmem = 0xe0000000). This is the 100 * default value for max_ram_below_4g now. 101 * 102 * - Then, to gigabyte align the memory, we move the split to 3G 103 * (lowmem = 0xc0000000). But only in case we have to split in 104 * the first place, i.e. ram_size is larger than (traditional) 105 * lowmem. And for new machine types (gigabyte_align = true) 106 * only, for live migration compatibility reasons. 107 * 108 * - Next the max-ram-below-4g option was added, which allowed to 109 * reduce lowmem to a smaller value, to allow a larger PCI I/O 110 * window below 4G. qemu doesn't enforce gigabyte alignment here, 111 * but prints a warning. 112 * 113 * - Finally max-ram-below-4g got updated to also allow raising lowmem, 114 * so legacy non-PAE guests can get as much memory as possible in 115 * the 32bit address space below 4G. 116 * 117 * - Note that Xen has its own ram setup code in xen_ram_init(), 118 * called via xen_hvm_init_pc(). 119 * 120 * Examples: 121 * qemu -M pc-1.7 -m 4G (old default) -> 3584M low, 512M high 122 * qemu -M pc -m 4G (new default) -> 3072M low, 1024M high 123 * qemu -M pc,max-ram-below-4g=2G -m 4G -> 2048M low, 2048M high 124 * qemu -M pc,max-ram-below-4g=4G -m 3968M -> 3968M low (=4G-128M) 125 */ 126 if (xen_enabled()) { 127 xen_hvm_init_pc(pcms, &ram_memory); 128 } else { 129 if (!pcms->max_ram_below_4g) { 130 pcms->max_ram_below_4g = 0xe0000000; /* default: 3.5G */ 131 } 132 lowmem = pcms->max_ram_below_4g; 133 if (machine->ram_size >= pcms->max_ram_below_4g) { 134 if (pcmc->gigabyte_align) { 135 if (lowmem > 0xc0000000) { 136 lowmem = 0xc0000000; 137 } 138 if (lowmem & (1 * GiB - 1)) { 139 warn_report("Large machine and max_ram_below_4g " 140 "(%" PRIu64 ") not a multiple of 1G; " 141 "possible bad performance.", 142 pcms->max_ram_below_4g); 143 } 144 } 145 } 146 147 if (machine->ram_size >= lowmem) { 148 x86ms->above_4g_mem_size = machine->ram_size - lowmem; 149 x86ms->below_4g_mem_size = lowmem; 150 } else { 151 x86ms->above_4g_mem_size = 0; 152 x86ms->below_4g_mem_size = machine->ram_size; 153 } 154 } 155 156 pc_machine_init_sgx_epc(pcms); 157 x86_cpus_init(x86ms, pcmc->default_cpu_version); 158 159 if (pcmc->kvmclock_enabled) { 160 kvmclock_create(pcmc->kvmclock_create_always); 161 } 162 163 if (pcmc->pci_enabled) { 164 pci_memory = g_new(MemoryRegion, 1); 165 memory_region_init(pci_memory, NULL, "pci", UINT64_MAX); 166 rom_memory = pci_memory; 167 } else { 168 pci_memory = NULL; 169 rom_memory = system_memory; 170 } 171 172 pc_guest_info_init(pcms); 173 174 if (pcmc->smbios_defaults) { 175 MachineClass *mc = MACHINE_GET_CLASS(machine); 176 /* These values are guest ABI, do not change */ 177 smbios_set_defaults("QEMU", "Standard PC (i440FX + PIIX, 1996)", 178 mc->name, pcmc->smbios_legacy_mode, 179 pcmc->smbios_uuid_encoded, 180 SMBIOS_ENTRY_POINT_21); 181 } 182 183 /* allocate ram and load rom/bios */ 184 if (!xen_enabled()) { 185 pc_memory_init(pcms, system_memory, 186 rom_memory, &ram_memory); 187 } else { 188 pc_system_flash_cleanup_unused(pcms); 189 if (machine->kernel_filename != NULL) { 190 /* For xen HVM direct kernel boot, load linux here */ 191 xen_load_linux(pcms); 192 } 193 } 194 195 gsi_state = pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled); 196 197 if (pcmc->pci_enabled) { 198 PIIX3State *piix3; 199 200 pci_bus = i440fx_init(host_type, 201 pci_type, 202 &i440fx_state, 203 system_memory, system_io, machine->ram_size, 204 x86ms->below_4g_mem_size, 205 x86ms->above_4g_mem_size, 206 pci_memory, ram_memory); 207 pcms->bus = pci_bus; 208 209 piix3 = piix3_create(pci_bus, &isa_bus); 210 piix3->pic = x86ms->gsi; 211 piix3_devfn = piix3->dev.devfn; 212 } else { 213 pci_bus = NULL; 214 i440fx_state = NULL; 215 isa_bus = isa_bus_new(NULL, get_system_memory(), system_io, 216 &error_abort); 217 pcms->hpet_enabled = false; 218 } 219 isa_bus_irqs(isa_bus, x86ms->gsi); 220 221 pc_i8259_create(isa_bus, gsi_state->i8259_irq); 222 223 if (pcmc->pci_enabled) { 224 ioapic_init_gsi(gsi_state, "i440fx"); 225 } 226 227 if (tcg_enabled()) { 228 x86_register_ferr_irq(x86ms->gsi[13]); 229 } 230 231 pc_vga_init(isa_bus, pcmc->pci_enabled ? pci_bus : NULL); 232 233 assert(pcms->vmport != ON_OFF_AUTO__MAX); 234 if (pcms->vmport == ON_OFF_AUTO_AUTO) { 235 pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON; 236 } 237 238 /* init basic PC hardware */ 239 pc_basic_device_init(pcms, isa_bus, x86ms->gsi, &rtc_state, true, 240 0x4); 241 242 pc_nic_init(pcmc, isa_bus, pci_bus); 243 244 if (pcmc->pci_enabled) { 245 PCIDevice *dev; 246 247 dev = pci_create_simple(pci_bus, piix3_devfn + 1, 248 xen_enabled() ? "piix3-ide-xen" : "piix3-ide"); 249 pci_ide_create_devs(dev); 250 idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0"); 251 idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1"); 252 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state); 253 } 254 #ifdef CONFIG_IDE_ISA 255 else { 256 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; 257 int i; 258 259 ide_drive_get(hd, ARRAY_SIZE(hd)); 260 for (i = 0; i < MAX_IDE_BUS; i++) { 261 ISADevice *dev; 262 char busname[] = "ide.0"; 263 dev = isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i], 264 ide_irq[i], 265 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]); 266 /* 267 * The ide bus name is ide.0 for the first bus and ide.1 for the 268 * second one. 269 */ 270 busname[4] = '0' + i; 271 idebus[i] = qdev_get_child_bus(DEVICE(dev), busname); 272 } 273 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state); 274 } 275 #endif 276 277 if (pcmc->pci_enabled && machine_usb(machine)) { 278 pci_create_simple(pci_bus, piix3_devfn + 2, "piix3-usb-uhci"); 279 } 280 281 if (pcmc->pci_enabled && x86_machine_is_acpi_enabled(X86_MACHINE(pcms))) { 282 DeviceState *piix4_pm; 283 284 smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0); 285 /* TODO: Populate SPD eeprom data. */ 286 pcms->smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, 287 x86ms->gsi[9], smi_irq, 288 x86_machine_is_smm_enabled(x86ms), 289 &piix4_pm); 290 smbus_eeprom_init(pcms->smbus, 8, NULL, 0); 291 292 object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP, 293 TYPE_HOTPLUG_HANDLER, 294 (Object **)&x86ms->acpi_dev, 295 object_property_allow_set_link, 296 OBJ_PROP_LINK_STRONG); 297 object_property_set_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP, 298 OBJECT(piix4_pm), &error_abort); 299 } 300 301 if (machine->nvdimms_state->is_enabled) { 302 nvdimm_init_acpi_state(machine->nvdimms_state, system_io, 303 x86_nvdimm_acpi_dsmio, 304 x86ms->fw_cfg, OBJECT(pcms)); 305 } 306 } 307 308 /* Looking for a pc_compat_2_4() function? It doesn't exist. 309 * pc_compat_*() functions that run on machine-init time and 310 * change global QEMU state are deprecated. Please don't create 311 * one, and implement any pc-*-2.4 (and newer) compat code in 312 * hw_compat_*, pc_compat_*, or * pc_*_machine_options(). 313 */ 314 315 static void pc_compat_2_3_fn(MachineState *machine) 316 { 317 X86MachineState *x86ms = X86_MACHINE(machine); 318 if (kvm_enabled()) { 319 x86ms->smm = ON_OFF_AUTO_OFF; 320 } 321 } 322 323 static void pc_compat_2_2_fn(MachineState *machine) 324 { 325 pc_compat_2_3_fn(machine); 326 } 327 328 static void pc_compat_2_1_fn(MachineState *machine) 329 { 330 pc_compat_2_2_fn(machine); 331 x86_cpu_change_kvm_default("svm", NULL); 332 } 333 334 static void pc_compat_2_0_fn(MachineState *machine) 335 { 336 pc_compat_2_1_fn(machine); 337 } 338 339 static void pc_compat_1_7_fn(MachineState *machine) 340 { 341 pc_compat_2_0_fn(machine); 342 x86_cpu_change_kvm_default("x2apic", NULL); 343 } 344 345 static void pc_compat_1_6_fn(MachineState *machine) 346 { 347 pc_compat_1_7_fn(machine); 348 } 349 350 static void pc_compat_1_5_fn(MachineState *machine) 351 { 352 pc_compat_1_6_fn(machine); 353 } 354 355 static void pc_compat_1_4_fn(MachineState *machine) 356 { 357 pc_compat_1_5_fn(machine); 358 } 359 360 static void pc_init_isa(MachineState *machine) 361 { 362 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, TYPE_I440FX_PCI_DEVICE); 363 } 364 365 #ifdef CONFIG_XEN 366 static void pc_xen_hvm_init_pci(MachineState *machine) 367 { 368 const char *pci_type = xen_igd_gfx_pt_enabled() ? 369 TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE : TYPE_I440FX_PCI_DEVICE; 370 371 pc_init1(machine, 372 TYPE_I440FX_PCI_HOST_BRIDGE, 373 pci_type); 374 } 375 376 static void pc_xen_hvm_init(MachineState *machine) 377 { 378 PCMachineState *pcms = PC_MACHINE(machine); 379 380 if (!xen_enabled()) { 381 error_report("xenfv machine requires the xen accelerator"); 382 exit(1); 383 } 384 385 pc_xen_hvm_init_pci(machine); 386 pci_create_simple(pcms->bus, -1, "xen-platform"); 387 } 388 #endif 389 390 #define DEFINE_I440FX_MACHINE(suffix, name, compatfn, optionfn) \ 391 static void pc_init_##suffix(MachineState *machine) \ 392 { \ 393 void (*compat)(MachineState *m) = (compatfn); \ 394 if (compat) { \ 395 compat(machine); \ 396 } \ 397 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, \ 398 TYPE_I440FX_PCI_DEVICE); \ 399 } \ 400 DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn) 401 402 static void pc_i440fx_machine_options(MachineClass *m) 403 { 404 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 405 pcmc->default_nic_model = "e1000"; 406 pcmc->pci_root_uid = 0; 407 408 m->family = "pc_piix"; 409 m->desc = "Standard PC (i440FX + PIIX, 1996)"; 410 m->default_machine_opts = "firmware=bios-256k.bin"; 411 m->default_display = "std"; 412 machine_class_allow_dynamic_sysbus_dev(m, TYPE_RAMFB_DEVICE); 413 machine_class_allow_dynamic_sysbus_dev(m, TYPE_VMBUS_BRIDGE); 414 } 415 416 static void pc_i440fx_6_2_machine_options(MachineClass *m) 417 { 418 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 419 pc_i440fx_machine_options(m); 420 m->alias = "pc"; 421 m->is_default = true; 422 pcmc->default_cpu_version = 1; 423 } 424 425 DEFINE_I440FX_MACHINE(v6_2, "pc-i440fx-6.2", NULL, 426 pc_i440fx_6_2_machine_options); 427 428 static void pc_i440fx_6_1_machine_options(MachineClass *m) 429 { 430 pc_i440fx_6_2_machine_options(m); 431 m->alias = NULL; 432 m->is_default = false; 433 compat_props_add(m->compat_props, hw_compat_6_1, hw_compat_6_1_len); 434 compat_props_add(m->compat_props, pc_compat_6_1, pc_compat_6_1_len); 435 m->smp_props.prefer_sockets = true; 436 } 437 438 DEFINE_I440FX_MACHINE(v6_1, "pc-i440fx-6.1", NULL, 439 pc_i440fx_6_1_machine_options); 440 441 static void pc_i440fx_6_0_machine_options(MachineClass *m) 442 { 443 pc_i440fx_6_1_machine_options(m); 444 m->alias = NULL; 445 m->is_default = false; 446 compat_props_add(m->compat_props, hw_compat_6_0, hw_compat_6_0_len); 447 compat_props_add(m->compat_props, pc_compat_6_0, pc_compat_6_0_len); 448 } 449 450 DEFINE_I440FX_MACHINE(v6_0, "pc-i440fx-6.0", NULL, 451 pc_i440fx_6_0_machine_options); 452 453 static void pc_i440fx_5_2_machine_options(MachineClass *m) 454 { 455 pc_i440fx_6_0_machine_options(m); 456 m->alias = NULL; 457 m->is_default = false; 458 compat_props_add(m->compat_props, hw_compat_5_2, hw_compat_5_2_len); 459 compat_props_add(m->compat_props, pc_compat_5_2, pc_compat_5_2_len); 460 } 461 462 DEFINE_I440FX_MACHINE(v5_2, "pc-i440fx-5.2", NULL, 463 pc_i440fx_5_2_machine_options); 464 465 static void pc_i440fx_5_1_machine_options(MachineClass *m) 466 { 467 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 468 469 pc_i440fx_5_2_machine_options(m); 470 m->alias = NULL; 471 m->is_default = false; 472 compat_props_add(m->compat_props, hw_compat_5_1, hw_compat_5_1_len); 473 compat_props_add(m->compat_props, pc_compat_5_1, pc_compat_5_1_len); 474 pcmc->kvmclock_create_always = false; 475 pcmc->pci_root_uid = 1; 476 } 477 478 DEFINE_I440FX_MACHINE(v5_1, "pc-i440fx-5.1", NULL, 479 pc_i440fx_5_1_machine_options); 480 481 static void pc_i440fx_5_0_machine_options(MachineClass *m) 482 { 483 pc_i440fx_5_1_machine_options(m); 484 m->alias = NULL; 485 m->is_default = false; 486 m->numa_mem_supported = true; 487 compat_props_add(m->compat_props, hw_compat_5_0, hw_compat_5_0_len); 488 compat_props_add(m->compat_props, pc_compat_5_0, pc_compat_5_0_len); 489 m->auto_enable_numa_with_memdev = false; 490 } 491 492 DEFINE_I440FX_MACHINE(v5_0, "pc-i440fx-5.0", NULL, 493 pc_i440fx_5_0_machine_options); 494 495 static void pc_i440fx_4_2_machine_options(MachineClass *m) 496 { 497 pc_i440fx_5_0_machine_options(m); 498 m->alias = NULL; 499 m->is_default = false; 500 compat_props_add(m->compat_props, hw_compat_4_2, hw_compat_4_2_len); 501 compat_props_add(m->compat_props, pc_compat_4_2, pc_compat_4_2_len); 502 } 503 504 DEFINE_I440FX_MACHINE(v4_2, "pc-i440fx-4.2", NULL, 505 pc_i440fx_4_2_machine_options); 506 507 static void pc_i440fx_4_1_machine_options(MachineClass *m) 508 { 509 pc_i440fx_4_2_machine_options(m); 510 m->alias = NULL; 511 m->is_default = false; 512 compat_props_add(m->compat_props, hw_compat_4_1, hw_compat_4_1_len); 513 compat_props_add(m->compat_props, pc_compat_4_1, pc_compat_4_1_len); 514 } 515 516 DEFINE_I440FX_MACHINE(v4_1, "pc-i440fx-4.1", NULL, 517 pc_i440fx_4_1_machine_options); 518 519 static void pc_i440fx_4_0_machine_options(MachineClass *m) 520 { 521 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 522 pc_i440fx_4_1_machine_options(m); 523 m->alias = NULL; 524 m->is_default = false; 525 pcmc->default_cpu_version = CPU_VERSION_LEGACY; 526 compat_props_add(m->compat_props, hw_compat_4_0, hw_compat_4_0_len); 527 compat_props_add(m->compat_props, pc_compat_4_0, pc_compat_4_0_len); 528 } 529 530 DEFINE_I440FX_MACHINE(v4_0, "pc-i440fx-4.0", NULL, 531 pc_i440fx_4_0_machine_options); 532 533 static void pc_i440fx_3_1_machine_options(MachineClass *m) 534 { 535 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 536 537 pc_i440fx_4_0_machine_options(m); 538 m->is_default = false; 539 pcmc->do_not_add_smb_acpi = true; 540 m->smbus_no_migration_support = true; 541 m->alias = NULL; 542 pcmc->pvh_enabled = false; 543 compat_props_add(m->compat_props, hw_compat_3_1, hw_compat_3_1_len); 544 compat_props_add(m->compat_props, pc_compat_3_1, pc_compat_3_1_len); 545 } 546 547 DEFINE_I440FX_MACHINE(v3_1, "pc-i440fx-3.1", NULL, 548 pc_i440fx_3_1_machine_options); 549 550 static void pc_i440fx_3_0_machine_options(MachineClass *m) 551 { 552 pc_i440fx_3_1_machine_options(m); 553 compat_props_add(m->compat_props, hw_compat_3_0, hw_compat_3_0_len); 554 compat_props_add(m->compat_props, pc_compat_3_0, pc_compat_3_0_len); 555 } 556 557 DEFINE_I440FX_MACHINE(v3_0, "pc-i440fx-3.0", NULL, 558 pc_i440fx_3_0_machine_options); 559 560 static void pc_i440fx_2_12_machine_options(MachineClass *m) 561 { 562 pc_i440fx_3_0_machine_options(m); 563 compat_props_add(m->compat_props, hw_compat_2_12, hw_compat_2_12_len); 564 compat_props_add(m->compat_props, pc_compat_2_12, pc_compat_2_12_len); 565 } 566 567 DEFINE_I440FX_MACHINE(v2_12, "pc-i440fx-2.12", NULL, 568 pc_i440fx_2_12_machine_options); 569 570 static void pc_i440fx_2_11_machine_options(MachineClass *m) 571 { 572 pc_i440fx_2_12_machine_options(m); 573 compat_props_add(m->compat_props, hw_compat_2_11, hw_compat_2_11_len); 574 compat_props_add(m->compat_props, pc_compat_2_11, pc_compat_2_11_len); 575 } 576 577 DEFINE_I440FX_MACHINE(v2_11, "pc-i440fx-2.11", NULL, 578 pc_i440fx_2_11_machine_options); 579 580 static void pc_i440fx_2_10_machine_options(MachineClass *m) 581 { 582 pc_i440fx_2_11_machine_options(m); 583 compat_props_add(m->compat_props, hw_compat_2_10, hw_compat_2_10_len); 584 compat_props_add(m->compat_props, pc_compat_2_10, pc_compat_2_10_len); 585 m->auto_enable_numa_with_memhp = false; 586 } 587 588 DEFINE_I440FX_MACHINE(v2_10, "pc-i440fx-2.10", NULL, 589 pc_i440fx_2_10_machine_options); 590 591 static void pc_i440fx_2_9_machine_options(MachineClass *m) 592 { 593 pc_i440fx_2_10_machine_options(m); 594 compat_props_add(m->compat_props, hw_compat_2_9, hw_compat_2_9_len); 595 compat_props_add(m->compat_props, pc_compat_2_9, pc_compat_2_9_len); 596 } 597 598 DEFINE_I440FX_MACHINE(v2_9, "pc-i440fx-2.9", NULL, 599 pc_i440fx_2_9_machine_options); 600 601 static void pc_i440fx_2_8_machine_options(MachineClass *m) 602 { 603 pc_i440fx_2_9_machine_options(m); 604 compat_props_add(m->compat_props, hw_compat_2_8, hw_compat_2_8_len); 605 compat_props_add(m->compat_props, pc_compat_2_8, pc_compat_2_8_len); 606 } 607 608 DEFINE_I440FX_MACHINE(v2_8, "pc-i440fx-2.8", NULL, 609 pc_i440fx_2_8_machine_options); 610 611 static void pc_i440fx_2_7_machine_options(MachineClass *m) 612 { 613 pc_i440fx_2_8_machine_options(m); 614 compat_props_add(m->compat_props, hw_compat_2_7, hw_compat_2_7_len); 615 compat_props_add(m->compat_props, pc_compat_2_7, pc_compat_2_7_len); 616 } 617 618 DEFINE_I440FX_MACHINE(v2_7, "pc-i440fx-2.7", NULL, 619 pc_i440fx_2_7_machine_options); 620 621 static void pc_i440fx_2_6_machine_options(MachineClass *m) 622 { 623 X86MachineClass *x86mc = X86_MACHINE_CLASS(m); 624 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 625 626 pc_i440fx_2_7_machine_options(m); 627 pcmc->legacy_cpu_hotplug = true; 628 x86mc->fwcfg_dma_enabled = false; 629 compat_props_add(m->compat_props, hw_compat_2_6, hw_compat_2_6_len); 630 compat_props_add(m->compat_props, pc_compat_2_6, pc_compat_2_6_len); 631 } 632 633 DEFINE_I440FX_MACHINE(v2_6, "pc-i440fx-2.6", NULL, 634 pc_i440fx_2_6_machine_options); 635 636 static void pc_i440fx_2_5_machine_options(MachineClass *m) 637 { 638 X86MachineClass *x86mc = X86_MACHINE_CLASS(m); 639 640 pc_i440fx_2_6_machine_options(m); 641 x86mc->save_tsc_khz = false; 642 m->legacy_fw_cfg_order = 1; 643 compat_props_add(m->compat_props, hw_compat_2_5, hw_compat_2_5_len); 644 compat_props_add(m->compat_props, pc_compat_2_5, pc_compat_2_5_len); 645 } 646 647 DEFINE_I440FX_MACHINE(v2_5, "pc-i440fx-2.5", NULL, 648 pc_i440fx_2_5_machine_options); 649 650 static void pc_i440fx_2_4_machine_options(MachineClass *m) 651 { 652 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 653 654 pc_i440fx_2_5_machine_options(m); 655 m->hw_version = "2.4.0"; 656 pcmc->broken_reserved_end = true; 657 compat_props_add(m->compat_props, hw_compat_2_4, hw_compat_2_4_len); 658 compat_props_add(m->compat_props, pc_compat_2_4, pc_compat_2_4_len); 659 } 660 661 DEFINE_I440FX_MACHINE(v2_4, "pc-i440fx-2.4", NULL, 662 pc_i440fx_2_4_machine_options) 663 664 static void pc_i440fx_2_3_machine_options(MachineClass *m) 665 { 666 pc_i440fx_2_4_machine_options(m); 667 m->hw_version = "2.3.0"; 668 compat_props_add(m->compat_props, hw_compat_2_3, hw_compat_2_3_len); 669 compat_props_add(m->compat_props, pc_compat_2_3, pc_compat_2_3_len); 670 } 671 672 DEFINE_I440FX_MACHINE(v2_3, "pc-i440fx-2.3", pc_compat_2_3_fn, 673 pc_i440fx_2_3_machine_options); 674 675 static void pc_i440fx_2_2_machine_options(MachineClass *m) 676 { 677 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 678 679 pc_i440fx_2_3_machine_options(m); 680 m->hw_version = "2.2.0"; 681 m->default_machine_opts = "firmware=bios-256k.bin,suppress-vmdesc=on"; 682 compat_props_add(m->compat_props, hw_compat_2_2, hw_compat_2_2_len); 683 compat_props_add(m->compat_props, pc_compat_2_2, pc_compat_2_2_len); 684 pcmc->rsdp_in_ram = false; 685 } 686 687 DEFINE_I440FX_MACHINE(v2_2, "pc-i440fx-2.2", pc_compat_2_2_fn, 688 pc_i440fx_2_2_machine_options); 689 690 static void pc_i440fx_2_1_machine_options(MachineClass *m) 691 { 692 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 693 694 pc_i440fx_2_2_machine_options(m); 695 m->hw_version = "2.1.0"; 696 m->default_display = NULL; 697 compat_props_add(m->compat_props, hw_compat_2_1, hw_compat_2_1_len); 698 compat_props_add(m->compat_props, pc_compat_2_1, pc_compat_2_1_len); 699 pcmc->smbios_uuid_encoded = false; 700 pcmc->enforce_aligned_dimm = false; 701 } 702 703 DEFINE_I440FX_MACHINE(v2_1, "pc-i440fx-2.1", pc_compat_2_1_fn, 704 pc_i440fx_2_1_machine_options); 705 706 static void pc_i440fx_2_0_machine_options(MachineClass *m) 707 { 708 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 709 710 pc_i440fx_2_1_machine_options(m); 711 m->hw_version = "2.0.0"; 712 compat_props_add(m->compat_props, pc_compat_2_0, pc_compat_2_0_len); 713 pcmc->smbios_legacy_mode = true; 714 pcmc->has_reserved_memory = false; 715 /* This value depends on the actual DSDT and SSDT compiled into 716 * the source QEMU; unfortunately it depends on the binary and 717 * not on the machine type, so we cannot make pc-i440fx-1.7 work on 718 * both QEMU 1.7 and QEMU 2.0. 719 * 720 * Large variations cause migration to fail for more than one 721 * consecutive value of the "-smp" maxcpus option. 722 * 723 * For small variations of the kind caused by different iasl versions, 724 * the 4k rounding usually leaves slack. However, there could be still 725 * one or two values that break. For QEMU 1.7 and QEMU 2.0 the 726 * slack is only ~10 bytes before one "-smp maxcpus" value breaks! 727 * 728 * 6652 is valid for QEMU 2.0, the right value for pc-i440fx-1.7 on 729 * QEMU 1.7 it is 6414. For RHEL/CentOS 7.0 it is 6418. 730 */ 731 pcmc->legacy_acpi_table_size = 6652; 732 pcmc->acpi_data_size = 0x10000; 733 } 734 735 DEFINE_I440FX_MACHINE(v2_0, "pc-i440fx-2.0", pc_compat_2_0_fn, 736 pc_i440fx_2_0_machine_options); 737 738 static void pc_i440fx_1_7_machine_options(MachineClass *m) 739 { 740 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 741 742 pc_i440fx_2_0_machine_options(m); 743 m->hw_version = "1.7.0"; 744 m->default_machine_opts = NULL; 745 m->option_rom_has_mr = true; 746 compat_props_add(m->compat_props, pc_compat_1_7, pc_compat_1_7_len); 747 pcmc->smbios_defaults = false; 748 pcmc->gigabyte_align = false; 749 pcmc->legacy_acpi_table_size = 6414; 750 } 751 752 DEFINE_I440FX_MACHINE(v1_7, "pc-i440fx-1.7", pc_compat_1_7_fn, 753 pc_i440fx_1_7_machine_options); 754 755 static void pc_i440fx_1_6_machine_options(MachineClass *m) 756 { 757 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 758 759 pc_i440fx_1_7_machine_options(m); 760 m->hw_version = "1.6.0"; 761 m->rom_file_has_mr = false; 762 compat_props_add(m->compat_props, pc_compat_1_6, pc_compat_1_6_len); 763 pcmc->has_acpi_build = false; 764 } 765 766 DEFINE_I440FX_MACHINE(v1_6, "pc-i440fx-1.6", pc_compat_1_6_fn, 767 pc_i440fx_1_6_machine_options); 768 769 static void pc_i440fx_1_5_machine_options(MachineClass *m) 770 { 771 pc_i440fx_1_6_machine_options(m); 772 m->hw_version = "1.5.0"; 773 compat_props_add(m->compat_props, pc_compat_1_5, pc_compat_1_5_len); 774 } 775 776 DEFINE_I440FX_MACHINE(v1_5, "pc-i440fx-1.5", pc_compat_1_5_fn, 777 pc_i440fx_1_5_machine_options); 778 779 static void pc_i440fx_1_4_machine_options(MachineClass *m) 780 { 781 pc_i440fx_1_5_machine_options(m); 782 m->hw_version = "1.4.0"; 783 compat_props_add(m->compat_props, pc_compat_1_4, pc_compat_1_4_len); 784 } 785 786 DEFINE_I440FX_MACHINE(v1_4, "pc-i440fx-1.4", pc_compat_1_4_fn, 787 pc_i440fx_1_4_machine_options); 788 789 typedef struct { 790 uint16_t gpu_device_id; 791 uint16_t pch_device_id; 792 uint8_t pch_revision_id; 793 } IGDDeviceIDInfo; 794 795 /* In real world different GPU should have different PCH. But actually 796 * the different PCH DIDs likely map to different PCH SKUs. We do the 797 * same thing for the GPU. For PCH, the different SKUs are going to be 798 * all the same silicon design and implementation, just different 799 * features turn on and off with fuses. The SW interfaces should be 800 * consistent across all SKUs in a given family (eg LPT). But just same 801 * features may not be supported. 802 * 803 * Most of these different PCH features probably don't matter to the 804 * Gfx driver, but obviously any difference in display port connections 805 * will so it should be fine with any PCH in case of passthrough. 806 * 807 * So currently use one PCH version, 0x8c4e, to cover all HSW(Haswell) 808 * scenarios, 0x9cc3 for BDW(Broadwell). 809 */ 810 static const IGDDeviceIDInfo igd_combo_id_infos[] = { 811 /* HSW Classic */ 812 {0x0402, 0x8c4e, 0x04}, /* HSWGT1D, HSWD_w7 */ 813 {0x0406, 0x8c4e, 0x04}, /* HSWGT1M, HSWM_w7 */ 814 {0x0412, 0x8c4e, 0x04}, /* HSWGT2D, HSWD_w7 */ 815 {0x0416, 0x8c4e, 0x04}, /* HSWGT2M, HSWM_w7 */ 816 {0x041E, 0x8c4e, 0x04}, /* HSWGT15D, HSWD_w7 */ 817 /* HSW ULT */ 818 {0x0A06, 0x8c4e, 0x04}, /* HSWGT1UT, HSWM_w7 */ 819 {0x0A16, 0x8c4e, 0x04}, /* HSWGT2UT, HSWM_w7 */ 820 {0x0A26, 0x8c4e, 0x06}, /* HSWGT3UT, HSWM_w7 */ 821 {0x0A2E, 0x8c4e, 0x04}, /* HSWGT3UT28W, HSWM_w7 */ 822 {0x0A1E, 0x8c4e, 0x04}, /* HSWGT2UX, HSWM_w7 */ 823 {0x0A0E, 0x8c4e, 0x04}, /* HSWGT1ULX, HSWM_w7 */ 824 /* HSW CRW */ 825 {0x0D26, 0x8c4e, 0x04}, /* HSWGT3CW, HSWM_w7 */ 826 {0x0D22, 0x8c4e, 0x04}, /* HSWGT3CWDT, HSWD_w7 */ 827 /* HSW Server */ 828 {0x041A, 0x8c4e, 0x04}, /* HSWSVGT2, HSWD_w7 */ 829 /* HSW SRVR */ 830 {0x040A, 0x8c4e, 0x04}, /* HSWSVGT1, HSWD_w7 */ 831 /* BSW */ 832 {0x1606, 0x9cc3, 0x03}, /* BDWULTGT1, BDWM_w7 */ 833 {0x1616, 0x9cc3, 0x03}, /* BDWULTGT2, BDWM_w7 */ 834 {0x1626, 0x9cc3, 0x03}, /* BDWULTGT3, BDWM_w7 */ 835 {0x160E, 0x9cc3, 0x03}, /* BDWULXGT1, BDWM_w7 */ 836 {0x161E, 0x9cc3, 0x03}, /* BDWULXGT2, BDWM_w7 */ 837 {0x1602, 0x9cc3, 0x03}, /* BDWHALOGT1, BDWM_w7 */ 838 {0x1612, 0x9cc3, 0x03}, /* BDWHALOGT2, BDWM_w7 */ 839 {0x1622, 0x9cc3, 0x03}, /* BDWHALOGT3, BDWM_w7 */ 840 {0x162B, 0x9cc3, 0x03}, /* BDWHALO28W, BDWM_w7 */ 841 {0x162A, 0x9cc3, 0x03}, /* BDWGT3WRKS, BDWM_w7 */ 842 {0x162D, 0x9cc3, 0x03}, /* BDWGT3SRVR, BDWM_w7 */ 843 }; 844 845 static void isa_bridge_class_init(ObjectClass *klass, void *data) 846 { 847 DeviceClass *dc = DEVICE_CLASS(klass); 848 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 849 850 dc->desc = "ISA bridge faked to support IGD PT"; 851 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); 852 k->vendor_id = PCI_VENDOR_ID_INTEL; 853 k->class_id = PCI_CLASS_BRIDGE_ISA; 854 }; 855 856 static TypeInfo isa_bridge_info = { 857 .name = "igd-passthrough-isa-bridge", 858 .parent = TYPE_PCI_DEVICE, 859 .instance_size = sizeof(PCIDevice), 860 .class_init = isa_bridge_class_init, 861 .interfaces = (InterfaceInfo[]) { 862 { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 863 { }, 864 }, 865 }; 866 867 static void pt_graphics_register_types(void) 868 { 869 type_register_static(&isa_bridge_info); 870 } 871 type_init(pt_graphics_register_types) 872 873 void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id) 874 { 875 struct PCIDevice *bridge_dev; 876 int i, num; 877 uint16_t pch_dev_id = 0xffff; 878 uint8_t pch_rev_id = 0; 879 880 num = ARRAY_SIZE(igd_combo_id_infos); 881 for (i = 0; i < num; i++) { 882 if (gpu_dev_id == igd_combo_id_infos[i].gpu_device_id) { 883 pch_dev_id = igd_combo_id_infos[i].pch_device_id; 884 pch_rev_id = igd_combo_id_infos[i].pch_revision_id; 885 } 886 } 887 888 if (pch_dev_id == 0xffff) { 889 return; 890 } 891 892 /* Currently IGD drivers always need to access PCH by 1f.0. */ 893 bridge_dev = pci_create_simple(bus, PCI_DEVFN(0x1f, 0), 894 "igd-passthrough-isa-bridge"); 895 896 /* 897 * Note that vendor id is always PCI_VENDOR_ID_INTEL. 898 */ 899 if (!bridge_dev) { 900 fprintf(stderr, "set igd-passthrough-isa-bridge failed!\n"); 901 return; 902 } 903 pci_config_set_device_id(bridge_dev->config, pch_dev_id); 904 pci_config_set_revision(bridge_dev->config, pch_rev_id); 905 } 906 907 static void isapc_machine_options(MachineClass *m) 908 { 909 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 910 m->desc = "ISA-only PC"; 911 m->max_cpus = 1; 912 m->option_rom_has_mr = true; 913 m->rom_file_has_mr = false; 914 pcmc->pci_enabled = false; 915 pcmc->has_acpi_build = false; 916 pcmc->smbios_defaults = false; 917 pcmc->gigabyte_align = false; 918 pcmc->smbios_legacy_mode = true; 919 pcmc->has_reserved_memory = false; 920 pcmc->default_nic_model = "ne2k_isa"; 921 m->default_cpu_type = X86_CPU_TYPE_NAME("486"); 922 } 923 924 DEFINE_PC_MACHINE(isapc, "isapc", pc_init_isa, 925 isapc_machine_options); 926 927 928 #ifdef CONFIG_XEN 929 static void xenfv_4_2_machine_options(MachineClass *m) 930 { 931 pc_i440fx_4_2_machine_options(m); 932 m->desc = "Xen Fully-virtualized PC"; 933 m->max_cpus = HVM_MAX_VCPUS; 934 m->default_machine_opts = "accel=xen,suppress-vmdesc=on"; 935 } 936 937 DEFINE_PC_MACHINE(xenfv_4_2, "xenfv-4.2", pc_xen_hvm_init, 938 xenfv_4_2_machine_options); 939 940 static void xenfv_3_1_machine_options(MachineClass *m) 941 { 942 pc_i440fx_3_1_machine_options(m); 943 m->desc = "Xen Fully-virtualized PC"; 944 m->alias = "xenfv"; 945 m->max_cpus = HVM_MAX_VCPUS; 946 m->default_machine_opts = "accel=xen,suppress-vmdesc=on"; 947 } 948 949 DEFINE_PC_MACHINE(xenfv, "xenfv-3.1", pc_xen_hvm_init, 950 xenfv_3_1_machine_options); 951 #endif 952