1 /* 2 * QEMU PC System Emulator 3 * 4 * Copyright (c) 2003-2004 Fabrice Bellard 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 #include "qemu/osdep.h" 26 #include CONFIG_DEVICES 27 28 #include "qemu/units.h" 29 #include "hw/char/parallel-isa.h" 30 #include "hw/dma/i8257.h" 31 #include "hw/loader.h" 32 #include "hw/i386/x86.h" 33 #include "hw/i386/pc.h" 34 #include "hw/i386/apic.h" 35 #include "hw/pci-host/i440fx.h" 36 #include "hw/rtc/mc146818rtc.h" 37 #include "hw/southbridge/piix.h" 38 #include "hw/display/ramfb.h" 39 #include "hw/pci/pci.h" 40 #include "hw/pci/pci_ids.h" 41 #include "hw/usb.h" 42 #include "net/net.h" 43 #include "hw/ide/isa.h" 44 #include "hw/ide/pci.h" 45 #include "hw/irq.h" 46 #include "sysemu/kvm.h" 47 #include "hw/i386/kvm/clock.h" 48 #include "hw/sysbus.h" 49 #include "hw/i2c/smbus_eeprom.h" 50 #include "exec/memory.h" 51 #include "hw/acpi/acpi.h" 52 #include "qapi/error.h" 53 #include "qemu/error-report.h" 54 #include "sysemu/xen.h" 55 #ifdef CONFIG_XEN 56 #include <xen/hvm/hvm_info_table.h> 57 #include "hw/xen/xen_pt.h" 58 #include "hw/xen/xen_igd.h" 59 #endif 60 #include "hw/xen/xen-x86.h" 61 #include "hw/xen/xen.h" 62 #include "migration/global_state.h" 63 #include "migration/misc.h" 64 #include "sysemu/runstate.h" 65 #include "sysemu/numa.h" 66 #include "hw/hyperv/vmbus-bridge.h" 67 #include "hw/mem/nvdimm.h" 68 #include "hw/i386/acpi-build.h" 69 #include "kvm/kvm-cpu.h" 70 #include "target/i386/cpu.h" 71 72 #define XEN_IOAPIC_NUM_PIRQS 128ULL 73 74 #ifdef CONFIG_IDE_ISA 75 static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 }; 76 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 }; 77 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 }; 78 #endif 79 80 /* 81 * Return the global irq number corresponding to a given device irq 82 * pin. We could also use the bus number to have a more precise mapping. 83 */ 84 static int pc_pci_slot_get_pirq(PCIDevice *pci_dev, int pci_intx) 85 { 86 int slot_addend; 87 slot_addend = PCI_SLOT(pci_dev->devfn) - 1; 88 return (pci_intx + slot_addend) & 3; 89 } 90 91 static void piix_intx_routing_notifier_xen(PCIDevice *dev) 92 { 93 int i; 94 95 /* Scan for updates to PCI link routes. */ 96 for (i = 0; i < PIIX_NUM_PIRQS; i++) { 97 const PCIINTxRoute route = pci_device_route_intx_to_irq(dev, i); 98 const uint8_t v = route.mode == PCI_INTX_ENABLED ? route.irq : 0; 99 xen_set_pci_link_route(i, v); 100 } 101 } 102 103 /* PC hardware initialisation */ 104 static void pc_init1(MachineState *machine, const char *pci_type) 105 { 106 PCMachineState *pcms = PC_MACHINE(machine); 107 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); 108 X86MachineState *x86ms = X86_MACHINE(machine); 109 MemoryRegion *system_memory = get_system_memory(); 110 MemoryRegion *system_io = get_system_io(); 111 Object *phb = NULL; 112 ISABus *isa_bus; 113 Object *piix4_pm = NULL; 114 qemu_irq smi_irq; 115 GSIState *gsi_state; 116 MemoryRegion *ram_memory; 117 MemoryRegion *pci_memory = NULL; 118 MemoryRegion *rom_memory = system_memory; 119 ram_addr_t lowmem; 120 uint64_t hole64_size = 0; 121 122 /* 123 * Calculate ram split, for memory below and above 4G. It's a bit 124 * complicated for backward compatibility reasons ... 125 * 126 * - Traditional split is 3.5G (lowmem = 0xe0000000). This is the 127 * default value for max_ram_below_4g now. 128 * 129 * - Then, to gigabyte align the memory, we move the split to 3G 130 * (lowmem = 0xc0000000). But only in case we have to split in 131 * the first place, i.e. ram_size is larger than (traditional) 132 * lowmem. And for new machine types (gigabyte_align = true) 133 * only, for live migration compatibility reasons. 134 * 135 * - Next the max-ram-below-4g option was added, which allowed to 136 * reduce lowmem to a smaller value, to allow a larger PCI I/O 137 * window below 4G. qemu doesn't enforce gigabyte alignment here, 138 * but prints a warning. 139 * 140 * - Finally max-ram-below-4g got updated to also allow raising lowmem, 141 * so legacy non-PAE guests can get as much memory as possible in 142 * the 32bit address space below 4G. 143 * 144 * - Note that Xen has its own ram setup code in xen_ram_init(), 145 * called via xen_hvm_init_pc(). 146 * 147 * Examples: 148 * qemu -M pc-1.7 -m 4G (old default) -> 3584M low, 512M high 149 * qemu -M pc -m 4G (new default) -> 3072M low, 1024M high 150 * qemu -M pc,max-ram-below-4g=2G -m 4G -> 2048M low, 2048M high 151 * qemu -M pc,max-ram-below-4g=4G -m 3968M -> 3968M low (=4G-128M) 152 */ 153 if (xen_enabled()) { 154 xen_hvm_init_pc(pcms, &ram_memory); 155 } else { 156 ram_memory = machine->ram; 157 if (!pcms->max_ram_below_4g) { 158 pcms->max_ram_below_4g = 0xe0000000; /* default: 3.5G */ 159 } 160 lowmem = pcms->max_ram_below_4g; 161 if (machine->ram_size >= pcms->max_ram_below_4g) { 162 if (pcmc->gigabyte_align) { 163 if (lowmem > 0xc0000000) { 164 lowmem = 0xc0000000; 165 } 166 if (lowmem & (1 * GiB - 1)) { 167 warn_report("Large machine and max_ram_below_4g " 168 "(%" PRIu64 ") not a multiple of 1G; " 169 "possible bad performance.", 170 pcms->max_ram_below_4g); 171 } 172 } 173 } 174 175 if (machine->ram_size >= lowmem) { 176 x86ms->above_4g_mem_size = machine->ram_size - lowmem; 177 x86ms->below_4g_mem_size = lowmem; 178 } else { 179 x86ms->above_4g_mem_size = 0; 180 x86ms->below_4g_mem_size = machine->ram_size; 181 } 182 } 183 184 pc_machine_init_sgx_epc(pcms); 185 x86_cpus_init(x86ms, pcmc->default_cpu_version); 186 187 if (kvm_enabled()) { 188 kvmclock_create(pcmc->kvmclock_create_always); 189 } 190 191 if (pcmc->pci_enabled) { 192 pci_memory = g_new(MemoryRegion, 1); 193 memory_region_init(pci_memory, NULL, "pci", UINT64_MAX); 194 rom_memory = pci_memory; 195 196 phb = OBJECT(qdev_new(TYPE_I440FX_PCI_HOST_BRIDGE)); 197 object_property_add_child(OBJECT(machine), "i440fx", phb); 198 object_property_set_link(phb, PCI_HOST_PROP_RAM_MEM, 199 OBJECT(ram_memory), &error_fatal); 200 object_property_set_link(phb, PCI_HOST_PROP_PCI_MEM, 201 OBJECT(pci_memory), &error_fatal); 202 object_property_set_link(phb, PCI_HOST_PROP_SYSTEM_MEM, 203 OBJECT(system_memory), &error_fatal); 204 object_property_set_link(phb, PCI_HOST_PROP_IO_MEM, 205 OBJECT(system_io), &error_fatal); 206 object_property_set_uint(phb, PCI_HOST_BELOW_4G_MEM_SIZE, 207 x86ms->below_4g_mem_size, &error_fatal); 208 object_property_set_uint(phb, PCI_HOST_ABOVE_4G_MEM_SIZE, 209 x86ms->above_4g_mem_size, &error_fatal); 210 object_property_set_str(phb, I440FX_HOST_PROP_PCI_TYPE, pci_type, 211 &error_fatal); 212 sysbus_realize_and_unref(SYS_BUS_DEVICE(phb), &error_fatal); 213 214 pcms->pcibus = PCI_BUS(qdev_get_child_bus(DEVICE(phb), "pci.0")); 215 pci_bus_map_irqs(pcms->pcibus, 216 xen_enabled() ? xen_pci_slot_get_pirq 217 : pc_pci_slot_get_pirq); 218 219 hole64_size = object_property_get_uint(phb, 220 PCI_HOST_PROP_PCI_HOLE64_SIZE, 221 &error_abort); 222 } 223 224 /* allocate ram and load rom/bios */ 225 if (!xen_enabled()) { 226 pc_memory_init(pcms, system_memory, rom_memory, hole64_size); 227 } else { 228 assert(machine->ram_size == x86ms->below_4g_mem_size + 229 x86ms->above_4g_mem_size); 230 231 pc_system_flash_cleanup_unused(pcms); 232 if (machine->kernel_filename != NULL) { 233 /* For xen HVM direct kernel boot, load linux here */ 234 xen_load_linux(pcms); 235 } 236 } 237 238 gsi_state = pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled); 239 240 if (pcmc->pci_enabled) { 241 PCIDevice *pci_dev; 242 DeviceState *dev; 243 size_t i; 244 245 pci_dev = pci_new_multifunction(-1, pcms->south_bridge); 246 object_property_set_bool(OBJECT(pci_dev), "has-usb", 247 machine_usb(machine), &error_abort); 248 object_property_set_bool(OBJECT(pci_dev), "has-acpi", 249 x86_machine_is_acpi_enabled(x86ms), 250 &error_abort); 251 object_property_set_bool(OBJECT(pci_dev), "has-pic", false, 252 &error_abort); 253 object_property_set_bool(OBJECT(pci_dev), "has-pit", false, 254 &error_abort); 255 qdev_prop_set_uint32(DEVICE(pci_dev), "smb_io_base", 0xb100); 256 object_property_set_bool(OBJECT(pci_dev), "smm-enabled", 257 x86_machine_is_smm_enabled(x86ms), 258 &error_abort); 259 dev = DEVICE(pci_dev); 260 for (i = 0; i < ISA_NUM_IRQS; i++) { 261 qdev_connect_gpio_out_named(dev, "isa-irqs", i, x86ms->gsi[i]); 262 } 263 pci_realize_and_unref(pci_dev, pcms->pcibus, &error_fatal); 264 265 if (xen_enabled()) { 266 pci_device_set_intx_routing_notifier( 267 pci_dev, piix_intx_routing_notifier_xen); 268 269 /* 270 * Xen supports additional interrupt routes from the PCI devices to 271 * the IOAPIC: the four pins of each PCI device on the bus are also 272 * connected to the IOAPIC directly. 273 * These additional routes can be discovered through ACPI. 274 */ 275 pci_bus_irqs(pcms->pcibus, xen_intx_set_irq, pci_dev, 276 XEN_IOAPIC_NUM_PIRQS); 277 } 278 279 isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(pci_dev), "isa.0")); 280 x86ms->rtc = ISA_DEVICE(object_resolve_path_component(OBJECT(pci_dev), 281 "rtc")); 282 piix4_pm = object_resolve_path_component(OBJECT(pci_dev), "pm"); 283 dev = DEVICE(object_resolve_path_component(OBJECT(pci_dev), "ide")); 284 pci_ide_create_devs(PCI_DEVICE(dev)); 285 pcms->idebus[0] = qdev_get_child_bus(dev, "ide.0"); 286 pcms->idebus[1] = qdev_get_child_bus(dev, "ide.1"); 287 } else { 288 isa_bus = isa_bus_new(NULL, system_memory, system_io, 289 &error_abort); 290 isa_bus_register_input_irqs(isa_bus, x86ms->gsi); 291 292 x86ms->rtc = isa_new(TYPE_MC146818_RTC); 293 qdev_prop_set_int32(DEVICE(x86ms->rtc), "base_year", 2000); 294 isa_realize_and_unref(x86ms->rtc, isa_bus, &error_fatal); 295 296 i8257_dma_init(OBJECT(machine), isa_bus, 0); 297 pcms->hpet_enabled = false; 298 } 299 300 if (x86ms->pic == ON_OFF_AUTO_ON || x86ms->pic == ON_OFF_AUTO_AUTO) { 301 pc_i8259_create(isa_bus, gsi_state->i8259_irq); 302 } 303 304 if (phb) { 305 ioapic_init_gsi(gsi_state, phb); 306 } 307 308 if (tcg_enabled()) { 309 x86_register_ferr_irq(x86ms->gsi[13]); 310 } 311 312 pc_vga_init(isa_bus, pcmc->pci_enabled ? pcms->pcibus : NULL); 313 314 assert(pcms->vmport != ON_OFF_AUTO__MAX); 315 if (pcms->vmport == ON_OFF_AUTO_AUTO) { 316 pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON; 317 } 318 319 /* init basic PC hardware */ 320 pc_basic_device_init(pcms, isa_bus, x86ms->gsi, x86ms->rtc, true, 321 0x4); 322 323 pc_nic_init(pcmc, isa_bus, pcms->pcibus); 324 325 #ifdef CONFIG_IDE_ISA 326 if (!pcmc->pci_enabled) { 327 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; 328 int i; 329 330 ide_drive_get(hd, ARRAY_SIZE(hd)); 331 for (i = 0; i < MAX_IDE_BUS; i++) { 332 ISADevice *dev; 333 char busname[] = "ide.0"; 334 dev = isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i], 335 ide_irq[i], 336 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]); 337 /* 338 * The ide bus name is ide.0 for the first bus and ide.1 for the 339 * second one. 340 */ 341 busname[4] = '0' + i; 342 pcms->idebus[i] = qdev_get_child_bus(DEVICE(dev), busname); 343 } 344 } 345 #endif 346 347 if (piix4_pm) { 348 smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0); 349 350 qdev_connect_gpio_out_named(DEVICE(piix4_pm), "smi-irq", 0, smi_irq); 351 pcms->smbus = I2C_BUS(qdev_get_child_bus(DEVICE(piix4_pm), "i2c")); 352 /* TODO: Populate SPD eeprom data. */ 353 smbus_eeprom_init(pcms->smbus, 8, NULL, 0); 354 355 object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP, 356 TYPE_HOTPLUG_HANDLER, 357 (Object **)&x86ms->acpi_dev, 358 object_property_allow_set_link, 359 OBJ_PROP_LINK_STRONG); 360 object_property_set_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP, 361 piix4_pm, &error_abort); 362 } 363 364 if (machine->nvdimms_state->is_enabled) { 365 nvdimm_init_acpi_state(machine->nvdimms_state, system_io, 366 x86_nvdimm_acpi_dsmio, 367 x86ms->fw_cfg, OBJECT(pcms)); 368 } 369 } 370 371 typedef enum PCSouthBridgeOption { 372 PC_SOUTH_BRIDGE_OPTION_PIIX3, 373 PC_SOUTH_BRIDGE_OPTION_PIIX4, 374 PC_SOUTH_BRIDGE_OPTION_MAX, 375 } PCSouthBridgeOption; 376 377 static const QEnumLookup PCSouthBridgeOption_lookup = { 378 .array = (const char *const[]) { 379 [PC_SOUTH_BRIDGE_OPTION_PIIX3] = TYPE_PIIX3_DEVICE, 380 [PC_SOUTH_BRIDGE_OPTION_PIIX4] = TYPE_PIIX4_PCI_DEVICE, 381 }, 382 .size = PC_SOUTH_BRIDGE_OPTION_MAX 383 }; 384 385 static int pc_get_south_bridge(Object *obj, Error **errp) 386 { 387 PCMachineState *pcms = PC_MACHINE(obj); 388 int i; 389 390 for (i = 0; i < PCSouthBridgeOption_lookup.size; i++) { 391 if (g_strcmp0(PCSouthBridgeOption_lookup.array[i], 392 pcms->south_bridge) == 0) { 393 return i; 394 } 395 } 396 397 error_setg(errp, "Invalid south bridge value set"); 398 return 0; 399 } 400 401 static void pc_set_south_bridge(Object *obj, int value, Error **errp) 402 { 403 PCMachineState *pcms = PC_MACHINE(obj); 404 405 if (value < 0) { 406 error_setg(errp, "Value can't be negative"); 407 return; 408 } 409 410 if (value >= PCSouthBridgeOption_lookup.size) { 411 error_setg(errp, "Value too big"); 412 return; 413 } 414 415 pcms->south_bridge = PCSouthBridgeOption_lookup.array[value]; 416 } 417 418 /* Looking for a pc_compat_2_4() function? It doesn't exist. 419 * pc_compat_*() functions that run on machine-init time and 420 * change global QEMU state are deprecated. Please don't create 421 * one, and implement any pc-*-2.4 (and newer) compat code in 422 * hw_compat_*, pc_compat_*, or * pc_*_machine_options(). 423 */ 424 425 static void pc_compat_2_3_fn(MachineState *machine) 426 { 427 X86MachineState *x86ms = X86_MACHINE(machine); 428 if (kvm_enabled()) { 429 x86ms->smm = ON_OFF_AUTO_OFF; 430 } 431 } 432 433 static void pc_compat_2_2_fn(MachineState *machine) 434 { 435 pc_compat_2_3_fn(machine); 436 } 437 438 static void pc_compat_2_1_fn(MachineState *machine) 439 { 440 pc_compat_2_2_fn(machine); 441 x86_cpu_change_kvm_default("svm", NULL); 442 } 443 444 static void pc_compat_2_0_fn(MachineState *machine) 445 { 446 pc_compat_2_1_fn(machine); 447 } 448 449 #ifdef CONFIG_ISAPC 450 static void pc_init_isa(MachineState *machine) 451 { 452 pc_init1(machine, NULL); 453 } 454 #endif 455 456 #ifdef CONFIG_XEN 457 static void pc_xen_hvm_init_pci(MachineState *machine) 458 { 459 const char *pci_type = xen_igd_gfx_pt_enabled() ? 460 TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE : TYPE_I440FX_PCI_DEVICE; 461 462 pc_init1(machine, pci_type); 463 } 464 465 static void pc_xen_hvm_init(MachineState *machine) 466 { 467 PCMachineState *pcms = PC_MACHINE(machine); 468 469 if (!xen_enabled()) { 470 error_report("xenfv machine requires the xen accelerator"); 471 exit(1); 472 } 473 474 pc_xen_hvm_init_pci(machine); 475 xen_igd_reserve_slot(pcms->pcibus); 476 pci_create_simple(pcms->pcibus, -1, "xen-platform"); 477 } 478 #endif 479 480 #define DEFINE_I440FX_MACHINE(suffix, name, compatfn, optionfn) \ 481 static void pc_init_##suffix(MachineState *machine) \ 482 { \ 483 void (*compat)(MachineState *m) = (compatfn); \ 484 if (compat) { \ 485 compat(machine); \ 486 } \ 487 pc_init1(machine, TYPE_I440FX_PCI_DEVICE); \ 488 } \ 489 DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn) 490 491 static void pc_i440fx_machine_options(MachineClass *m) 492 { 493 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 494 ObjectClass *oc = OBJECT_CLASS(m); 495 pcmc->default_south_bridge = TYPE_PIIX3_DEVICE; 496 pcmc->pci_root_uid = 0; 497 pcmc->default_cpu_version = 1; 498 499 m->family = "pc_piix"; 500 m->desc = "Standard PC (i440FX + PIIX, 1996)"; 501 m->default_machine_opts = "firmware=bios-256k.bin"; 502 m->default_display = "std"; 503 m->default_nic = "e1000"; 504 m->no_parallel = !module_object_class_by_name(TYPE_ISA_PARALLEL); 505 machine_class_allow_dynamic_sysbus_dev(m, TYPE_RAMFB_DEVICE); 506 machine_class_allow_dynamic_sysbus_dev(m, TYPE_VMBUS_BRIDGE); 507 508 object_class_property_add_enum(oc, "x-south-bridge", "PCSouthBridgeOption", 509 &PCSouthBridgeOption_lookup, 510 pc_get_south_bridge, 511 pc_set_south_bridge); 512 object_class_property_set_description(oc, "x-south-bridge", 513 "Use a different south bridge than PIIX3"); 514 } 515 516 static void pc_i440fx_9_0_machine_options(MachineClass *m) 517 { 518 pc_i440fx_machine_options(m); 519 m->alias = "pc"; 520 m->is_default = true; 521 } 522 523 DEFINE_I440FX_MACHINE(v9_0, "pc-i440fx-9.0", NULL, 524 pc_i440fx_9_0_machine_options); 525 526 static void pc_i440fx_8_2_machine_options(MachineClass *m) 527 { 528 pc_i440fx_9_0_machine_options(m); 529 m->alias = NULL; 530 m->is_default = false; 531 532 compat_props_add(m->compat_props, hw_compat_8_2, hw_compat_8_2_len); 533 compat_props_add(m->compat_props, pc_compat_8_2, pc_compat_8_2_len); 534 } 535 536 DEFINE_I440FX_MACHINE(v8_2, "pc-i440fx-8.2", NULL, 537 pc_i440fx_8_2_machine_options); 538 539 static void pc_i440fx_8_1_machine_options(MachineClass *m) 540 { 541 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 542 543 pc_i440fx_8_2_machine_options(m); 544 pcmc->broken_32bit_mem_addr_check = true; 545 546 compat_props_add(m->compat_props, hw_compat_8_1, hw_compat_8_1_len); 547 compat_props_add(m->compat_props, pc_compat_8_1, pc_compat_8_1_len); 548 } 549 550 DEFINE_I440FX_MACHINE(v8_1, "pc-i440fx-8.1", NULL, 551 pc_i440fx_8_1_machine_options); 552 553 static void pc_i440fx_8_0_machine_options(MachineClass *m) 554 { 555 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 556 557 pc_i440fx_8_1_machine_options(m); 558 compat_props_add(m->compat_props, hw_compat_8_0, hw_compat_8_0_len); 559 compat_props_add(m->compat_props, pc_compat_8_0, pc_compat_8_0_len); 560 561 /* For pc-i44fx-8.0 and older, use SMBIOS 2.8 by default */ 562 pcmc->default_smbios_ep_type = SMBIOS_ENTRY_POINT_TYPE_32; 563 } 564 565 DEFINE_I440FX_MACHINE(v8_0, "pc-i440fx-8.0", NULL, 566 pc_i440fx_8_0_machine_options); 567 568 static void pc_i440fx_7_2_machine_options(MachineClass *m) 569 { 570 pc_i440fx_8_0_machine_options(m); 571 compat_props_add(m->compat_props, hw_compat_7_2, hw_compat_7_2_len); 572 compat_props_add(m->compat_props, pc_compat_7_2, pc_compat_7_2_len); 573 } 574 575 DEFINE_I440FX_MACHINE(v7_2, "pc-i440fx-7.2", NULL, 576 pc_i440fx_7_2_machine_options); 577 578 static void pc_i440fx_7_1_machine_options(MachineClass *m) 579 { 580 pc_i440fx_7_2_machine_options(m); 581 compat_props_add(m->compat_props, hw_compat_7_1, hw_compat_7_1_len); 582 compat_props_add(m->compat_props, pc_compat_7_1, pc_compat_7_1_len); 583 } 584 585 DEFINE_I440FX_MACHINE(v7_1, "pc-i440fx-7.1", NULL, 586 pc_i440fx_7_1_machine_options); 587 588 static void pc_i440fx_7_0_machine_options(MachineClass *m) 589 { 590 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 591 pc_i440fx_7_1_machine_options(m); 592 pcmc->enforce_amd_1tb_hole = false; 593 compat_props_add(m->compat_props, hw_compat_7_0, hw_compat_7_0_len); 594 compat_props_add(m->compat_props, pc_compat_7_0, pc_compat_7_0_len); 595 } 596 597 DEFINE_I440FX_MACHINE(v7_0, "pc-i440fx-7.0", NULL, 598 pc_i440fx_7_0_machine_options); 599 600 static void pc_i440fx_6_2_machine_options(MachineClass *m) 601 { 602 pc_i440fx_7_0_machine_options(m); 603 compat_props_add(m->compat_props, hw_compat_6_2, hw_compat_6_2_len); 604 compat_props_add(m->compat_props, pc_compat_6_2, pc_compat_6_2_len); 605 } 606 607 DEFINE_I440FX_MACHINE(v6_2, "pc-i440fx-6.2", NULL, 608 pc_i440fx_6_2_machine_options); 609 610 static void pc_i440fx_6_1_machine_options(MachineClass *m) 611 { 612 pc_i440fx_6_2_machine_options(m); 613 compat_props_add(m->compat_props, hw_compat_6_1, hw_compat_6_1_len); 614 compat_props_add(m->compat_props, pc_compat_6_1, pc_compat_6_1_len); 615 m->smp_props.prefer_sockets = true; 616 } 617 618 DEFINE_I440FX_MACHINE(v6_1, "pc-i440fx-6.1", NULL, 619 pc_i440fx_6_1_machine_options); 620 621 static void pc_i440fx_6_0_machine_options(MachineClass *m) 622 { 623 pc_i440fx_6_1_machine_options(m); 624 compat_props_add(m->compat_props, hw_compat_6_0, hw_compat_6_0_len); 625 compat_props_add(m->compat_props, pc_compat_6_0, pc_compat_6_0_len); 626 } 627 628 DEFINE_I440FX_MACHINE(v6_0, "pc-i440fx-6.0", NULL, 629 pc_i440fx_6_0_machine_options); 630 631 static void pc_i440fx_5_2_machine_options(MachineClass *m) 632 { 633 pc_i440fx_6_0_machine_options(m); 634 compat_props_add(m->compat_props, hw_compat_5_2, hw_compat_5_2_len); 635 compat_props_add(m->compat_props, pc_compat_5_2, pc_compat_5_2_len); 636 } 637 638 DEFINE_I440FX_MACHINE(v5_2, "pc-i440fx-5.2", NULL, 639 pc_i440fx_5_2_machine_options); 640 641 static void pc_i440fx_5_1_machine_options(MachineClass *m) 642 { 643 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 644 645 pc_i440fx_5_2_machine_options(m); 646 compat_props_add(m->compat_props, hw_compat_5_1, hw_compat_5_1_len); 647 compat_props_add(m->compat_props, pc_compat_5_1, pc_compat_5_1_len); 648 pcmc->kvmclock_create_always = false; 649 pcmc->pci_root_uid = 1; 650 } 651 652 DEFINE_I440FX_MACHINE(v5_1, "pc-i440fx-5.1", NULL, 653 pc_i440fx_5_1_machine_options); 654 655 static void pc_i440fx_5_0_machine_options(MachineClass *m) 656 { 657 pc_i440fx_5_1_machine_options(m); 658 m->numa_mem_supported = true; 659 compat_props_add(m->compat_props, hw_compat_5_0, hw_compat_5_0_len); 660 compat_props_add(m->compat_props, pc_compat_5_0, pc_compat_5_0_len); 661 m->auto_enable_numa_with_memdev = false; 662 } 663 664 DEFINE_I440FX_MACHINE(v5_0, "pc-i440fx-5.0", NULL, 665 pc_i440fx_5_0_machine_options); 666 667 static void pc_i440fx_4_2_machine_options(MachineClass *m) 668 { 669 pc_i440fx_5_0_machine_options(m); 670 compat_props_add(m->compat_props, hw_compat_4_2, hw_compat_4_2_len); 671 compat_props_add(m->compat_props, pc_compat_4_2, pc_compat_4_2_len); 672 } 673 674 DEFINE_I440FX_MACHINE(v4_2, "pc-i440fx-4.2", NULL, 675 pc_i440fx_4_2_machine_options); 676 677 static void pc_i440fx_4_1_machine_options(MachineClass *m) 678 { 679 pc_i440fx_4_2_machine_options(m); 680 compat_props_add(m->compat_props, hw_compat_4_1, hw_compat_4_1_len); 681 compat_props_add(m->compat_props, pc_compat_4_1, pc_compat_4_1_len); 682 } 683 684 DEFINE_I440FX_MACHINE(v4_1, "pc-i440fx-4.1", NULL, 685 pc_i440fx_4_1_machine_options); 686 687 static void pc_i440fx_4_0_machine_options(MachineClass *m) 688 { 689 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 690 pc_i440fx_4_1_machine_options(m); 691 pcmc->default_cpu_version = CPU_VERSION_LEGACY; 692 compat_props_add(m->compat_props, hw_compat_4_0, hw_compat_4_0_len); 693 compat_props_add(m->compat_props, pc_compat_4_0, pc_compat_4_0_len); 694 } 695 696 DEFINE_I440FX_MACHINE(v4_0, "pc-i440fx-4.0", NULL, 697 pc_i440fx_4_0_machine_options); 698 699 static void pc_i440fx_3_1_machine_options(MachineClass *m) 700 { 701 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 702 703 pc_i440fx_4_0_machine_options(m); 704 m->smbus_no_migration_support = true; 705 pcmc->pvh_enabled = false; 706 compat_props_add(m->compat_props, hw_compat_3_1, hw_compat_3_1_len); 707 compat_props_add(m->compat_props, pc_compat_3_1, pc_compat_3_1_len); 708 } 709 710 DEFINE_I440FX_MACHINE(v3_1, "pc-i440fx-3.1", NULL, 711 pc_i440fx_3_1_machine_options); 712 713 static void pc_i440fx_3_0_machine_options(MachineClass *m) 714 { 715 pc_i440fx_3_1_machine_options(m); 716 compat_props_add(m->compat_props, hw_compat_3_0, hw_compat_3_0_len); 717 compat_props_add(m->compat_props, pc_compat_3_0, pc_compat_3_0_len); 718 } 719 720 DEFINE_I440FX_MACHINE(v3_0, "pc-i440fx-3.0", NULL, 721 pc_i440fx_3_0_machine_options); 722 723 static void pc_i440fx_2_12_machine_options(MachineClass *m) 724 { 725 pc_i440fx_3_0_machine_options(m); 726 compat_props_add(m->compat_props, hw_compat_2_12, hw_compat_2_12_len); 727 compat_props_add(m->compat_props, pc_compat_2_12, pc_compat_2_12_len); 728 } 729 730 DEFINE_I440FX_MACHINE(v2_12, "pc-i440fx-2.12", NULL, 731 pc_i440fx_2_12_machine_options); 732 733 static void pc_i440fx_2_11_machine_options(MachineClass *m) 734 { 735 pc_i440fx_2_12_machine_options(m); 736 compat_props_add(m->compat_props, hw_compat_2_11, hw_compat_2_11_len); 737 compat_props_add(m->compat_props, pc_compat_2_11, pc_compat_2_11_len); 738 } 739 740 DEFINE_I440FX_MACHINE(v2_11, "pc-i440fx-2.11", NULL, 741 pc_i440fx_2_11_machine_options); 742 743 static void pc_i440fx_2_10_machine_options(MachineClass *m) 744 { 745 pc_i440fx_2_11_machine_options(m); 746 compat_props_add(m->compat_props, hw_compat_2_10, hw_compat_2_10_len); 747 compat_props_add(m->compat_props, pc_compat_2_10, pc_compat_2_10_len); 748 m->auto_enable_numa_with_memhp = false; 749 } 750 751 DEFINE_I440FX_MACHINE(v2_10, "pc-i440fx-2.10", NULL, 752 pc_i440fx_2_10_machine_options); 753 754 static void pc_i440fx_2_9_machine_options(MachineClass *m) 755 { 756 pc_i440fx_2_10_machine_options(m); 757 compat_props_add(m->compat_props, hw_compat_2_9, hw_compat_2_9_len); 758 compat_props_add(m->compat_props, pc_compat_2_9, pc_compat_2_9_len); 759 } 760 761 DEFINE_I440FX_MACHINE(v2_9, "pc-i440fx-2.9", NULL, 762 pc_i440fx_2_9_machine_options); 763 764 static void pc_i440fx_2_8_machine_options(MachineClass *m) 765 { 766 pc_i440fx_2_9_machine_options(m); 767 compat_props_add(m->compat_props, hw_compat_2_8, hw_compat_2_8_len); 768 compat_props_add(m->compat_props, pc_compat_2_8, pc_compat_2_8_len); 769 } 770 771 DEFINE_I440FX_MACHINE(v2_8, "pc-i440fx-2.8", NULL, 772 pc_i440fx_2_8_machine_options); 773 774 static void pc_i440fx_2_7_machine_options(MachineClass *m) 775 { 776 pc_i440fx_2_8_machine_options(m); 777 compat_props_add(m->compat_props, hw_compat_2_7, hw_compat_2_7_len); 778 compat_props_add(m->compat_props, pc_compat_2_7, pc_compat_2_7_len); 779 } 780 781 DEFINE_I440FX_MACHINE(v2_7, "pc-i440fx-2.7", NULL, 782 pc_i440fx_2_7_machine_options); 783 784 static void pc_i440fx_2_6_machine_options(MachineClass *m) 785 { 786 X86MachineClass *x86mc = X86_MACHINE_CLASS(m); 787 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 788 789 pc_i440fx_2_7_machine_options(m); 790 pcmc->legacy_cpu_hotplug = true; 791 x86mc->fwcfg_dma_enabled = false; 792 compat_props_add(m->compat_props, hw_compat_2_6, hw_compat_2_6_len); 793 compat_props_add(m->compat_props, pc_compat_2_6, pc_compat_2_6_len); 794 } 795 796 DEFINE_I440FX_MACHINE(v2_6, "pc-i440fx-2.6", NULL, 797 pc_i440fx_2_6_machine_options); 798 799 static void pc_i440fx_2_5_machine_options(MachineClass *m) 800 { 801 X86MachineClass *x86mc = X86_MACHINE_CLASS(m); 802 803 pc_i440fx_2_6_machine_options(m); 804 x86mc->save_tsc_khz = false; 805 m->legacy_fw_cfg_order = 1; 806 compat_props_add(m->compat_props, hw_compat_2_5, hw_compat_2_5_len); 807 compat_props_add(m->compat_props, pc_compat_2_5, pc_compat_2_5_len); 808 } 809 810 DEFINE_I440FX_MACHINE(v2_5, "pc-i440fx-2.5", NULL, 811 pc_i440fx_2_5_machine_options); 812 813 static void pc_i440fx_2_4_machine_options(MachineClass *m) 814 { 815 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 816 817 pc_i440fx_2_5_machine_options(m); 818 m->hw_version = "2.4.0"; 819 pcmc->broken_reserved_end = true; 820 compat_props_add(m->compat_props, hw_compat_2_4, hw_compat_2_4_len); 821 compat_props_add(m->compat_props, pc_compat_2_4, pc_compat_2_4_len); 822 } 823 824 DEFINE_I440FX_MACHINE(v2_4, "pc-i440fx-2.4", NULL, 825 pc_i440fx_2_4_machine_options) 826 827 static void pc_i440fx_2_3_machine_options(MachineClass *m) 828 { 829 pc_i440fx_2_4_machine_options(m); 830 m->hw_version = "2.3.0"; 831 m->deprecation_reason = "old and unattended - use a newer version instead"; 832 compat_props_add(m->compat_props, hw_compat_2_3, hw_compat_2_3_len); 833 compat_props_add(m->compat_props, pc_compat_2_3, pc_compat_2_3_len); 834 } 835 836 DEFINE_I440FX_MACHINE(v2_3, "pc-i440fx-2.3", pc_compat_2_3_fn, 837 pc_i440fx_2_3_machine_options); 838 839 static void pc_i440fx_2_2_machine_options(MachineClass *m) 840 { 841 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 842 843 pc_i440fx_2_3_machine_options(m); 844 m->hw_version = "2.2.0"; 845 m->default_machine_opts = "firmware=bios-256k.bin,suppress-vmdesc=on"; 846 compat_props_add(m->compat_props, hw_compat_2_2, hw_compat_2_2_len); 847 compat_props_add(m->compat_props, pc_compat_2_2, pc_compat_2_2_len); 848 pcmc->rsdp_in_ram = false; 849 pcmc->resizable_acpi_blob = false; 850 } 851 852 DEFINE_I440FX_MACHINE(v2_2, "pc-i440fx-2.2", pc_compat_2_2_fn, 853 pc_i440fx_2_2_machine_options); 854 855 static void pc_i440fx_2_1_machine_options(MachineClass *m) 856 { 857 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 858 859 pc_i440fx_2_2_machine_options(m); 860 m->hw_version = "2.1.0"; 861 m->default_display = NULL; 862 compat_props_add(m->compat_props, hw_compat_2_1, hw_compat_2_1_len); 863 compat_props_add(m->compat_props, pc_compat_2_1, pc_compat_2_1_len); 864 pcmc->smbios_uuid_encoded = false; 865 pcmc->enforce_aligned_dimm = false; 866 } 867 868 DEFINE_I440FX_MACHINE(v2_1, "pc-i440fx-2.1", pc_compat_2_1_fn, 869 pc_i440fx_2_1_machine_options); 870 871 static void pc_i440fx_2_0_machine_options(MachineClass *m) 872 { 873 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 874 875 pc_i440fx_2_1_machine_options(m); 876 m->hw_version = "2.0.0"; 877 compat_props_add(m->compat_props, pc_compat_2_0, pc_compat_2_0_len); 878 pcmc->smbios_legacy_mode = true; 879 pcmc->has_reserved_memory = false; 880 /* This value depends on the actual DSDT and SSDT compiled into 881 * the source QEMU; unfortunately it depends on the binary and 882 * not on the machine type, so we cannot make pc-i440fx-1.7 work on 883 * both QEMU 1.7 and QEMU 2.0. 884 * 885 * Large variations cause migration to fail for more than one 886 * consecutive value of the "-smp" maxcpus option. 887 * 888 * For small variations of the kind caused by different iasl versions, 889 * the 4k rounding usually leaves slack. However, there could be still 890 * one or two values that break. For QEMU 1.7 and QEMU 2.0 the 891 * slack is only ~10 bytes before one "-smp maxcpus" value breaks! 892 * 893 * 6652 is valid for QEMU 2.0, the right value for pc-i440fx-1.7 on 894 * QEMU 1.7 it is 6414. For RHEL/CentOS 7.0 it is 6418. 895 */ 896 pcmc->legacy_acpi_table_size = 6652; 897 pcmc->acpi_data_size = 0x10000; 898 } 899 900 DEFINE_I440FX_MACHINE(v2_0, "pc-i440fx-2.0", pc_compat_2_0_fn, 901 pc_i440fx_2_0_machine_options); 902 903 #ifdef CONFIG_ISAPC 904 static void isapc_machine_options(MachineClass *m) 905 { 906 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 907 m->desc = "ISA-only PC"; 908 m->max_cpus = 1; 909 m->option_rom_has_mr = true; 910 m->rom_file_has_mr = false; 911 pcmc->pci_enabled = false; 912 pcmc->has_acpi_build = false; 913 pcmc->smbios_defaults = false; 914 pcmc->gigabyte_align = false; 915 pcmc->smbios_legacy_mode = true; 916 pcmc->has_reserved_memory = false; 917 m->default_nic = "ne2k_isa"; 918 m->default_cpu_type = X86_CPU_TYPE_NAME("486"); 919 m->no_parallel = !module_object_class_by_name(TYPE_ISA_PARALLEL); 920 } 921 922 DEFINE_PC_MACHINE(isapc, "isapc", pc_init_isa, 923 isapc_machine_options); 924 #endif 925 926 #ifdef CONFIG_XEN 927 static void xenfv_4_2_machine_options(MachineClass *m) 928 { 929 pc_i440fx_4_2_machine_options(m); 930 m->desc = "Xen Fully-virtualized PC"; 931 m->max_cpus = HVM_MAX_VCPUS; 932 m->default_machine_opts = "accel=xen,suppress-vmdesc=on"; 933 } 934 935 DEFINE_PC_MACHINE(xenfv_4_2, "xenfv-4.2", pc_xen_hvm_init, 936 xenfv_4_2_machine_options); 937 938 static void xenfv_3_1_machine_options(MachineClass *m) 939 { 940 pc_i440fx_3_1_machine_options(m); 941 m->desc = "Xen Fully-virtualized PC"; 942 m->alias = "xenfv"; 943 m->max_cpus = HVM_MAX_VCPUS; 944 m->default_machine_opts = "accel=xen,suppress-vmdesc=on"; 945 } 946 947 DEFINE_PC_MACHINE(xenfv, "xenfv-3.1", pc_xen_hvm_init, 948 xenfv_3_1_machine_options); 949 #endif 950