1 /* 2 * QEMU PC System Emulator 3 * 4 * Copyright (c) 2003-2004 Fabrice Bellard 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 #include "qemu/osdep.h" 26 #include CONFIG_DEVICES 27 28 #include "qemu/units.h" 29 #include "hw/char/parallel-isa.h" 30 #include "hw/dma/i8257.h" 31 #include "hw/loader.h" 32 #include "hw/i386/x86.h" 33 #include "hw/i386/pc.h" 34 #include "hw/i386/apic.h" 35 #include "hw/pci-host/i440fx.h" 36 #include "hw/rtc/mc146818rtc.h" 37 #include "hw/southbridge/piix.h" 38 #include "hw/display/ramfb.h" 39 #include "hw/firmware/smbios.h" 40 #include "hw/pci/pci.h" 41 #include "hw/pci/pci_ids.h" 42 #include "hw/usb.h" 43 #include "net/net.h" 44 #include "hw/ide/isa.h" 45 #include "hw/ide/pci.h" 46 #include "hw/irq.h" 47 #include "sysemu/kvm.h" 48 #include "hw/i386/kvm/clock.h" 49 #include "hw/sysbus.h" 50 #include "hw/i2c/smbus_eeprom.h" 51 #include "exec/memory.h" 52 #include "hw/acpi/acpi.h" 53 #include "qapi/error.h" 54 #include "qemu/error-report.h" 55 #include "sysemu/xen.h" 56 #ifdef CONFIG_XEN 57 #include <xen/hvm/hvm_info_table.h> 58 #include "hw/xen/xen_pt.h" 59 #endif 60 #include "hw/xen/xen-x86.h" 61 #include "hw/xen/xen.h" 62 #include "migration/global_state.h" 63 #include "migration/misc.h" 64 #include "sysemu/numa.h" 65 #include "hw/hyperv/vmbus-bridge.h" 66 #include "hw/mem/nvdimm.h" 67 #include "hw/i386/acpi-build.h" 68 #include "kvm/kvm-cpu.h" 69 #include "target/i386/cpu.h" 70 71 #define MAX_IDE_BUS 2 72 #define XEN_IOAPIC_NUM_PIRQS 128ULL 73 74 #ifdef CONFIG_IDE_ISA 75 static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 }; 76 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 }; 77 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 }; 78 #endif 79 80 /* 81 * Return the global irq number corresponding to a given device irq 82 * pin. We could also use the bus number to have a more precise mapping. 83 */ 84 static int pc_pci_slot_get_pirq(PCIDevice *pci_dev, int pci_intx) 85 { 86 int slot_addend; 87 slot_addend = PCI_SLOT(pci_dev->devfn) - 1; 88 return (pci_intx + slot_addend) & 3; 89 } 90 91 static void piix_intx_routing_notifier_xen(PCIDevice *dev) 92 { 93 int i; 94 95 /* Scan for updates to PCI link routes (0x60-0x63). */ 96 for (i = 0; i < PIIX_NUM_PIRQS; i++) { 97 uint8_t v = dev->config_read(dev, PIIX_PIRQCA + i, 1); 98 if (v & 0x80) { 99 v = 0; 100 } 101 v &= 0xf; 102 xen_set_pci_link_route(i, v); 103 } 104 } 105 106 /* PC hardware initialisation */ 107 static void pc_init1(MachineState *machine, 108 const char *host_type, const char *pci_type) 109 { 110 PCMachineState *pcms = PC_MACHINE(machine); 111 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); 112 X86MachineState *x86ms = X86_MACHINE(machine); 113 MemoryRegion *system_memory = get_system_memory(); 114 MemoryRegion *system_io = get_system_io(); 115 PCIBus *pci_bus = NULL; 116 ISABus *isa_bus; 117 Object *piix4_pm = NULL; 118 qemu_irq smi_irq; 119 GSIState *gsi_state; 120 BusState *idebus[MAX_IDE_BUS]; 121 ISADevice *rtc_state; 122 MemoryRegion *ram_memory; 123 MemoryRegion *pci_memory = NULL; 124 MemoryRegion *rom_memory = system_memory; 125 ram_addr_t lowmem; 126 uint64_t hole64_size = 0; 127 128 /* 129 * Calculate ram split, for memory below and above 4G. It's a bit 130 * complicated for backward compatibility reasons ... 131 * 132 * - Traditional split is 3.5G (lowmem = 0xe0000000). This is the 133 * default value for max_ram_below_4g now. 134 * 135 * - Then, to gigabyte align the memory, we move the split to 3G 136 * (lowmem = 0xc0000000). But only in case we have to split in 137 * the first place, i.e. ram_size is larger than (traditional) 138 * lowmem. And for new machine types (gigabyte_align = true) 139 * only, for live migration compatibility reasons. 140 * 141 * - Next the max-ram-below-4g option was added, which allowed to 142 * reduce lowmem to a smaller value, to allow a larger PCI I/O 143 * window below 4G. qemu doesn't enforce gigabyte alignment here, 144 * but prints a warning. 145 * 146 * - Finally max-ram-below-4g got updated to also allow raising lowmem, 147 * so legacy non-PAE guests can get as much memory as possible in 148 * the 32bit address space below 4G. 149 * 150 * - Note that Xen has its own ram setup code in xen_ram_init(), 151 * called via xen_hvm_init_pc(). 152 * 153 * Examples: 154 * qemu -M pc-1.7 -m 4G (old default) -> 3584M low, 512M high 155 * qemu -M pc -m 4G (new default) -> 3072M low, 1024M high 156 * qemu -M pc,max-ram-below-4g=2G -m 4G -> 2048M low, 2048M high 157 * qemu -M pc,max-ram-below-4g=4G -m 3968M -> 3968M low (=4G-128M) 158 */ 159 if (xen_enabled()) { 160 xen_hvm_init_pc(pcms, &ram_memory); 161 } else { 162 ram_memory = machine->ram; 163 if (!pcms->max_ram_below_4g) { 164 pcms->max_ram_below_4g = 0xe0000000; /* default: 3.5G */ 165 } 166 lowmem = pcms->max_ram_below_4g; 167 if (machine->ram_size >= pcms->max_ram_below_4g) { 168 if (pcmc->gigabyte_align) { 169 if (lowmem > 0xc0000000) { 170 lowmem = 0xc0000000; 171 } 172 if (lowmem & (1 * GiB - 1)) { 173 warn_report("Large machine and max_ram_below_4g " 174 "(%" PRIu64 ") not a multiple of 1G; " 175 "possible bad performance.", 176 pcms->max_ram_below_4g); 177 } 178 } 179 } 180 181 if (machine->ram_size >= lowmem) { 182 x86ms->above_4g_mem_size = machine->ram_size - lowmem; 183 x86ms->below_4g_mem_size = lowmem; 184 } else { 185 x86ms->above_4g_mem_size = 0; 186 x86ms->below_4g_mem_size = machine->ram_size; 187 } 188 } 189 190 pc_machine_init_sgx_epc(pcms); 191 x86_cpus_init(x86ms, pcmc->default_cpu_version); 192 193 if (kvm_enabled() && pcmc->kvmclock_enabled) { 194 kvmclock_create(pcmc->kvmclock_create_always); 195 } 196 197 if (pcmc->pci_enabled) { 198 Object *phb; 199 200 pci_memory = g_new(MemoryRegion, 1); 201 memory_region_init(pci_memory, NULL, "pci", UINT64_MAX); 202 rom_memory = pci_memory; 203 204 phb = OBJECT(qdev_new(host_type)); 205 object_property_add_child(OBJECT(machine), "i440fx", phb); 206 object_property_set_link(phb, PCI_HOST_PROP_RAM_MEM, 207 OBJECT(ram_memory), &error_fatal); 208 object_property_set_link(phb, PCI_HOST_PROP_PCI_MEM, 209 OBJECT(pci_memory), &error_fatal); 210 object_property_set_link(phb, PCI_HOST_PROP_SYSTEM_MEM, 211 OBJECT(system_memory), &error_fatal); 212 object_property_set_link(phb, PCI_HOST_PROP_IO_MEM, 213 OBJECT(system_io), &error_fatal); 214 object_property_set_uint(phb, PCI_HOST_BELOW_4G_MEM_SIZE, 215 x86ms->below_4g_mem_size, &error_fatal); 216 object_property_set_uint(phb, PCI_HOST_ABOVE_4G_MEM_SIZE, 217 x86ms->above_4g_mem_size, &error_fatal); 218 object_property_set_str(phb, I440FX_HOST_PROP_PCI_TYPE, pci_type, 219 &error_fatal); 220 sysbus_realize_and_unref(SYS_BUS_DEVICE(phb), &error_fatal); 221 222 pci_bus = PCI_BUS(qdev_get_child_bus(DEVICE(phb), "pci.0")); 223 pci_bus_map_irqs(pci_bus, 224 xen_enabled() ? xen_pci_slot_get_pirq 225 : pc_pci_slot_get_pirq); 226 pcms->bus = pci_bus; 227 228 hole64_size = object_property_get_uint(phb, 229 PCI_HOST_PROP_PCI_HOLE64_SIZE, 230 &error_abort); 231 } 232 233 pc_guest_info_init(pcms); 234 235 if (pcmc->smbios_defaults) { 236 MachineClass *mc = MACHINE_GET_CLASS(machine); 237 /* These values are guest ABI, do not change */ 238 smbios_set_defaults("QEMU", mc->desc, 239 mc->name, pcmc->smbios_legacy_mode, 240 pcmc->smbios_uuid_encoded, 241 pcms->smbios_entry_point_type); 242 } 243 244 /* allocate ram and load rom/bios */ 245 if (!xen_enabled()) { 246 pc_memory_init(pcms, system_memory, rom_memory, hole64_size); 247 } else { 248 assert(machine->ram_size == x86ms->below_4g_mem_size + 249 x86ms->above_4g_mem_size); 250 251 pc_system_flash_cleanup_unused(pcms); 252 if (machine->kernel_filename != NULL) { 253 /* For xen HVM direct kernel boot, load linux here */ 254 xen_load_linux(pcms); 255 } 256 } 257 258 gsi_state = pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled); 259 260 if (pcmc->pci_enabled) { 261 PCIDevice *pci_dev; 262 DeviceState *dev; 263 size_t i; 264 265 pci_dev = pci_new_multifunction(-1, pcms->south_bridge); 266 object_property_set_bool(OBJECT(pci_dev), "has-usb", 267 machine_usb(machine), &error_abort); 268 object_property_set_bool(OBJECT(pci_dev), "has-acpi", 269 x86_machine_is_acpi_enabled(x86ms), 270 &error_abort); 271 object_property_set_bool(OBJECT(pci_dev), "has-pic", false, 272 &error_abort); 273 object_property_set_bool(OBJECT(pci_dev), "has-pit", false, 274 &error_abort); 275 qdev_prop_set_uint32(DEVICE(pci_dev), "smb_io_base", 0xb100); 276 object_property_set_bool(OBJECT(pci_dev), "smm-enabled", 277 x86_machine_is_smm_enabled(x86ms), 278 &error_abort); 279 dev = DEVICE(pci_dev); 280 for (i = 0; i < ISA_NUM_IRQS; i++) { 281 qdev_connect_gpio_out_named(dev, "isa-irqs", i, x86ms->gsi[i]); 282 } 283 pci_realize_and_unref(pci_dev, pci_bus, &error_fatal); 284 285 if (xen_enabled()) { 286 pci_device_set_intx_routing_notifier( 287 pci_dev, piix_intx_routing_notifier_xen); 288 289 /* 290 * Xen supports additional interrupt routes from the PCI devices to 291 * the IOAPIC: the four pins of each PCI device on the bus are also 292 * connected to the IOAPIC directly. 293 * These additional routes can be discovered through ACPI. 294 */ 295 pci_bus_irqs(pci_bus, xen_intx_set_irq, pci_dev, 296 XEN_IOAPIC_NUM_PIRQS); 297 } 298 299 isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(pci_dev), "isa.0")); 300 rtc_state = ISA_DEVICE(object_resolve_path_component(OBJECT(pci_dev), 301 "rtc")); 302 piix4_pm = object_resolve_path_component(OBJECT(pci_dev), "pm"); 303 dev = DEVICE(object_resolve_path_component(OBJECT(pci_dev), "ide")); 304 pci_ide_create_devs(PCI_DEVICE(dev)); 305 idebus[0] = qdev_get_child_bus(dev, "ide.0"); 306 idebus[1] = qdev_get_child_bus(dev, "ide.1"); 307 } else { 308 isa_bus = isa_bus_new(NULL, system_memory, system_io, 309 &error_abort); 310 isa_bus_register_input_irqs(isa_bus, x86ms->gsi); 311 312 rtc_state = isa_new(TYPE_MC146818_RTC); 313 qdev_prop_set_int32(DEVICE(rtc_state), "base_year", 2000); 314 isa_realize_and_unref(rtc_state, isa_bus, &error_fatal); 315 316 i8257_dma_init(isa_bus, 0); 317 pcms->hpet_enabled = false; 318 idebus[0] = NULL; 319 idebus[1] = NULL; 320 } 321 322 if (x86ms->pic == ON_OFF_AUTO_ON || x86ms->pic == ON_OFF_AUTO_AUTO) { 323 pc_i8259_create(isa_bus, gsi_state->i8259_irq); 324 } 325 326 if (pcmc->pci_enabled) { 327 ioapic_init_gsi(gsi_state, "i440fx"); 328 } 329 330 if (tcg_enabled()) { 331 x86_register_ferr_irq(x86ms->gsi[13]); 332 } 333 334 pc_vga_init(isa_bus, pcmc->pci_enabled ? pci_bus : NULL); 335 336 assert(pcms->vmport != ON_OFF_AUTO__MAX); 337 if (pcms->vmport == ON_OFF_AUTO_AUTO) { 338 pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON; 339 } 340 341 /* init basic PC hardware */ 342 pc_basic_device_init(pcms, isa_bus, x86ms->gsi, rtc_state, true, 343 0x4); 344 345 pc_nic_init(pcmc, isa_bus, pci_bus); 346 347 if (pcmc->pci_enabled) { 348 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state); 349 } 350 #ifdef CONFIG_IDE_ISA 351 else { 352 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; 353 int i; 354 355 ide_drive_get(hd, ARRAY_SIZE(hd)); 356 for (i = 0; i < MAX_IDE_BUS; i++) { 357 ISADevice *dev; 358 char busname[] = "ide.0"; 359 dev = isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i], 360 ide_irq[i], 361 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]); 362 /* 363 * The ide bus name is ide.0 for the first bus and ide.1 for the 364 * second one. 365 */ 366 busname[4] = '0' + i; 367 idebus[i] = qdev_get_child_bus(DEVICE(dev), busname); 368 } 369 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state); 370 } 371 #endif 372 373 if (piix4_pm) { 374 smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0); 375 376 qdev_connect_gpio_out_named(DEVICE(piix4_pm), "smi-irq", 0, smi_irq); 377 pcms->smbus = I2C_BUS(qdev_get_child_bus(DEVICE(piix4_pm), "i2c")); 378 /* TODO: Populate SPD eeprom data. */ 379 smbus_eeprom_init(pcms->smbus, 8, NULL, 0); 380 381 object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP, 382 TYPE_HOTPLUG_HANDLER, 383 (Object **)&x86ms->acpi_dev, 384 object_property_allow_set_link, 385 OBJ_PROP_LINK_STRONG); 386 object_property_set_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP, 387 piix4_pm, &error_abort); 388 } 389 390 if (machine->nvdimms_state->is_enabled) { 391 nvdimm_init_acpi_state(machine->nvdimms_state, system_io, 392 x86_nvdimm_acpi_dsmio, 393 x86ms->fw_cfg, OBJECT(pcms)); 394 } 395 } 396 397 typedef enum PCSouthBridgeOption { 398 PC_SOUTH_BRIDGE_OPTION_PIIX3, 399 PC_SOUTH_BRIDGE_OPTION_PIIX4, 400 PC_SOUTH_BRIDGE_OPTION_MAX, 401 } PCSouthBridgeOption; 402 403 static const QEnumLookup PCSouthBridgeOption_lookup = { 404 .array = (const char *const[]) { 405 [PC_SOUTH_BRIDGE_OPTION_PIIX3] = TYPE_PIIX3_DEVICE, 406 [PC_SOUTH_BRIDGE_OPTION_PIIX4] = TYPE_PIIX4_PCI_DEVICE, 407 }, 408 .size = PC_SOUTH_BRIDGE_OPTION_MAX 409 }; 410 411 #define NotifyVmexitOption_str(val) \ 412 qapi_enum_lookup(&NotifyVmexitOption_lookup, (val)) 413 414 static int pc_get_south_bridge(Object *obj, Error **errp) 415 { 416 PCMachineState *pcms = PC_MACHINE(obj); 417 int i; 418 419 for (i = 0; i < PCSouthBridgeOption_lookup.size; i++) { 420 if (g_strcmp0(PCSouthBridgeOption_lookup.array[i], 421 pcms->south_bridge) == 0) { 422 return i; 423 } 424 } 425 426 error_setg(errp, "Invalid south bridge value set"); 427 return 0; 428 } 429 430 static void pc_set_south_bridge(Object *obj, int value, Error **errp) 431 { 432 PCMachineState *pcms = PC_MACHINE(obj); 433 434 if (value < 0) { 435 error_setg(errp, "Value can't be negative"); 436 return; 437 } 438 439 if (value >= PCSouthBridgeOption_lookup.size) { 440 error_setg(errp, "Value too big"); 441 return; 442 } 443 444 pcms->south_bridge = PCSouthBridgeOption_lookup.array[value]; 445 } 446 447 /* Looking for a pc_compat_2_4() function? It doesn't exist. 448 * pc_compat_*() functions that run on machine-init time and 449 * change global QEMU state are deprecated. Please don't create 450 * one, and implement any pc-*-2.4 (and newer) compat code in 451 * hw_compat_*, pc_compat_*, or * pc_*_machine_options(). 452 */ 453 454 static void pc_compat_2_3_fn(MachineState *machine) 455 { 456 X86MachineState *x86ms = X86_MACHINE(machine); 457 if (kvm_enabled()) { 458 x86ms->smm = ON_OFF_AUTO_OFF; 459 } 460 } 461 462 static void pc_compat_2_2_fn(MachineState *machine) 463 { 464 pc_compat_2_3_fn(machine); 465 } 466 467 static void pc_compat_2_1_fn(MachineState *machine) 468 { 469 pc_compat_2_2_fn(machine); 470 x86_cpu_change_kvm_default("svm", NULL); 471 } 472 473 static void pc_compat_2_0_fn(MachineState *machine) 474 { 475 pc_compat_2_1_fn(machine); 476 } 477 478 #ifdef CONFIG_ISAPC 479 static void pc_init_isa(MachineState *machine) 480 { 481 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, TYPE_I440FX_PCI_DEVICE); 482 } 483 #endif 484 485 #ifdef CONFIG_XEN 486 static void pc_xen_hvm_init_pci(MachineState *machine) 487 { 488 const char *pci_type = xen_igd_gfx_pt_enabled() ? 489 TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE : TYPE_I440FX_PCI_DEVICE; 490 491 pc_init1(machine, 492 TYPE_I440FX_PCI_HOST_BRIDGE, 493 pci_type); 494 } 495 496 static void pc_xen_hvm_init(MachineState *machine) 497 { 498 PCMachineState *pcms = PC_MACHINE(machine); 499 500 if (!xen_enabled()) { 501 error_report("xenfv machine requires the xen accelerator"); 502 exit(1); 503 } 504 505 pc_xen_hvm_init_pci(machine); 506 xen_igd_reserve_slot(pcms->bus); 507 pci_create_simple(pcms->bus, -1, "xen-platform"); 508 } 509 #endif 510 511 #define DEFINE_I440FX_MACHINE(suffix, name, compatfn, optionfn) \ 512 static void pc_init_##suffix(MachineState *machine) \ 513 { \ 514 void (*compat)(MachineState *m) = (compatfn); \ 515 if (compat) { \ 516 compat(machine); \ 517 } \ 518 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, \ 519 TYPE_I440FX_PCI_DEVICE); \ 520 } \ 521 DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn) 522 523 static void pc_i440fx_machine_options(MachineClass *m) 524 { 525 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 526 ObjectClass *oc = OBJECT_CLASS(m); 527 pcmc->default_south_bridge = TYPE_PIIX3_DEVICE; 528 pcmc->pci_root_uid = 0; 529 pcmc->default_cpu_version = 1; 530 531 m->family = "pc_piix"; 532 m->desc = "Standard PC (i440FX + PIIX, 1996)"; 533 m->default_machine_opts = "firmware=bios-256k.bin"; 534 m->default_display = "std"; 535 m->default_nic = "e1000"; 536 m->no_parallel = !module_object_class_by_name(TYPE_ISA_PARALLEL); 537 machine_class_allow_dynamic_sysbus_dev(m, TYPE_RAMFB_DEVICE); 538 machine_class_allow_dynamic_sysbus_dev(m, TYPE_VMBUS_BRIDGE); 539 540 object_class_property_add_enum(oc, "x-south-bridge", "PCSouthBridgeOption", 541 &PCSouthBridgeOption_lookup, 542 pc_get_south_bridge, 543 pc_set_south_bridge); 544 object_class_property_set_description(oc, "x-south-bridge", 545 "Use a different south bridge than PIIX3"); 546 } 547 548 static void pc_i440fx_8_2_machine_options(MachineClass *m) 549 { 550 pc_i440fx_machine_options(m); 551 m->alias = "pc"; 552 m->is_default = true; 553 } 554 555 DEFINE_I440FX_MACHINE(v8_2, "pc-i440fx-8.2", NULL, 556 pc_i440fx_8_2_machine_options); 557 558 static void pc_i440fx_8_1_machine_options(MachineClass *m) 559 { 560 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 561 562 pc_i440fx_8_2_machine_options(m); 563 m->alias = NULL; 564 m->is_default = false; 565 pcmc->broken_32bit_mem_addr_check = true; 566 567 compat_props_add(m->compat_props, hw_compat_8_1, hw_compat_8_1_len); 568 compat_props_add(m->compat_props, pc_compat_8_1, pc_compat_8_1_len); 569 } 570 571 DEFINE_I440FX_MACHINE(v8_1, "pc-i440fx-8.1", NULL, 572 pc_i440fx_8_1_machine_options); 573 574 static void pc_i440fx_8_0_machine_options(MachineClass *m) 575 { 576 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 577 578 pc_i440fx_8_1_machine_options(m); 579 compat_props_add(m->compat_props, hw_compat_8_0, hw_compat_8_0_len); 580 compat_props_add(m->compat_props, pc_compat_8_0, pc_compat_8_0_len); 581 582 /* For pc-i44fx-8.0 and older, use SMBIOS 2.8 by default */ 583 pcmc->default_smbios_ep_type = SMBIOS_ENTRY_POINT_TYPE_32; 584 } 585 586 DEFINE_I440FX_MACHINE(v8_0, "pc-i440fx-8.0", NULL, 587 pc_i440fx_8_0_machine_options); 588 589 static void pc_i440fx_7_2_machine_options(MachineClass *m) 590 { 591 pc_i440fx_8_0_machine_options(m); 592 compat_props_add(m->compat_props, hw_compat_7_2, hw_compat_7_2_len); 593 compat_props_add(m->compat_props, pc_compat_7_2, pc_compat_7_2_len); 594 } 595 596 DEFINE_I440FX_MACHINE(v7_2, "pc-i440fx-7.2", NULL, 597 pc_i440fx_7_2_machine_options); 598 599 static void pc_i440fx_7_1_machine_options(MachineClass *m) 600 { 601 pc_i440fx_7_2_machine_options(m); 602 compat_props_add(m->compat_props, hw_compat_7_1, hw_compat_7_1_len); 603 compat_props_add(m->compat_props, pc_compat_7_1, pc_compat_7_1_len); 604 } 605 606 DEFINE_I440FX_MACHINE(v7_1, "pc-i440fx-7.1", NULL, 607 pc_i440fx_7_1_machine_options); 608 609 static void pc_i440fx_7_0_machine_options(MachineClass *m) 610 { 611 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 612 pc_i440fx_7_1_machine_options(m); 613 pcmc->enforce_amd_1tb_hole = false; 614 compat_props_add(m->compat_props, hw_compat_7_0, hw_compat_7_0_len); 615 compat_props_add(m->compat_props, pc_compat_7_0, pc_compat_7_0_len); 616 } 617 618 DEFINE_I440FX_MACHINE(v7_0, "pc-i440fx-7.0", NULL, 619 pc_i440fx_7_0_machine_options); 620 621 static void pc_i440fx_6_2_machine_options(MachineClass *m) 622 { 623 pc_i440fx_7_0_machine_options(m); 624 compat_props_add(m->compat_props, hw_compat_6_2, hw_compat_6_2_len); 625 compat_props_add(m->compat_props, pc_compat_6_2, pc_compat_6_2_len); 626 } 627 628 DEFINE_I440FX_MACHINE(v6_2, "pc-i440fx-6.2", NULL, 629 pc_i440fx_6_2_machine_options); 630 631 static void pc_i440fx_6_1_machine_options(MachineClass *m) 632 { 633 pc_i440fx_6_2_machine_options(m); 634 compat_props_add(m->compat_props, hw_compat_6_1, hw_compat_6_1_len); 635 compat_props_add(m->compat_props, pc_compat_6_1, pc_compat_6_1_len); 636 m->smp_props.prefer_sockets = true; 637 } 638 639 DEFINE_I440FX_MACHINE(v6_1, "pc-i440fx-6.1", NULL, 640 pc_i440fx_6_1_machine_options); 641 642 static void pc_i440fx_6_0_machine_options(MachineClass *m) 643 { 644 pc_i440fx_6_1_machine_options(m); 645 compat_props_add(m->compat_props, hw_compat_6_0, hw_compat_6_0_len); 646 compat_props_add(m->compat_props, pc_compat_6_0, pc_compat_6_0_len); 647 } 648 649 DEFINE_I440FX_MACHINE(v6_0, "pc-i440fx-6.0", NULL, 650 pc_i440fx_6_0_machine_options); 651 652 static void pc_i440fx_5_2_machine_options(MachineClass *m) 653 { 654 pc_i440fx_6_0_machine_options(m); 655 compat_props_add(m->compat_props, hw_compat_5_2, hw_compat_5_2_len); 656 compat_props_add(m->compat_props, pc_compat_5_2, pc_compat_5_2_len); 657 } 658 659 DEFINE_I440FX_MACHINE(v5_2, "pc-i440fx-5.2", NULL, 660 pc_i440fx_5_2_machine_options); 661 662 static void pc_i440fx_5_1_machine_options(MachineClass *m) 663 { 664 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 665 666 pc_i440fx_5_2_machine_options(m); 667 compat_props_add(m->compat_props, hw_compat_5_1, hw_compat_5_1_len); 668 compat_props_add(m->compat_props, pc_compat_5_1, pc_compat_5_1_len); 669 pcmc->kvmclock_create_always = false; 670 pcmc->pci_root_uid = 1; 671 } 672 673 DEFINE_I440FX_MACHINE(v5_1, "pc-i440fx-5.1", NULL, 674 pc_i440fx_5_1_machine_options); 675 676 static void pc_i440fx_5_0_machine_options(MachineClass *m) 677 { 678 pc_i440fx_5_1_machine_options(m); 679 m->numa_mem_supported = true; 680 compat_props_add(m->compat_props, hw_compat_5_0, hw_compat_5_0_len); 681 compat_props_add(m->compat_props, pc_compat_5_0, pc_compat_5_0_len); 682 m->auto_enable_numa_with_memdev = false; 683 } 684 685 DEFINE_I440FX_MACHINE(v5_0, "pc-i440fx-5.0", NULL, 686 pc_i440fx_5_0_machine_options); 687 688 static void pc_i440fx_4_2_machine_options(MachineClass *m) 689 { 690 pc_i440fx_5_0_machine_options(m); 691 compat_props_add(m->compat_props, hw_compat_4_2, hw_compat_4_2_len); 692 compat_props_add(m->compat_props, pc_compat_4_2, pc_compat_4_2_len); 693 } 694 695 DEFINE_I440FX_MACHINE(v4_2, "pc-i440fx-4.2", NULL, 696 pc_i440fx_4_2_machine_options); 697 698 static void pc_i440fx_4_1_machine_options(MachineClass *m) 699 { 700 pc_i440fx_4_2_machine_options(m); 701 compat_props_add(m->compat_props, hw_compat_4_1, hw_compat_4_1_len); 702 compat_props_add(m->compat_props, pc_compat_4_1, pc_compat_4_1_len); 703 } 704 705 DEFINE_I440FX_MACHINE(v4_1, "pc-i440fx-4.1", NULL, 706 pc_i440fx_4_1_machine_options); 707 708 static void pc_i440fx_4_0_machine_options(MachineClass *m) 709 { 710 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 711 pc_i440fx_4_1_machine_options(m); 712 pcmc->default_cpu_version = CPU_VERSION_LEGACY; 713 compat_props_add(m->compat_props, hw_compat_4_0, hw_compat_4_0_len); 714 compat_props_add(m->compat_props, pc_compat_4_0, pc_compat_4_0_len); 715 } 716 717 DEFINE_I440FX_MACHINE(v4_0, "pc-i440fx-4.0", NULL, 718 pc_i440fx_4_0_machine_options); 719 720 static void pc_i440fx_3_1_machine_options(MachineClass *m) 721 { 722 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 723 724 pc_i440fx_4_0_machine_options(m); 725 m->smbus_no_migration_support = true; 726 pcmc->pvh_enabled = false; 727 compat_props_add(m->compat_props, hw_compat_3_1, hw_compat_3_1_len); 728 compat_props_add(m->compat_props, pc_compat_3_1, pc_compat_3_1_len); 729 } 730 731 DEFINE_I440FX_MACHINE(v3_1, "pc-i440fx-3.1", NULL, 732 pc_i440fx_3_1_machine_options); 733 734 static void pc_i440fx_3_0_machine_options(MachineClass *m) 735 { 736 pc_i440fx_3_1_machine_options(m); 737 compat_props_add(m->compat_props, hw_compat_3_0, hw_compat_3_0_len); 738 compat_props_add(m->compat_props, pc_compat_3_0, pc_compat_3_0_len); 739 } 740 741 DEFINE_I440FX_MACHINE(v3_0, "pc-i440fx-3.0", NULL, 742 pc_i440fx_3_0_machine_options); 743 744 static void pc_i440fx_2_12_machine_options(MachineClass *m) 745 { 746 pc_i440fx_3_0_machine_options(m); 747 compat_props_add(m->compat_props, hw_compat_2_12, hw_compat_2_12_len); 748 compat_props_add(m->compat_props, pc_compat_2_12, pc_compat_2_12_len); 749 } 750 751 DEFINE_I440FX_MACHINE(v2_12, "pc-i440fx-2.12", NULL, 752 pc_i440fx_2_12_machine_options); 753 754 static void pc_i440fx_2_11_machine_options(MachineClass *m) 755 { 756 pc_i440fx_2_12_machine_options(m); 757 compat_props_add(m->compat_props, hw_compat_2_11, hw_compat_2_11_len); 758 compat_props_add(m->compat_props, pc_compat_2_11, pc_compat_2_11_len); 759 } 760 761 DEFINE_I440FX_MACHINE(v2_11, "pc-i440fx-2.11", NULL, 762 pc_i440fx_2_11_machine_options); 763 764 static void pc_i440fx_2_10_machine_options(MachineClass *m) 765 { 766 pc_i440fx_2_11_machine_options(m); 767 compat_props_add(m->compat_props, hw_compat_2_10, hw_compat_2_10_len); 768 compat_props_add(m->compat_props, pc_compat_2_10, pc_compat_2_10_len); 769 m->auto_enable_numa_with_memhp = false; 770 } 771 772 DEFINE_I440FX_MACHINE(v2_10, "pc-i440fx-2.10", NULL, 773 pc_i440fx_2_10_machine_options); 774 775 static void pc_i440fx_2_9_machine_options(MachineClass *m) 776 { 777 pc_i440fx_2_10_machine_options(m); 778 compat_props_add(m->compat_props, hw_compat_2_9, hw_compat_2_9_len); 779 compat_props_add(m->compat_props, pc_compat_2_9, pc_compat_2_9_len); 780 } 781 782 DEFINE_I440FX_MACHINE(v2_9, "pc-i440fx-2.9", NULL, 783 pc_i440fx_2_9_machine_options); 784 785 static void pc_i440fx_2_8_machine_options(MachineClass *m) 786 { 787 pc_i440fx_2_9_machine_options(m); 788 compat_props_add(m->compat_props, hw_compat_2_8, hw_compat_2_8_len); 789 compat_props_add(m->compat_props, pc_compat_2_8, pc_compat_2_8_len); 790 } 791 792 DEFINE_I440FX_MACHINE(v2_8, "pc-i440fx-2.8", NULL, 793 pc_i440fx_2_8_machine_options); 794 795 static void pc_i440fx_2_7_machine_options(MachineClass *m) 796 { 797 pc_i440fx_2_8_machine_options(m); 798 compat_props_add(m->compat_props, hw_compat_2_7, hw_compat_2_7_len); 799 compat_props_add(m->compat_props, pc_compat_2_7, pc_compat_2_7_len); 800 } 801 802 DEFINE_I440FX_MACHINE(v2_7, "pc-i440fx-2.7", NULL, 803 pc_i440fx_2_7_machine_options); 804 805 static void pc_i440fx_2_6_machine_options(MachineClass *m) 806 { 807 X86MachineClass *x86mc = X86_MACHINE_CLASS(m); 808 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 809 810 pc_i440fx_2_7_machine_options(m); 811 pcmc->legacy_cpu_hotplug = true; 812 x86mc->fwcfg_dma_enabled = false; 813 compat_props_add(m->compat_props, hw_compat_2_6, hw_compat_2_6_len); 814 compat_props_add(m->compat_props, pc_compat_2_6, pc_compat_2_6_len); 815 } 816 817 DEFINE_I440FX_MACHINE(v2_6, "pc-i440fx-2.6", NULL, 818 pc_i440fx_2_6_machine_options); 819 820 static void pc_i440fx_2_5_machine_options(MachineClass *m) 821 { 822 X86MachineClass *x86mc = X86_MACHINE_CLASS(m); 823 824 pc_i440fx_2_6_machine_options(m); 825 x86mc->save_tsc_khz = false; 826 m->legacy_fw_cfg_order = 1; 827 compat_props_add(m->compat_props, hw_compat_2_5, hw_compat_2_5_len); 828 compat_props_add(m->compat_props, pc_compat_2_5, pc_compat_2_5_len); 829 } 830 831 DEFINE_I440FX_MACHINE(v2_5, "pc-i440fx-2.5", NULL, 832 pc_i440fx_2_5_machine_options); 833 834 static void pc_i440fx_2_4_machine_options(MachineClass *m) 835 { 836 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 837 838 pc_i440fx_2_5_machine_options(m); 839 m->hw_version = "2.4.0"; 840 pcmc->broken_reserved_end = true; 841 compat_props_add(m->compat_props, hw_compat_2_4, hw_compat_2_4_len); 842 compat_props_add(m->compat_props, pc_compat_2_4, pc_compat_2_4_len); 843 } 844 845 DEFINE_I440FX_MACHINE(v2_4, "pc-i440fx-2.4", NULL, 846 pc_i440fx_2_4_machine_options) 847 848 static void pc_i440fx_2_3_machine_options(MachineClass *m) 849 { 850 pc_i440fx_2_4_machine_options(m); 851 m->hw_version = "2.3.0"; 852 compat_props_add(m->compat_props, hw_compat_2_3, hw_compat_2_3_len); 853 compat_props_add(m->compat_props, pc_compat_2_3, pc_compat_2_3_len); 854 } 855 856 DEFINE_I440FX_MACHINE(v2_3, "pc-i440fx-2.3", pc_compat_2_3_fn, 857 pc_i440fx_2_3_machine_options); 858 859 static void pc_i440fx_2_2_machine_options(MachineClass *m) 860 { 861 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 862 863 pc_i440fx_2_3_machine_options(m); 864 m->hw_version = "2.2.0"; 865 m->default_machine_opts = "firmware=bios-256k.bin,suppress-vmdesc=on"; 866 compat_props_add(m->compat_props, hw_compat_2_2, hw_compat_2_2_len); 867 compat_props_add(m->compat_props, pc_compat_2_2, pc_compat_2_2_len); 868 pcmc->rsdp_in_ram = false; 869 pcmc->resizable_acpi_blob = false; 870 } 871 872 DEFINE_I440FX_MACHINE(v2_2, "pc-i440fx-2.2", pc_compat_2_2_fn, 873 pc_i440fx_2_2_machine_options); 874 875 static void pc_i440fx_2_1_machine_options(MachineClass *m) 876 { 877 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 878 879 pc_i440fx_2_2_machine_options(m); 880 m->hw_version = "2.1.0"; 881 m->default_display = NULL; 882 compat_props_add(m->compat_props, hw_compat_2_1, hw_compat_2_1_len); 883 compat_props_add(m->compat_props, pc_compat_2_1, pc_compat_2_1_len); 884 pcmc->smbios_uuid_encoded = false; 885 pcmc->enforce_aligned_dimm = false; 886 } 887 888 DEFINE_I440FX_MACHINE(v2_1, "pc-i440fx-2.1", pc_compat_2_1_fn, 889 pc_i440fx_2_1_machine_options); 890 891 static void pc_i440fx_2_0_machine_options(MachineClass *m) 892 { 893 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 894 895 pc_i440fx_2_1_machine_options(m); 896 m->hw_version = "2.0.0"; 897 compat_props_add(m->compat_props, pc_compat_2_0, pc_compat_2_0_len); 898 pcmc->smbios_legacy_mode = true; 899 pcmc->has_reserved_memory = false; 900 /* This value depends on the actual DSDT and SSDT compiled into 901 * the source QEMU; unfortunately it depends on the binary and 902 * not on the machine type, so we cannot make pc-i440fx-1.7 work on 903 * both QEMU 1.7 and QEMU 2.0. 904 * 905 * Large variations cause migration to fail for more than one 906 * consecutive value of the "-smp" maxcpus option. 907 * 908 * For small variations of the kind caused by different iasl versions, 909 * the 4k rounding usually leaves slack. However, there could be still 910 * one or two values that break. For QEMU 1.7 and QEMU 2.0 the 911 * slack is only ~10 bytes before one "-smp maxcpus" value breaks! 912 * 913 * 6652 is valid for QEMU 2.0, the right value for pc-i440fx-1.7 on 914 * QEMU 1.7 it is 6414. For RHEL/CentOS 7.0 it is 6418. 915 */ 916 pcmc->legacy_acpi_table_size = 6652; 917 pcmc->acpi_data_size = 0x10000; 918 } 919 920 DEFINE_I440FX_MACHINE(v2_0, "pc-i440fx-2.0", pc_compat_2_0_fn, 921 pc_i440fx_2_0_machine_options); 922 923 #ifdef CONFIG_ISAPC 924 static void isapc_machine_options(MachineClass *m) 925 { 926 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 927 m->desc = "ISA-only PC"; 928 m->max_cpus = 1; 929 m->option_rom_has_mr = true; 930 m->rom_file_has_mr = false; 931 pcmc->pci_enabled = false; 932 pcmc->has_acpi_build = false; 933 pcmc->smbios_defaults = false; 934 pcmc->gigabyte_align = false; 935 pcmc->smbios_legacy_mode = true; 936 pcmc->has_reserved_memory = false; 937 m->default_nic = "ne2k_isa"; 938 m->default_cpu_type = X86_CPU_TYPE_NAME("486"); 939 m->no_parallel = !module_object_class_by_name(TYPE_ISA_PARALLEL); 940 } 941 942 DEFINE_PC_MACHINE(isapc, "isapc", pc_init_isa, 943 isapc_machine_options); 944 #endif 945 946 #ifdef CONFIG_XEN 947 static void xenfv_4_2_machine_options(MachineClass *m) 948 { 949 pc_i440fx_4_2_machine_options(m); 950 m->desc = "Xen Fully-virtualized PC"; 951 m->max_cpus = HVM_MAX_VCPUS; 952 m->default_machine_opts = "accel=xen,suppress-vmdesc=on"; 953 } 954 955 DEFINE_PC_MACHINE(xenfv_4_2, "xenfv-4.2", pc_xen_hvm_init, 956 xenfv_4_2_machine_options); 957 958 static void xenfv_3_1_machine_options(MachineClass *m) 959 { 960 pc_i440fx_3_1_machine_options(m); 961 m->desc = "Xen Fully-virtualized PC"; 962 m->alias = "xenfv"; 963 m->max_cpus = HVM_MAX_VCPUS; 964 m->default_machine_opts = "accel=xen,suppress-vmdesc=on"; 965 } 966 967 DEFINE_PC_MACHINE(xenfv, "xenfv-3.1", pc_xen_hvm_init, 968 xenfv_3_1_machine_options); 969 #endif 970