1 /* 2 * QEMU PC System Emulator 3 * 4 * Copyright (c) 2003-2004 Fabrice Bellard 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 #include "qemu/osdep.h" 26 27 #include "hw/hw.h" 28 #include "hw/loader.h" 29 #include "hw/i386/pc.h" 30 #include "hw/i386/apic.h" 31 #include "hw/smbios/smbios.h" 32 #include "hw/pci/pci.h" 33 #include "hw/pci/pci_ids.h" 34 #include "hw/usb.h" 35 #include "net/net.h" 36 #include "hw/boards.h" 37 #include "hw/ide.h" 38 #include "sysemu/kvm.h" 39 #include "hw/kvm/clock.h" 40 #include "sysemu/sysemu.h" 41 #include "hw/sysbus.h" 42 #include "sysemu/arch_init.h" 43 #include "sysemu/block-backend.h" 44 #include "hw/i2c/smbus.h" 45 #include "hw/xen/xen.h" 46 #include "exec/memory.h" 47 #include "exec/address-spaces.h" 48 #include "hw/acpi/acpi.h" 49 #include "cpu.h" 50 #include "qemu/error-report.h" 51 #ifdef CONFIG_XEN 52 #include <xen/hvm/hvm_info_table.h> 53 #include "hw/xen/xen_pt.h" 54 #endif 55 #include "migration/migration.h" 56 #include "kvm_i386.h" 57 58 #define MAX_IDE_BUS 2 59 60 static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 }; 61 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 }; 62 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 }; 63 64 /* PC hardware initialisation */ 65 static void pc_init1(MachineState *machine, 66 const char *host_type, const char *pci_type) 67 { 68 PCMachineState *pcms = PC_MACHINE(machine); 69 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); 70 MemoryRegion *system_memory = get_system_memory(); 71 MemoryRegion *system_io = get_system_io(); 72 int i; 73 PCIBus *pci_bus; 74 ISABus *isa_bus; 75 PCII440FXState *i440fx_state; 76 int piix3_devfn = -1; 77 qemu_irq *i8259; 78 qemu_irq smi_irq; 79 GSIState *gsi_state; 80 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; 81 BusState *idebus[MAX_IDE_BUS]; 82 ISADevice *rtc_state; 83 MemoryRegion *ram_memory; 84 MemoryRegion *pci_memory; 85 MemoryRegion *rom_memory; 86 ram_addr_t lowmem; 87 88 /* 89 * Calculate ram split, for memory below and above 4G. It's a bit 90 * complicated for backward compatibility reasons ... 91 * 92 * - Traditional split is 3.5G (lowmem = 0xe0000000). This is the 93 * default value for max_ram_below_4g now. 94 * 95 * - Then, to gigabyte align the memory, we move the split to 3G 96 * (lowmem = 0xc0000000). But only in case we have to split in 97 * the first place, i.e. ram_size is larger than (traditional) 98 * lowmem. And for new machine types (gigabyte_align = true) 99 * only, for live migration compatibility reasons. 100 * 101 * - Next the max-ram-below-4g option was added, which allowed to 102 * reduce lowmem to a smaller value, to allow a larger PCI I/O 103 * window below 4G. qemu doesn't enforce gigabyte alignment here, 104 * but prints a warning. 105 * 106 * - Finally max-ram-below-4g got updated to also allow raising lowmem, 107 * so legacy non-PAE guests can get as much memory as possible in 108 * the 32bit address space below 4G. 109 * 110 * - Note that Xen has its own ram setp code in xen_ram_init(), 111 * called via xen_hvm_init(). 112 * 113 * Examples: 114 * qemu -M pc-1.7 -m 4G (old default) -> 3584M low, 512M high 115 * qemu -M pc -m 4G (new default) -> 3072M low, 1024M high 116 * qemu -M pc,max-ram-below-4g=2G -m 4G -> 2048M low, 2048M high 117 * qemu -M pc,max-ram-below-4g=4G -m 3968M -> 3968M low (=4G-128M) 118 */ 119 if (xen_enabled()) { 120 xen_hvm_init(pcms, &ram_memory); 121 } else { 122 if (!pcms->max_ram_below_4g) { 123 pcms->max_ram_below_4g = 0xe0000000; /* default: 3.5G */ 124 } 125 lowmem = pcms->max_ram_below_4g; 126 if (machine->ram_size >= pcms->max_ram_below_4g) { 127 if (pcmc->gigabyte_align) { 128 if (lowmem > 0xc0000000) { 129 lowmem = 0xc0000000; 130 } 131 if (lowmem & ((1ULL << 30) - 1)) { 132 error_report("Warning: Large machine and max_ram_below_4g " 133 "(%" PRIu64 ") not a multiple of 1G; " 134 "possible bad performance.", 135 pcms->max_ram_below_4g); 136 } 137 } 138 } 139 140 if (machine->ram_size >= lowmem) { 141 pcms->above_4g_mem_size = machine->ram_size - lowmem; 142 pcms->below_4g_mem_size = lowmem; 143 } else { 144 pcms->above_4g_mem_size = 0; 145 pcms->below_4g_mem_size = machine->ram_size; 146 } 147 } 148 149 pc_cpus_init(pcms); 150 151 if (kvm_enabled() && pcmc->kvmclock_enabled) { 152 kvmclock_create(); 153 } 154 155 if (pcmc->pci_enabled) { 156 pci_memory = g_new(MemoryRegion, 1); 157 memory_region_init(pci_memory, NULL, "pci", UINT64_MAX); 158 rom_memory = pci_memory; 159 } else { 160 pci_memory = NULL; 161 rom_memory = system_memory; 162 } 163 164 pc_guest_info_init(pcms); 165 166 if (pcmc->smbios_defaults) { 167 MachineClass *mc = MACHINE_GET_CLASS(machine); 168 /* These values are guest ABI, do not change */ 169 smbios_set_defaults("QEMU", "Standard PC (i440FX + PIIX, 1996)", 170 mc->name, pcmc->smbios_legacy_mode, 171 pcmc->smbios_uuid_encoded, 172 SMBIOS_ENTRY_POINT_21); 173 } 174 175 /* allocate ram and load rom/bios */ 176 if (!xen_enabled()) { 177 pc_memory_init(pcms, system_memory, 178 rom_memory, &ram_memory); 179 } else if (machine->kernel_filename != NULL) { 180 /* For xen HVM direct kernel boot, load linux here */ 181 xen_load_linux(pcms); 182 } 183 184 gsi_state = g_malloc0(sizeof(*gsi_state)); 185 if (kvm_ioapic_in_kernel()) { 186 kvm_pc_setup_irq_routing(pcmc->pci_enabled); 187 pcms->gsi = qemu_allocate_irqs(kvm_pc_gsi_handler, gsi_state, 188 GSI_NUM_PINS); 189 } else { 190 pcms->gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS); 191 } 192 193 if (pcmc->pci_enabled) { 194 pci_bus = i440fx_init(host_type, 195 pci_type, 196 &i440fx_state, &piix3_devfn, &isa_bus, pcms->gsi, 197 system_memory, system_io, machine->ram_size, 198 pcms->below_4g_mem_size, 199 pcms->above_4g_mem_size, 200 pci_memory, ram_memory); 201 pcms->bus = pci_bus; 202 } else { 203 pci_bus = NULL; 204 i440fx_state = NULL; 205 isa_bus = isa_bus_new(NULL, get_system_memory(), system_io, 206 &error_abort); 207 no_hpet = 1; 208 } 209 isa_bus_irqs(isa_bus, pcms->gsi); 210 211 if (kvm_pic_in_kernel()) { 212 i8259 = kvm_i8259_init(isa_bus); 213 } else if (xen_enabled()) { 214 i8259 = xen_interrupt_controller_init(); 215 } else { 216 i8259 = i8259_init(isa_bus, pc_allocate_cpu_irq()); 217 } 218 219 for (i = 0; i < ISA_NUM_IRQS; i++) { 220 gsi_state->i8259_irq[i] = i8259[i]; 221 } 222 g_free(i8259); 223 if (pcmc->pci_enabled) { 224 ioapic_init_gsi(gsi_state, "i440fx"); 225 } 226 227 pc_register_ferr_irq(pcms->gsi[13]); 228 229 pc_vga_init(isa_bus, pcmc->pci_enabled ? pci_bus : NULL); 230 231 assert(pcms->vmport != ON_OFF_AUTO__MAX); 232 if (pcms->vmport == ON_OFF_AUTO_AUTO) { 233 pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON; 234 } 235 236 /* init basic PC hardware */ 237 pc_basic_device_init(isa_bus, pcms->gsi, &rtc_state, true, 238 (pcms->vmport != ON_OFF_AUTO_ON), 0x4); 239 240 pc_nic_init(isa_bus, pci_bus); 241 242 ide_drive_get(hd, ARRAY_SIZE(hd)); 243 if (pcmc->pci_enabled) { 244 PCIDevice *dev; 245 if (xen_enabled()) { 246 dev = pci_piix3_xen_ide_init(pci_bus, hd, piix3_devfn + 1); 247 } else { 248 dev = pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1); 249 } 250 idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0"); 251 idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1"); 252 } else { 253 for(i = 0; i < MAX_IDE_BUS; i++) { 254 ISADevice *dev; 255 char busname[] = "ide.0"; 256 dev = isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i], 257 ide_irq[i], 258 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]); 259 /* 260 * The ide bus name is ide.0 for the first bus and ide.1 for the 261 * second one. 262 */ 263 busname[4] = '0' + i; 264 idebus[i] = qdev_get_child_bus(DEVICE(dev), busname); 265 } 266 } 267 268 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state); 269 270 if (pcmc->pci_enabled && machine_usb(machine)) { 271 pci_create_simple(pci_bus, piix3_devfn + 2, "piix3-usb-uhci"); 272 } 273 274 if (pcmc->pci_enabled && acpi_enabled) { 275 DeviceState *piix4_pm; 276 I2CBus *smbus; 277 278 smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0); 279 /* TODO: Populate SPD eeprom data. */ 280 smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, 281 pcms->gsi[9], smi_irq, 282 pc_machine_is_smm_enabled(pcms), 283 &piix4_pm); 284 smbus_eeprom_init(smbus, 8, NULL, 0); 285 286 object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP, 287 TYPE_HOTPLUG_HANDLER, 288 (Object **)&pcms->acpi_dev, 289 object_property_allow_set_link, 290 OBJ_PROP_LINK_UNREF_ON_RELEASE, &error_abort); 291 object_property_set_link(OBJECT(machine), OBJECT(piix4_pm), 292 PC_MACHINE_ACPI_DEVICE_PROP, &error_abort); 293 } 294 295 if (pcmc->pci_enabled) { 296 pc_pci_device_init(pci_bus); 297 } 298 299 if (pcms->acpi_nvdimm_state.is_enabled) { 300 nvdimm_init_acpi_state(&pcms->acpi_nvdimm_state, system_io, 301 pcms->fw_cfg, OBJECT(pcms)); 302 } 303 } 304 305 /* Looking for a pc_compat_2_4() function? It doesn't exist. 306 * pc_compat_*() functions that run on machine-init time and 307 * change global QEMU state are deprecated. Please don't create 308 * one, and implement any pc-*-2.4 (and newer) compat code in 309 * HW_COMPAT_*, PC_COMPAT_*, or * pc_*_machine_options(). 310 */ 311 312 static void pc_compat_2_3(MachineState *machine) 313 { 314 PCMachineState *pcms = PC_MACHINE(machine); 315 savevm_skip_section_footers(); 316 if (kvm_enabled()) { 317 pcms->smm = ON_OFF_AUTO_OFF; 318 } 319 global_state_set_optional(); 320 savevm_skip_configuration(); 321 } 322 323 static void pc_compat_2_2(MachineState *machine) 324 { 325 pc_compat_2_3(machine); 326 machine->suppress_vmdesc = true; 327 } 328 329 static void pc_compat_2_1(MachineState *machine) 330 { 331 pc_compat_2_2(machine); 332 x86_cpu_change_kvm_default("svm", NULL); 333 } 334 335 static void pc_compat_2_0(MachineState *machine) 336 { 337 pc_compat_2_1(machine); 338 } 339 340 static void pc_compat_1_7(MachineState *machine) 341 { 342 pc_compat_2_0(machine); 343 x86_cpu_change_kvm_default("x2apic", NULL); 344 } 345 346 static void pc_compat_1_6(MachineState *machine) 347 { 348 pc_compat_1_7(machine); 349 } 350 351 static void pc_compat_1_5(MachineState *machine) 352 { 353 pc_compat_1_6(machine); 354 } 355 356 static void pc_compat_1_4(MachineState *machine) 357 { 358 pc_compat_1_5(machine); 359 } 360 361 static void pc_compat_1_3(MachineState *machine) 362 { 363 pc_compat_1_4(machine); 364 enable_compat_apic_id_mode(); 365 } 366 367 /* PC compat function for pc-0.14 to pc-1.2 */ 368 static void pc_compat_1_2(MachineState *machine) 369 { 370 pc_compat_1_3(machine); 371 x86_cpu_change_kvm_default("kvm-pv-eoi", NULL); 372 } 373 374 /* PC compat function for pc-0.10 to pc-0.13 */ 375 static void pc_compat_0_13(MachineState *machine) 376 { 377 pc_compat_1_2(machine); 378 } 379 380 static void pc_init_isa(MachineState *machine) 381 { 382 if (!machine->cpu_model) { 383 machine->cpu_model = "486"; 384 } 385 x86_cpu_change_kvm_default("kvm-pv-eoi", NULL); 386 enable_compat_apic_id_mode(); 387 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, TYPE_I440FX_PCI_DEVICE); 388 } 389 390 #ifdef CONFIG_XEN 391 static void pc_xen_hvm_init_pci(MachineState *machine) 392 { 393 const char *pci_type = has_igd_gfx_passthru ? 394 TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE : TYPE_I440FX_PCI_DEVICE; 395 396 pc_init1(machine, 397 TYPE_I440FX_PCI_HOST_BRIDGE, 398 pci_type); 399 } 400 401 static void pc_xen_hvm_init(MachineState *machine) 402 { 403 PCIBus *bus; 404 405 if (!xen_enabled()) { 406 error_report("xenfv machine requires the xen accelerator"); 407 exit(1); 408 } 409 410 pc_xen_hvm_init_pci(machine); 411 412 bus = pci_find_primary_bus(); 413 if (bus != NULL) { 414 pci_create_simple(bus, -1, "xen-platform"); 415 } 416 } 417 #endif 418 419 #define DEFINE_I440FX_MACHINE(suffix, name, compatfn, optionfn) \ 420 static void pc_init_##suffix(MachineState *machine) \ 421 { \ 422 void (*compat)(MachineState *m) = (compatfn); \ 423 if (compat) { \ 424 compat(machine); \ 425 } \ 426 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, \ 427 TYPE_I440FX_PCI_DEVICE); \ 428 } \ 429 DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn) 430 431 static void pc_i440fx_machine_options(MachineClass *m) 432 { 433 m->family = "pc_piix"; 434 m->desc = "Standard PC (i440FX + PIIX, 1996)"; 435 m->hot_add_cpu = pc_hot_add_cpu; 436 m->default_machine_opts = "firmware=bios-256k.bin"; 437 m->default_display = "std"; 438 } 439 440 static void pc_i440fx_2_8_machine_options(MachineClass *m) 441 { 442 pc_i440fx_machine_options(m); 443 m->alias = "pc"; 444 m->is_default = 1; 445 } 446 447 DEFINE_I440FX_MACHINE(v2_8, "pc-i440fx-2.8", NULL, 448 pc_i440fx_2_8_machine_options); 449 450 451 static void pc_i440fx_2_7_machine_options(MachineClass *m) 452 { 453 pc_i440fx_2_8_machine_options(m); 454 m->is_default = 0; 455 m->alias = NULL; 456 SET_MACHINE_COMPAT(m, PC_COMPAT_2_7); 457 } 458 459 DEFINE_I440FX_MACHINE(v2_7, "pc-i440fx-2.7", NULL, 460 pc_i440fx_2_7_machine_options); 461 462 463 static void pc_i440fx_2_6_machine_options(MachineClass *m) 464 { 465 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 466 pc_i440fx_2_7_machine_options(m); 467 pcmc->legacy_cpu_hotplug = true; 468 SET_MACHINE_COMPAT(m, PC_COMPAT_2_6); 469 } 470 471 DEFINE_I440FX_MACHINE(v2_6, "pc-i440fx-2.6", NULL, 472 pc_i440fx_2_6_machine_options); 473 474 475 static void pc_i440fx_2_5_machine_options(MachineClass *m) 476 { 477 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 478 pc_i440fx_2_6_machine_options(m); 479 pcmc->save_tsc_khz = false; 480 m->legacy_fw_cfg_order = 1; 481 SET_MACHINE_COMPAT(m, PC_COMPAT_2_5); 482 } 483 484 DEFINE_I440FX_MACHINE(v2_5, "pc-i440fx-2.5", NULL, 485 pc_i440fx_2_5_machine_options); 486 487 488 static void pc_i440fx_2_4_machine_options(MachineClass *m) 489 { 490 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 491 pc_i440fx_2_5_machine_options(m); 492 m->hw_version = "2.4.0"; 493 pcmc->broken_reserved_end = true; 494 SET_MACHINE_COMPAT(m, PC_COMPAT_2_4); 495 } 496 497 DEFINE_I440FX_MACHINE(v2_4, "pc-i440fx-2.4", NULL, 498 pc_i440fx_2_4_machine_options) 499 500 501 static void pc_i440fx_2_3_machine_options(MachineClass *m) 502 { 503 pc_i440fx_2_4_machine_options(m); 504 m->hw_version = "2.3.0"; 505 SET_MACHINE_COMPAT(m, PC_COMPAT_2_3); 506 } 507 508 DEFINE_I440FX_MACHINE(v2_3, "pc-i440fx-2.3", pc_compat_2_3, 509 pc_i440fx_2_3_machine_options); 510 511 512 static void pc_i440fx_2_2_machine_options(MachineClass *m) 513 { 514 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 515 pc_i440fx_2_3_machine_options(m); 516 m->hw_version = "2.2.0"; 517 SET_MACHINE_COMPAT(m, PC_COMPAT_2_2); 518 pcmc->rsdp_in_ram = false; 519 } 520 521 DEFINE_I440FX_MACHINE(v2_2, "pc-i440fx-2.2", pc_compat_2_2, 522 pc_i440fx_2_2_machine_options); 523 524 525 static void pc_i440fx_2_1_machine_options(MachineClass *m) 526 { 527 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 528 pc_i440fx_2_2_machine_options(m); 529 m->hw_version = "2.1.0"; 530 m->default_display = NULL; 531 SET_MACHINE_COMPAT(m, PC_COMPAT_2_1); 532 pcmc->smbios_uuid_encoded = false; 533 pcmc->enforce_aligned_dimm = false; 534 } 535 536 DEFINE_I440FX_MACHINE(v2_1, "pc-i440fx-2.1", pc_compat_2_1, 537 pc_i440fx_2_1_machine_options); 538 539 540 541 static void pc_i440fx_2_0_machine_options(MachineClass *m) 542 { 543 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 544 pc_i440fx_2_1_machine_options(m); 545 m->hw_version = "2.0.0"; 546 SET_MACHINE_COMPAT(m, PC_COMPAT_2_0); 547 pcmc->smbios_legacy_mode = true; 548 pcmc->has_reserved_memory = false; 549 /* This value depends on the actual DSDT and SSDT compiled into 550 * the source QEMU; unfortunately it depends on the binary and 551 * not on the machine type, so we cannot make pc-i440fx-1.7 work on 552 * both QEMU 1.7 and QEMU 2.0. 553 * 554 * Large variations cause migration to fail for more than one 555 * consecutive value of the "-smp" maxcpus option. 556 * 557 * For small variations of the kind caused by different iasl versions, 558 * the 4k rounding usually leaves slack. However, there could be still 559 * one or two values that break. For QEMU 1.7 and QEMU 2.0 the 560 * slack is only ~10 bytes before one "-smp maxcpus" value breaks! 561 * 562 * 6652 is valid for QEMU 2.0, the right value for pc-i440fx-1.7 on 563 * QEMU 1.7 it is 6414. For RHEL/CentOS 7.0 it is 6418. 564 */ 565 pcmc->legacy_acpi_table_size = 6652; 566 pcmc->acpi_data_size = 0x10000; 567 } 568 569 DEFINE_I440FX_MACHINE(v2_0, "pc-i440fx-2.0", pc_compat_2_0, 570 pc_i440fx_2_0_machine_options); 571 572 573 static void pc_i440fx_1_7_machine_options(MachineClass *m) 574 { 575 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 576 pc_i440fx_2_0_machine_options(m); 577 m->hw_version = "1.7.0"; 578 m->default_machine_opts = NULL; 579 m->option_rom_has_mr = true; 580 SET_MACHINE_COMPAT(m, PC_COMPAT_1_7); 581 pcmc->smbios_defaults = false; 582 pcmc->gigabyte_align = false; 583 pcmc->legacy_acpi_table_size = 6414; 584 } 585 586 DEFINE_I440FX_MACHINE(v1_7, "pc-i440fx-1.7", pc_compat_1_7, 587 pc_i440fx_1_7_machine_options); 588 589 590 static void pc_i440fx_1_6_machine_options(MachineClass *m) 591 { 592 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 593 pc_i440fx_1_7_machine_options(m); 594 m->hw_version = "1.6.0"; 595 m->rom_file_has_mr = false; 596 SET_MACHINE_COMPAT(m, PC_COMPAT_1_6); 597 pcmc->has_acpi_build = false; 598 } 599 600 DEFINE_I440FX_MACHINE(v1_6, "pc-i440fx-1.6", pc_compat_1_6, 601 pc_i440fx_1_6_machine_options); 602 603 604 static void pc_i440fx_1_5_machine_options(MachineClass *m) 605 { 606 pc_i440fx_1_6_machine_options(m); 607 m->hw_version = "1.5.0"; 608 SET_MACHINE_COMPAT(m, PC_COMPAT_1_5); 609 } 610 611 DEFINE_I440FX_MACHINE(v1_5, "pc-i440fx-1.5", pc_compat_1_5, 612 pc_i440fx_1_5_machine_options); 613 614 615 static void pc_i440fx_1_4_machine_options(MachineClass *m) 616 { 617 pc_i440fx_1_5_machine_options(m); 618 m->hw_version = "1.4.0"; 619 m->hot_add_cpu = NULL; 620 SET_MACHINE_COMPAT(m, PC_COMPAT_1_4); 621 } 622 623 DEFINE_I440FX_MACHINE(v1_4, "pc-i440fx-1.4", pc_compat_1_4, 624 pc_i440fx_1_4_machine_options); 625 626 627 #define PC_COMPAT_1_3 \ 628 PC_CPU_MODEL_IDS("1.3.0") \ 629 {\ 630 .driver = "usb-tablet",\ 631 .property = "usb_version",\ 632 .value = stringify(1),\ 633 },{\ 634 .driver = "virtio-net-pci",\ 635 .property = "ctrl_mac_addr",\ 636 .value = "off", \ 637 },{ \ 638 .driver = "virtio-net-pci", \ 639 .property = "mq", \ 640 .value = "off", \ 641 }, {\ 642 .driver = "e1000",\ 643 .property = "autonegotiation",\ 644 .value = "off",\ 645 }, 646 647 648 static void pc_i440fx_1_3_machine_options(MachineClass *m) 649 { 650 pc_i440fx_1_4_machine_options(m); 651 m->hw_version = "1.3.0"; 652 SET_MACHINE_COMPAT(m, PC_COMPAT_1_3); 653 } 654 655 DEFINE_I440FX_MACHINE(v1_3, "pc-1.3", pc_compat_1_3, 656 pc_i440fx_1_3_machine_options); 657 658 659 #define PC_COMPAT_1_2 \ 660 PC_CPU_MODEL_IDS("1.2.0") \ 661 {\ 662 .driver = "nec-usb-xhci",\ 663 .property = "msi",\ 664 .value = "off",\ 665 },{\ 666 .driver = "nec-usb-xhci",\ 667 .property = "msix",\ 668 .value = "off",\ 669 },{\ 670 .driver = "ivshmem",\ 671 .property = "use64",\ 672 .value = "0",\ 673 },{\ 674 .driver = "qxl",\ 675 .property = "revision",\ 676 .value = stringify(3),\ 677 },{\ 678 .driver = "qxl-vga",\ 679 .property = "revision",\ 680 .value = stringify(3),\ 681 },{\ 682 .driver = "VGA",\ 683 .property = "mmio",\ 684 .value = "off",\ 685 }, 686 687 static void pc_i440fx_1_2_machine_options(MachineClass *m) 688 { 689 pc_i440fx_1_3_machine_options(m); 690 m->hw_version = "1.2.0"; 691 SET_MACHINE_COMPAT(m, PC_COMPAT_1_2); 692 } 693 694 DEFINE_I440FX_MACHINE(v1_2, "pc-1.2", pc_compat_1_2, 695 pc_i440fx_1_2_machine_options); 696 697 698 #define PC_COMPAT_1_1 \ 699 PC_CPU_MODEL_IDS("1.1.0") \ 700 {\ 701 .driver = "virtio-scsi-pci",\ 702 .property = "hotplug",\ 703 .value = "off",\ 704 },{\ 705 .driver = "virtio-scsi-pci",\ 706 .property = "param_change",\ 707 .value = "off",\ 708 },{\ 709 .driver = "VGA",\ 710 .property = "vgamem_mb",\ 711 .value = stringify(8),\ 712 },{\ 713 .driver = "vmware-svga",\ 714 .property = "vgamem_mb",\ 715 .value = stringify(8),\ 716 },{\ 717 .driver = "qxl-vga",\ 718 .property = "vgamem_mb",\ 719 .value = stringify(8),\ 720 },{\ 721 .driver = "qxl",\ 722 .property = "vgamem_mb",\ 723 .value = stringify(8),\ 724 },{\ 725 .driver = "virtio-blk-pci",\ 726 .property = "config-wce",\ 727 .value = "off",\ 728 }, 729 730 static void pc_i440fx_1_1_machine_options(MachineClass *m) 731 { 732 pc_i440fx_1_2_machine_options(m); 733 m->hw_version = "1.1.0"; 734 SET_MACHINE_COMPAT(m, PC_COMPAT_1_1); 735 } 736 737 DEFINE_I440FX_MACHINE(v1_1, "pc-1.1", pc_compat_1_2, 738 pc_i440fx_1_1_machine_options); 739 740 741 #define PC_COMPAT_1_0 \ 742 PC_CPU_MODEL_IDS("1.0") \ 743 {\ 744 .driver = TYPE_ISA_FDC,\ 745 .property = "check_media_rate",\ 746 .value = "off",\ 747 }, {\ 748 .driver = "virtio-balloon-pci",\ 749 .property = "class",\ 750 .value = stringify(PCI_CLASS_MEMORY_RAM),\ 751 },{\ 752 .driver = "apic-common",\ 753 .property = "vapic",\ 754 .value = "off",\ 755 },{\ 756 .driver = TYPE_USB_DEVICE,\ 757 .property = "full-path",\ 758 .value = "no",\ 759 }, 760 761 static void pc_i440fx_1_0_machine_options(MachineClass *m) 762 { 763 pc_i440fx_1_1_machine_options(m); 764 m->hw_version = "1.0"; 765 SET_MACHINE_COMPAT(m, PC_COMPAT_1_0); 766 } 767 768 DEFINE_I440FX_MACHINE(v1_0, "pc-1.0", pc_compat_1_2, 769 pc_i440fx_1_0_machine_options); 770 771 772 #define PC_COMPAT_0_15 \ 773 PC_CPU_MODEL_IDS("0.15") 774 775 static void pc_i440fx_0_15_machine_options(MachineClass *m) 776 { 777 pc_i440fx_1_0_machine_options(m); 778 m->hw_version = "0.15"; 779 SET_MACHINE_COMPAT(m, PC_COMPAT_0_15); 780 } 781 782 DEFINE_I440FX_MACHINE(v0_15, "pc-0.15", pc_compat_1_2, 783 pc_i440fx_0_15_machine_options); 784 785 786 #define PC_COMPAT_0_14 \ 787 PC_CPU_MODEL_IDS("0.14") \ 788 {\ 789 .driver = "virtio-blk-pci",\ 790 .property = "event_idx",\ 791 .value = "off",\ 792 },{\ 793 .driver = "virtio-serial-pci",\ 794 .property = "event_idx",\ 795 .value = "off",\ 796 },{\ 797 .driver = "virtio-net-pci",\ 798 .property = "event_idx",\ 799 .value = "off",\ 800 },{\ 801 .driver = "virtio-balloon-pci",\ 802 .property = "event_idx",\ 803 .value = "off",\ 804 },{\ 805 .driver = "qxl",\ 806 .property = "revision",\ 807 .value = stringify(2),\ 808 },{\ 809 .driver = "qxl-vga",\ 810 .property = "revision",\ 811 .value = stringify(2),\ 812 }, 813 814 static void pc_i440fx_0_14_machine_options(MachineClass *m) 815 { 816 pc_i440fx_0_15_machine_options(m); 817 m->hw_version = "0.14"; 818 SET_MACHINE_COMPAT(m, PC_COMPAT_0_14); 819 } 820 821 DEFINE_I440FX_MACHINE(v0_14, "pc-0.14", pc_compat_1_2, 822 pc_i440fx_0_14_machine_options); 823 824 825 #define PC_COMPAT_0_13 \ 826 PC_CPU_MODEL_IDS("0.13") \ 827 {\ 828 .driver = TYPE_PCI_DEVICE,\ 829 .property = "command_serr_enable",\ 830 .value = "off",\ 831 },{\ 832 .driver = "AC97",\ 833 .property = "use_broken_id",\ 834 .value = stringify(1),\ 835 },{\ 836 .driver = "virtio-9p-pci",\ 837 .property = "vectors",\ 838 .value = stringify(0),\ 839 },{\ 840 .driver = "VGA",\ 841 .property = "rombar",\ 842 .value = stringify(0),\ 843 },{\ 844 .driver = "vmware-svga",\ 845 .property = "rombar",\ 846 .value = stringify(0),\ 847 }, 848 849 static void pc_i440fx_0_13_machine_options(MachineClass *m) 850 { 851 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 852 pc_i440fx_0_14_machine_options(m); 853 m->hw_version = "0.13"; 854 SET_MACHINE_COMPAT(m, PC_COMPAT_0_13); 855 pcmc->kvmclock_enabled = false; 856 } 857 858 DEFINE_I440FX_MACHINE(v0_13, "pc-0.13", pc_compat_0_13, 859 pc_i440fx_0_13_machine_options); 860 861 862 #define PC_COMPAT_0_12 \ 863 PC_CPU_MODEL_IDS("0.12") \ 864 {\ 865 .driver = "virtio-serial-pci",\ 866 .property = "max_ports",\ 867 .value = stringify(1),\ 868 },{\ 869 .driver = "virtio-serial-pci",\ 870 .property = "vectors",\ 871 .value = stringify(0),\ 872 },{\ 873 .driver = "usb-mouse",\ 874 .property = "serial",\ 875 .value = "1",\ 876 },{\ 877 .driver = "usb-tablet",\ 878 .property = "serial",\ 879 .value = "1",\ 880 },{\ 881 .driver = "usb-kbd",\ 882 .property = "serial",\ 883 .value = "1",\ 884 }, 885 886 static void pc_i440fx_0_12_machine_options(MachineClass *m) 887 { 888 pc_i440fx_0_13_machine_options(m); 889 m->hw_version = "0.12"; 890 SET_MACHINE_COMPAT(m, PC_COMPAT_0_12); 891 } 892 893 DEFINE_I440FX_MACHINE(v0_12, "pc-0.12", pc_compat_0_13, 894 pc_i440fx_0_12_machine_options); 895 896 897 #define PC_COMPAT_0_11 \ 898 PC_CPU_MODEL_IDS("0.11") \ 899 {\ 900 .driver = "virtio-blk-pci",\ 901 .property = "vectors",\ 902 .value = stringify(0),\ 903 },{\ 904 .driver = TYPE_PCI_DEVICE,\ 905 .property = "rombar",\ 906 .value = stringify(0),\ 907 },{\ 908 .driver = "ide-drive",\ 909 .property = "ver",\ 910 .value = "0.11",\ 911 },{\ 912 .driver = "scsi-disk",\ 913 .property = "ver",\ 914 .value = "0.11",\ 915 }, 916 917 static void pc_i440fx_0_11_machine_options(MachineClass *m) 918 { 919 pc_i440fx_0_12_machine_options(m); 920 m->hw_version = "0.11"; 921 SET_MACHINE_COMPAT(m, PC_COMPAT_0_11); 922 } 923 924 DEFINE_I440FX_MACHINE(v0_11, "pc-0.11", pc_compat_0_13, 925 pc_i440fx_0_11_machine_options); 926 927 928 #define PC_COMPAT_0_10 \ 929 PC_CPU_MODEL_IDS("0.10") \ 930 {\ 931 .driver = "virtio-blk-pci",\ 932 .property = "class",\ 933 .value = stringify(PCI_CLASS_STORAGE_OTHER),\ 934 },{\ 935 .driver = "virtio-serial-pci",\ 936 .property = "class",\ 937 .value = stringify(PCI_CLASS_DISPLAY_OTHER),\ 938 },{\ 939 .driver = "virtio-net-pci",\ 940 .property = "vectors",\ 941 .value = stringify(0),\ 942 },{\ 943 .driver = "ide-drive",\ 944 .property = "ver",\ 945 .value = "0.10",\ 946 },{\ 947 .driver = "scsi-disk",\ 948 .property = "ver",\ 949 .value = "0.10",\ 950 }, 951 952 static void pc_i440fx_0_10_machine_options(MachineClass *m) 953 { 954 pc_i440fx_0_11_machine_options(m); 955 m->hw_version = "0.10"; 956 SET_MACHINE_COMPAT(m, PC_COMPAT_0_10); 957 } 958 959 DEFINE_I440FX_MACHINE(v0_10, "pc-0.10", pc_compat_0_13, 960 pc_i440fx_0_10_machine_options); 961 962 typedef struct { 963 uint16_t gpu_device_id; 964 uint16_t pch_device_id; 965 uint8_t pch_revision_id; 966 } IGDDeviceIDInfo; 967 968 /* In real world different GPU should have different PCH. But actually 969 * the different PCH DIDs likely map to different PCH SKUs. We do the 970 * same thing for the GPU. For PCH, the different SKUs are going to be 971 * all the same silicon design and implementation, just different 972 * features turn on and off with fuses. The SW interfaces should be 973 * consistent across all SKUs in a given family (eg LPT). But just same 974 * features may not be supported. 975 * 976 * Most of these different PCH features probably don't matter to the 977 * Gfx driver, but obviously any difference in display port connections 978 * will so it should be fine with any PCH in case of passthrough. 979 * 980 * So currently use one PCH version, 0x8c4e, to cover all HSW(Haswell) 981 * scenarios, 0x9cc3 for BDW(Broadwell). 982 */ 983 static const IGDDeviceIDInfo igd_combo_id_infos[] = { 984 /* HSW Classic */ 985 {0x0402, 0x8c4e, 0x04}, /* HSWGT1D, HSWD_w7 */ 986 {0x0406, 0x8c4e, 0x04}, /* HSWGT1M, HSWM_w7 */ 987 {0x0412, 0x8c4e, 0x04}, /* HSWGT2D, HSWD_w7 */ 988 {0x0416, 0x8c4e, 0x04}, /* HSWGT2M, HSWM_w7 */ 989 {0x041E, 0x8c4e, 0x04}, /* HSWGT15D, HSWD_w7 */ 990 /* HSW ULT */ 991 {0x0A06, 0x8c4e, 0x04}, /* HSWGT1UT, HSWM_w7 */ 992 {0x0A16, 0x8c4e, 0x04}, /* HSWGT2UT, HSWM_w7 */ 993 {0x0A26, 0x8c4e, 0x06}, /* HSWGT3UT, HSWM_w7 */ 994 {0x0A2E, 0x8c4e, 0x04}, /* HSWGT3UT28W, HSWM_w7 */ 995 {0x0A1E, 0x8c4e, 0x04}, /* HSWGT2UX, HSWM_w7 */ 996 {0x0A0E, 0x8c4e, 0x04}, /* HSWGT1ULX, HSWM_w7 */ 997 /* HSW CRW */ 998 {0x0D26, 0x8c4e, 0x04}, /* HSWGT3CW, HSWM_w7 */ 999 {0x0D22, 0x8c4e, 0x04}, /* HSWGT3CWDT, HSWD_w7 */ 1000 /* HSW Server */ 1001 {0x041A, 0x8c4e, 0x04}, /* HSWSVGT2, HSWD_w7 */ 1002 /* HSW SRVR */ 1003 {0x040A, 0x8c4e, 0x04}, /* HSWSVGT1, HSWD_w7 */ 1004 /* BSW */ 1005 {0x1606, 0x9cc3, 0x03}, /* BDWULTGT1, BDWM_w7 */ 1006 {0x1616, 0x9cc3, 0x03}, /* BDWULTGT2, BDWM_w7 */ 1007 {0x1626, 0x9cc3, 0x03}, /* BDWULTGT3, BDWM_w7 */ 1008 {0x160E, 0x9cc3, 0x03}, /* BDWULXGT1, BDWM_w7 */ 1009 {0x161E, 0x9cc3, 0x03}, /* BDWULXGT2, BDWM_w7 */ 1010 {0x1602, 0x9cc3, 0x03}, /* BDWHALOGT1, BDWM_w7 */ 1011 {0x1612, 0x9cc3, 0x03}, /* BDWHALOGT2, BDWM_w7 */ 1012 {0x1622, 0x9cc3, 0x03}, /* BDWHALOGT3, BDWM_w7 */ 1013 {0x162B, 0x9cc3, 0x03}, /* BDWHALO28W, BDWM_w7 */ 1014 {0x162A, 0x9cc3, 0x03}, /* BDWGT3WRKS, BDWM_w7 */ 1015 {0x162D, 0x9cc3, 0x03}, /* BDWGT3SRVR, BDWM_w7 */ 1016 }; 1017 1018 static void isa_bridge_class_init(ObjectClass *klass, void *data) 1019 { 1020 DeviceClass *dc = DEVICE_CLASS(klass); 1021 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 1022 1023 dc->desc = "ISA bridge faked to support IGD PT"; 1024 k->vendor_id = PCI_VENDOR_ID_INTEL; 1025 k->class_id = PCI_CLASS_BRIDGE_ISA; 1026 }; 1027 1028 static TypeInfo isa_bridge_info = { 1029 .name = "igd-passthrough-isa-bridge", 1030 .parent = TYPE_PCI_DEVICE, 1031 .instance_size = sizeof(PCIDevice), 1032 .class_init = isa_bridge_class_init, 1033 }; 1034 1035 static void pt_graphics_register_types(void) 1036 { 1037 type_register_static(&isa_bridge_info); 1038 } 1039 type_init(pt_graphics_register_types) 1040 1041 void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id) 1042 { 1043 struct PCIDevice *bridge_dev; 1044 int i, num; 1045 uint16_t pch_dev_id = 0xffff; 1046 uint8_t pch_rev_id; 1047 1048 num = ARRAY_SIZE(igd_combo_id_infos); 1049 for (i = 0; i < num; i++) { 1050 if (gpu_dev_id == igd_combo_id_infos[i].gpu_device_id) { 1051 pch_dev_id = igd_combo_id_infos[i].pch_device_id; 1052 pch_rev_id = igd_combo_id_infos[i].pch_revision_id; 1053 } 1054 } 1055 1056 if (pch_dev_id == 0xffff) { 1057 return; 1058 } 1059 1060 /* Currently IGD drivers always need to access PCH by 1f.0. */ 1061 bridge_dev = pci_create_simple(bus, PCI_DEVFN(0x1f, 0), 1062 "igd-passthrough-isa-bridge"); 1063 1064 /* 1065 * Note that vendor id is always PCI_VENDOR_ID_INTEL. 1066 */ 1067 if (!bridge_dev) { 1068 fprintf(stderr, "set igd-passthrough-isa-bridge failed!\n"); 1069 return; 1070 } 1071 pci_config_set_device_id(bridge_dev->config, pch_dev_id); 1072 pci_config_set_revision(bridge_dev->config, pch_rev_id); 1073 } 1074 1075 static void isapc_machine_options(MachineClass *m) 1076 { 1077 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 1078 m->desc = "ISA-only PC"; 1079 m->max_cpus = 1; 1080 m->option_rom_has_mr = true; 1081 m->rom_file_has_mr = false; 1082 pcmc->pci_enabled = false; 1083 pcmc->has_acpi_build = false; 1084 pcmc->smbios_defaults = false; 1085 pcmc->gigabyte_align = false; 1086 pcmc->smbios_legacy_mode = true; 1087 pcmc->has_reserved_memory = false; 1088 } 1089 1090 DEFINE_PC_MACHINE(isapc, "isapc", pc_init_isa, 1091 isapc_machine_options); 1092 1093 1094 #ifdef CONFIG_XEN 1095 static void xenfv_machine_options(MachineClass *m) 1096 { 1097 m->desc = "Xen Fully-virtualized PC"; 1098 m->max_cpus = HVM_MAX_VCPUS; 1099 m->default_machine_opts = "accel=xen"; 1100 m->hot_add_cpu = pc_hot_add_cpu; 1101 } 1102 1103 DEFINE_PC_MACHINE(xenfv, "xenfv", pc_xen_hvm_init, 1104 xenfv_machine_options); 1105 #endif 1106