1 /* 2 * QEMU PC System Emulator 3 * 4 * Copyright (c) 2003-2004 Fabrice Bellard 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 #include "qemu/osdep.h" 26 #include CONFIG_DEVICES 27 28 #include "qemu/units.h" 29 #include "hw/char/parallel-isa.h" 30 #include "hw/dma/i8257.h" 31 #include "hw/loader.h" 32 #include "hw/i386/x86.h" 33 #include "hw/i386/pc.h" 34 #include "hw/i386/apic.h" 35 #include "hw/pci-host/i440fx.h" 36 #include "hw/rtc/mc146818rtc.h" 37 #include "hw/southbridge/piix.h" 38 #include "hw/display/ramfb.h" 39 #include "hw/pci/pci.h" 40 #include "hw/pci/pci_ids.h" 41 #include "hw/usb.h" 42 #include "net/net.h" 43 #include "hw/ide/isa.h" 44 #include "hw/ide/pci.h" 45 #include "hw/irq.h" 46 #include "sysemu/kvm.h" 47 #include "hw/i386/kvm/clock.h" 48 #include "hw/sysbus.h" 49 #include "hw/i2c/smbus_eeprom.h" 50 #include "exec/memory.h" 51 #include "hw/acpi/acpi.h" 52 #include "qapi/error.h" 53 #include "qemu/error-report.h" 54 #include "sysemu/xen.h" 55 #ifdef CONFIG_XEN 56 #include <xen/hvm/hvm_info_table.h> 57 #include "hw/xen/xen_pt.h" 58 #include "hw/xen/xen_igd.h" 59 #endif 60 #include "hw/xen/xen-x86.h" 61 #include "hw/xen/xen.h" 62 #include "migration/global_state.h" 63 #include "migration/misc.h" 64 #include "sysemu/runstate.h" 65 #include "sysemu/numa.h" 66 #include "hw/hyperv/vmbus-bridge.h" 67 #include "hw/mem/nvdimm.h" 68 #include "hw/i386/acpi-build.h" 69 #include "target/i386/cpu.h" 70 71 #define XEN_IOAPIC_NUM_PIRQS 128ULL 72 73 #ifdef CONFIG_IDE_ISA 74 static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 }; 75 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 }; 76 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 }; 77 #endif 78 79 /* 80 * Return the global irq number corresponding to a given device irq 81 * pin. We could also use the bus number to have a more precise mapping. 82 */ 83 static int pc_pci_slot_get_pirq(PCIDevice *pci_dev, int pci_intx) 84 { 85 int slot_addend; 86 slot_addend = PCI_SLOT(pci_dev->devfn) - 1; 87 return (pci_intx + slot_addend) & 3; 88 } 89 90 static void piix_intx_routing_notifier_xen(PCIDevice *dev) 91 { 92 int i; 93 94 /* Scan for updates to PCI link routes. */ 95 for (i = 0; i < PIIX_NUM_PIRQS; i++) { 96 const PCIINTxRoute route = pci_device_route_intx_to_irq(dev, i); 97 const uint8_t v = route.mode == PCI_INTX_ENABLED ? route.irq : 0; 98 xen_set_pci_link_route(i, v); 99 } 100 } 101 102 /* PC hardware initialisation */ 103 static void pc_init1(MachineState *machine, const char *pci_type) 104 { 105 PCMachineState *pcms = PC_MACHINE(machine); 106 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); 107 X86MachineState *x86ms = X86_MACHINE(machine); 108 MemoryRegion *system_memory = get_system_memory(); 109 MemoryRegion *system_io = get_system_io(); 110 Object *phb = NULL; 111 ISABus *isa_bus; 112 Object *piix4_pm = NULL; 113 qemu_irq smi_irq; 114 GSIState *gsi_state; 115 MemoryRegion *ram_memory; 116 MemoryRegion *pci_memory = NULL; 117 MemoryRegion *rom_memory = system_memory; 118 ram_addr_t lowmem; 119 uint64_t hole64_size = 0; 120 121 /* 122 * Calculate ram split, for memory below and above 4G. It's a bit 123 * complicated for backward compatibility reasons ... 124 * 125 * - Traditional split is 3.5G (lowmem = 0xe0000000). This is the 126 * default value for max_ram_below_4g now. 127 * 128 * - Then, to gigabyte align the memory, we move the split to 3G 129 * (lowmem = 0xc0000000). But only in case we have to split in 130 * the first place, i.e. ram_size is larger than (traditional) 131 * lowmem. And for new machine types (gigabyte_align = true) 132 * only, for live migration compatibility reasons. 133 * 134 * - Next the max-ram-below-4g option was added, which allowed to 135 * reduce lowmem to a smaller value, to allow a larger PCI I/O 136 * window below 4G. qemu doesn't enforce gigabyte alignment here, 137 * but prints a warning. 138 * 139 * - Finally max-ram-below-4g got updated to also allow raising lowmem, 140 * so legacy non-PAE guests can get as much memory as possible in 141 * the 32bit address space below 4G. 142 * 143 * - Note that Xen has its own ram setup code in xen_ram_init(), 144 * called via xen_hvm_init_pc(). 145 * 146 * Examples: 147 * qemu -M pc-1.7 -m 4G (old default) -> 3584M low, 512M high 148 * qemu -M pc -m 4G (new default) -> 3072M low, 1024M high 149 * qemu -M pc,max-ram-below-4g=2G -m 4G -> 2048M low, 2048M high 150 * qemu -M pc,max-ram-below-4g=4G -m 3968M -> 3968M low (=4G-128M) 151 */ 152 if (xen_enabled()) { 153 xen_hvm_init_pc(pcms, &ram_memory); 154 } else { 155 ram_memory = machine->ram; 156 if (!pcms->max_ram_below_4g) { 157 pcms->max_ram_below_4g = 0xe0000000; /* default: 3.5G */ 158 } 159 lowmem = pcms->max_ram_below_4g; 160 if (machine->ram_size >= pcms->max_ram_below_4g) { 161 if (pcmc->gigabyte_align) { 162 if (lowmem > 0xc0000000) { 163 lowmem = 0xc0000000; 164 } 165 if (lowmem & (1 * GiB - 1)) { 166 warn_report("Large machine and max_ram_below_4g " 167 "(%" PRIu64 ") not a multiple of 1G; " 168 "possible bad performance.", 169 pcms->max_ram_below_4g); 170 } 171 } 172 } 173 174 if (machine->ram_size >= lowmem) { 175 x86ms->above_4g_mem_size = machine->ram_size - lowmem; 176 x86ms->below_4g_mem_size = lowmem; 177 } else { 178 x86ms->above_4g_mem_size = 0; 179 x86ms->below_4g_mem_size = machine->ram_size; 180 } 181 } 182 183 pc_machine_init_sgx_epc(pcms); 184 x86_cpus_init(x86ms, pcmc->default_cpu_version); 185 186 if (kvm_enabled()) { 187 kvmclock_create(pcmc->kvmclock_create_always); 188 } 189 190 if (pcmc->pci_enabled) { 191 pci_memory = g_new(MemoryRegion, 1); 192 memory_region_init(pci_memory, NULL, "pci", UINT64_MAX); 193 rom_memory = pci_memory; 194 195 phb = OBJECT(qdev_new(TYPE_I440FX_PCI_HOST_BRIDGE)); 196 object_property_add_child(OBJECT(machine), "i440fx", phb); 197 object_property_set_link(phb, PCI_HOST_PROP_RAM_MEM, 198 OBJECT(ram_memory), &error_fatal); 199 object_property_set_link(phb, PCI_HOST_PROP_PCI_MEM, 200 OBJECT(pci_memory), &error_fatal); 201 object_property_set_link(phb, PCI_HOST_PROP_SYSTEM_MEM, 202 OBJECT(system_memory), &error_fatal); 203 object_property_set_link(phb, PCI_HOST_PROP_IO_MEM, 204 OBJECT(system_io), &error_fatal); 205 object_property_set_uint(phb, PCI_HOST_BELOW_4G_MEM_SIZE, 206 x86ms->below_4g_mem_size, &error_fatal); 207 object_property_set_uint(phb, PCI_HOST_ABOVE_4G_MEM_SIZE, 208 x86ms->above_4g_mem_size, &error_fatal); 209 object_property_set_str(phb, I440FX_HOST_PROP_PCI_TYPE, pci_type, 210 &error_fatal); 211 sysbus_realize_and_unref(SYS_BUS_DEVICE(phb), &error_fatal); 212 213 pcms->pcibus = PCI_BUS(qdev_get_child_bus(DEVICE(phb), "pci.0")); 214 pci_bus_map_irqs(pcms->pcibus, 215 xen_enabled() ? xen_pci_slot_get_pirq 216 : pc_pci_slot_get_pirq); 217 218 hole64_size = object_property_get_uint(phb, 219 PCI_HOST_PROP_PCI_HOLE64_SIZE, 220 &error_abort); 221 } 222 223 /* allocate ram and load rom/bios */ 224 if (!xen_enabled()) { 225 pc_memory_init(pcms, system_memory, rom_memory, hole64_size); 226 } else { 227 assert(machine->ram_size == x86ms->below_4g_mem_size + 228 x86ms->above_4g_mem_size); 229 230 pc_system_flash_cleanup_unused(pcms); 231 if (machine->kernel_filename != NULL) { 232 /* For xen HVM direct kernel boot, load linux here */ 233 xen_load_linux(pcms); 234 } 235 } 236 237 gsi_state = pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled); 238 239 if (pcmc->pci_enabled) { 240 PCIDevice *pci_dev; 241 DeviceState *dev; 242 size_t i; 243 244 pci_dev = pci_new_multifunction(-1, pcms->south_bridge); 245 object_property_set_bool(OBJECT(pci_dev), "has-usb", 246 machine_usb(machine), &error_abort); 247 object_property_set_bool(OBJECT(pci_dev), "has-acpi", 248 x86_machine_is_acpi_enabled(x86ms), 249 &error_abort); 250 object_property_set_bool(OBJECT(pci_dev), "has-pic", false, 251 &error_abort); 252 object_property_set_bool(OBJECT(pci_dev), "has-pit", false, 253 &error_abort); 254 qdev_prop_set_uint32(DEVICE(pci_dev), "smb_io_base", 0xb100); 255 object_property_set_bool(OBJECT(pci_dev), "smm-enabled", 256 x86_machine_is_smm_enabled(x86ms), 257 &error_abort); 258 dev = DEVICE(pci_dev); 259 for (i = 0; i < ISA_NUM_IRQS; i++) { 260 qdev_connect_gpio_out_named(dev, "isa-irqs", i, x86ms->gsi[i]); 261 } 262 pci_realize_and_unref(pci_dev, pcms->pcibus, &error_fatal); 263 264 if (xen_enabled()) { 265 pci_device_set_intx_routing_notifier( 266 pci_dev, piix_intx_routing_notifier_xen); 267 268 /* 269 * Xen supports additional interrupt routes from the PCI devices to 270 * the IOAPIC: the four pins of each PCI device on the bus are also 271 * connected to the IOAPIC directly. 272 * These additional routes can be discovered through ACPI. 273 */ 274 pci_bus_irqs(pcms->pcibus, xen_intx_set_irq, pci_dev, 275 XEN_IOAPIC_NUM_PIRQS); 276 } 277 278 isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(pci_dev), "isa.0")); 279 x86ms->rtc = ISA_DEVICE(object_resolve_path_component(OBJECT(pci_dev), 280 "rtc")); 281 piix4_pm = object_resolve_path_component(OBJECT(pci_dev), "pm"); 282 dev = DEVICE(object_resolve_path_component(OBJECT(pci_dev), "ide")); 283 pci_ide_create_devs(PCI_DEVICE(dev)); 284 pcms->idebus[0] = qdev_get_child_bus(dev, "ide.0"); 285 pcms->idebus[1] = qdev_get_child_bus(dev, "ide.1"); 286 } else { 287 isa_bus = isa_bus_new(NULL, system_memory, system_io, 288 &error_abort); 289 isa_bus_register_input_irqs(isa_bus, x86ms->gsi); 290 291 x86ms->rtc = isa_new(TYPE_MC146818_RTC); 292 qdev_prop_set_int32(DEVICE(x86ms->rtc), "base_year", 2000); 293 isa_realize_and_unref(x86ms->rtc, isa_bus, &error_fatal); 294 295 i8257_dma_init(OBJECT(machine), isa_bus, 0); 296 pcms->hpet_enabled = false; 297 } 298 299 if (x86ms->pic == ON_OFF_AUTO_ON || x86ms->pic == ON_OFF_AUTO_AUTO) { 300 pc_i8259_create(isa_bus, gsi_state->i8259_irq); 301 } 302 303 if (phb) { 304 ioapic_init_gsi(gsi_state, phb); 305 } 306 307 if (tcg_enabled()) { 308 x86_register_ferr_irq(x86ms->gsi[13]); 309 } 310 311 pc_vga_init(isa_bus, pcmc->pci_enabled ? pcms->pcibus : NULL); 312 313 assert(pcms->vmport != ON_OFF_AUTO__MAX); 314 if (pcms->vmport == ON_OFF_AUTO_AUTO) { 315 pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON; 316 } 317 318 /* init basic PC hardware */ 319 pc_basic_device_init(pcms, isa_bus, x86ms->gsi, x86ms->rtc, 320 !MACHINE_CLASS(pcmc)->no_floppy, 0x4); 321 322 pc_nic_init(pcmc, isa_bus, pcms->pcibus); 323 324 #ifdef CONFIG_IDE_ISA 325 if (!pcmc->pci_enabled) { 326 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; 327 int i; 328 329 ide_drive_get(hd, ARRAY_SIZE(hd)); 330 for (i = 0; i < MAX_IDE_BUS; i++) { 331 ISADevice *dev; 332 char busname[] = "ide.0"; 333 dev = isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i], 334 ide_irq[i], 335 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]); 336 /* 337 * The ide bus name is ide.0 for the first bus and ide.1 for the 338 * second one. 339 */ 340 busname[4] = '0' + i; 341 pcms->idebus[i] = qdev_get_child_bus(DEVICE(dev), busname); 342 } 343 } 344 #endif 345 346 if (piix4_pm) { 347 smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0); 348 349 qdev_connect_gpio_out_named(DEVICE(piix4_pm), "smi-irq", 0, smi_irq); 350 pcms->smbus = I2C_BUS(qdev_get_child_bus(DEVICE(piix4_pm), "i2c")); 351 /* TODO: Populate SPD eeprom data. */ 352 smbus_eeprom_init(pcms->smbus, 8, NULL, 0); 353 354 object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP, 355 TYPE_HOTPLUG_HANDLER, 356 (Object **)&x86ms->acpi_dev, 357 object_property_allow_set_link, 358 OBJ_PROP_LINK_STRONG); 359 object_property_set_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP, 360 piix4_pm, &error_abort); 361 } 362 363 if (machine->nvdimms_state->is_enabled) { 364 nvdimm_init_acpi_state(machine->nvdimms_state, system_io, 365 x86_nvdimm_acpi_dsmio, 366 x86ms->fw_cfg, OBJECT(pcms)); 367 } 368 } 369 370 typedef enum PCSouthBridgeOption { 371 PC_SOUTH_BRIDGE_OPTION_PIIX3, 372 PC_SOUTH_BRIDGE_OPTION_PIIX4, 373 PC_SOUTH_BRIDGE_OPTION_MAX, 374 } PCSouthBridgeOption; 375 376 static const QEnumLookup PCSouthBridgeOption_lookup = { 377 .array = (const char *const[]) { 378 [PC_SOUTH_BRIDGE_OPTION_PIIX3] = TYPE_PIIX3_DEVICE, 379 [PC_SOUTH_BRIDGE_OPTION_PIIX4] = TYPE_PIIX4_PCI_DEVICE, 380 }, 381 .size = PC_SOUTH_BRIDGE_OPTION_MAX 382 }; 383 384 static int pc_get_south_bridge(Object *obj, Error **errp) 385 { 386 PCMachineState *pcms = PC_MACHINE(obj); 387 int i; 388 389 for (i = 0; i < PCSouthBridgeOption_lookup.size; i++) { 390 if (g_strcmp0(PCSouthBridgeOption_lookup.array[i], 391 pcms->south_bridge) == 0) { 392 return i; 393 } 394 } 395 396 error_setg(errp, "Invalid south bridge value set"); 397 return 0; 398 } 399 400 static void pc_set_south_bridge(Object *obj, int value, Error **errp) 401 { 402 PCMachineState *pcms = PC_MACHINE(obj); 403 404 if (value < 0) { 405 error_setg(errp, "Value can't be negative"); 406 return; 407 } 408 409 if (value >= PCSouthBridgeOption_lookup.size) { 410 error_setg(errp, "Value too big"); 411 return; 412 } 413 414 pcms->south_bridge = PCSouthBridgeOption_lookup.array[value]; 415 } 416 417 #ifdef CONFIG_ISAPC 418 static void pc_init_isa(MachineState *machine) 419 { 420 pc_init1(machine, NULL); 421 } 422 #endif 423 424 #ifdef CONFIG_XEN 425 static void pc_xen_hvm_init_pci(MachineState *machine) 426 { 427 const char *pci_type = xen_igd_gfx_pt_enabled() ? 428 TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE : TYPE_I440FX_PCI_DEVICE; 429 430 pc_init1(machine, pci_type); 431 } 432 433 static void pc_xen_hvm_init(MachineState *machine) 434 { 435 PCMachineState *pcms = PC_MACHINE(machine); 436 437 if (!xen_enabled()) { 438 error_report("xenfv machine requires the xen accelerator"); 439 exit(1); 440 } 441 442 pc_xen_hvm_init_pci(machine); 443 xen_igd_reserve_slot(pcms->pcibus); 444 pci_create_simple(pcms->pcibus, -1, "xen-platform"); 445 } 446 #endif 447 448 static void pc_i440fx_init(MachineState *machine) 449 { 450 pc_init1(machine, TYPE_I440FX_PCI_DEVICE); 451 } 452 453 #define DEFINE_I440FX_MACHINE(major, minor) \ 454 DEFINE_PC_VER_MACHINE(pc_i440fx, "pc-i440fx", pc_i440fx_init, major, minor); 455 456 static void pc_i440fx_machine_options(MachineClass *m) 457 { 458 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 459 ObjectClass *oc = OBJECT_CLASS(m); 460 pcmc->default_south_bridge = TYPE_PIIX3_DEVICE; 461 pcmc->pci_root_uid = 0; 462 pcmc->default_cpu_version = 1; 463 464 m->family = "pc_piix"; 465 m->desc = "Standard PC (i440FX + PIIX, 1996)"; 466 m->default_machine_opts = "firmware=bios-256k.bin"; 467 m->default_display = "std"; 468 m->default_nic = "e1000"; 469 m->no_floppy = !module_object_class_by_name(TYPE_ISA_FDC); 470 m->no_parallel = !module_object_class_by_name(TYPE_ISA_PARALLEL); 471 machine_class_allow_dynamic_sysbus_dev(m, TYPE_RAMFB_DEVICE); 472 machine_class_allow_dynamic_sysbus_dev(m, TYPE_VMBUS_BRIDGE); 473 474 object_class_property_add_enum(oc, "x-south-bridge", "PCSouthBridgeOption", 475 &PCSouthBridgeOption_lookup, 476 pc_get_south_bridge, 477 pc_set_south_bridge); 478 object_class_property_set_description(oc, "x-south-bridge", 479 "Use a different south bridge than PIIX3"); 480 } 481 482 static void pc_i440fx_machine_9_1_options(MachineClass *m) 483 { 484 pc_i440fx_machine_options(m); 485 m->alias = "pc"; 486 m->is_default = true; 487 } 488 489 DEFINE_I440FX_MACHINE(9, 1); 490 491 static void pc_i440fx_machine_9_0_options(MachineClass *m) 492 { 493 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 494 495 pc_i440fx_machine_9_1_options(m); 496 m->alias = NULL; 497 m->is_default = false; 498 m->smbios_memory_device_size = 16 * GiB; 499 500 compat_props_add(m->compat_props, hw_compat_9_0, hw_compat_9_0_len); 501 compat_props_add(m->compat_props, pc_compat_9_0, pc_compat_9_0_len); 502 pcmc->isa_bios_alias = false; 503 } 504 505 DEFINE_I440FX_MACHINE(9, 0); 506 507 static void pc_i440fx_machine_8_2_options(MachineClass *m) 508 { 509 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 510 511 pc_i440fx_machine_9_0_options(m); 512 513 compat_props_add(m->compat_props, hw_compat_8_2, hw_compat_8_2_len); 514 compat_props_add(m->compat_props, pc_compat_8_2, pc_compat_8_2_len); 515 /* For pc-i44fx-8.2 and 8.1, use SMBIOS 3.X by default */ 516 pcmc->default_smbios_ep_type = SMBIOS_ENTRY_POINT_TYPE_64; 517 } 518 519 DEFINE_I440FX_MACHINE(8, 2); 520 521 static void pc_i440fx_machine_8_1_options(MachineClass *m) 522 { 523 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 524 525 pc_i440fx_machine_8_2_options(m); 526 pcmc->broken_32bit_mem_addr_check = true; 527 528 compat_props_add(m->compat_props, hw_compat_8_1, hw_compat_8_1_len); 529 compat_props_add(m->compat_props, pc_compat_8_1, pc_compat_8_1_len); 530 } 531 532 DEFINE_I440FX_MACHINE(8, 1); 533 534 static void pc_i440fx_machine_8_0_options(MachineClass *m) 535 { 536 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 537 538 pc_i440fx_machine_8_1_options(m); 539 compat_props_add(m->compat_props, hw_compat_8_0, hw_compat_8_0_len); 540 compat_props_add(m->compat_props, pc_compat_8_0, pc_compat_8_0_len); 541 542 /* For pc-i44fx-8.0 and older, use SMBIOS 2.8 by default */ 543 pcmc->default_smbios_ep_type = SMBIOS_ENTRY_POINT_TYPE_32; 544 } 545 546 DEFINE_I440FX_MACHINE(8, 0); 547 548 static void pc_i440fx_machine_7_2_options(MachineClass *m) 549 { 550 pc_i440fx_machine_8_0_options(m); 551 compat_props_add(m->compat_props, hw_compat_7_2, hw_compat_7_2_len); 552 compat_props_add(m->compat_props, pc_compat_7_2, pc_compat_7_2_len); 553 } 554 555 DEFINE_I440FX_MACHINE(7, 2) 556 557 static void pc_i440fx_machine_7_1_options(MachineClass *m) 558 { 559 pc_i440fx_machine_7_2_options(m); 560 compat_props_add(m->compat_props, hw_compat_7_1, hw_compat_7_1_len); 561 compat_props_add(m->compat_props, pc_compat_7_1, pc_compat_7_1_len); 562 } 563 564 DEFINE_I440FX_MACHINE(7, 1); 565 566 static void pc_i440fx_machine_7_0_options(MachineClass *m) 567 { 568 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 569 pc_i440fx_machine_7_1_options(m); 570 pcmc->enforce_amd_1tb_hole = false; 571 compat_props_add(m->compat_props, hw_compat_7_0, hw_compat_7_0_len); 572 compat_props_add(m->compat_props, pc_compat_7_0, pc_compat_7_0_len); 573 } 574 575 DEFINE_I440FX_MACHINE(7, 0); 576 577 static void pc_i440fx_machine_6_2_options(MachineClass *m) 578 { 579 pc_i440fx_machine_7_0_options(m); 580 compat_props_add(m->compat_props, hw_compat_6_2, hw_compat_6_2_len); 581 compat_props_add(m->compat_props, pc_compat_6_2, pc_compat_6_2_len); 582 } 583 584 DEFINE_I440FX_MACHINE(6, 2); 585 586 static void pc_i440fx_machine_6_1_options(MachineClass *m) 587 { 588 pc_i440fx_machine_6_2_options(m); 589 compat_props_add(m->compat_props, hw_compat_6_1, hw_compat_6_1_len); 590 compat_props_add(m->compat_props, pc_compat_6_1, pc_compat_6_1_len); 591 m->smp_props.prefer_sockets = true; 592 } 593 594 DEFINE_I440FX_MACHINE(6, 1); 595 596 static void pc_i440fx_machine_6_0_options(MachineClass *m) 597 { 598 pc_i440fx_machine_6_1_options(m); 599 compat_props_add(m->compat_props, hw_compat_6_0, hw_compat_6_0_len); 600 compat_props_add(m->compat_props, pc_compat_6_0, pc_compat_6_0_len); 601 } 602 603 DEFINE_I440FX_MACHINE(6, 0); 604 605 static void pc_i440fx_machine_5_2_options(MachineClass *m) 606 { 607 pc_i440fx_machine_6_0_options(m); 608 compat_props_add(m->compat_props, hw_compat_5_2, hw_compat_5_2_len); 609 compat_props_add(m->compat_props, pc_compat_5_2, pc_compat_5_2_len); 610 } 611 612 DEFINE_I440FX_MACHINE(5, 2); 613 614 static void pc_i440fx_machine_5_1_options(MachineClass *m) 615 { 616 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 617 618 pc_i440fx_machine_5_2_options(m); 619 compat_props_add(m->compat_props, hw_compat_5_1, hw_compat_5_1_len); 620 compat_props_add(m->compat_props, pc_compat_5_1, pc_compat_5_1_len); 621 pcmc->kvmclock_create_always = false; 622 pcmc->pci_root_uid = 1; 623 } 624 625 DEFINE_I440FX_MACHINE(5, 1); 626 627 static void pc_i440fx_machine_5_0_options(MachineClass *m) 628 { 629 pc_i440fx_machine_5_1_options(m); 630 m->numa_mem_supported = true; 631 compat_props_add(m->compat_props, hw_compat_5_0, hw_compat_5_0_len); 632 compat_props_add(m->compat_props, pc_compat_5_0, pc_compat_5_0_len); 633 m->auto_enable_numa_with_memdev = false; 634 } 635 636 DEFINE_I440FX_MACHINE(5, 0); 637 638 static void pc_i440fx_machine_4_2_options(MachineClass *m) 639 { 640 pc_i440fx_machine_5_0_options(m); 641 compat_props_add(m->compat_props, hw_compat_4_2, hw_compat_4_2_len); 642 compat_props_add(m->compat_props, pc_compat_4_2, pc_compat_4_2_len); 643 } 644 645 DEFINE_I440FX_MACHINE(4, 2); 646 647 static void pc_i440fx_machine_4_1_options(MachineClass *m) 648 { 649 pc_i440fx_machine_4_2_options(m); 650 compat_props_add(m->compat_props, hw_compat_4_1, hw_compat_4_1_len); 651 compat_props_add(m->compat_props, pc_compat_4_1, pc_compat_4_1_len); 652 } 653 654 DEFINE_I440FX_MACHINE(4, 1); 655 656 static void pc_i440fx_machine_4_0_options(MachineClass *m) 657 { 658 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 659 pc_i440fx_machine_4_1_options(m); 660 pcmc->default_cpu_version = CPU_VERSION_LEGACY; 661 compat_props_add(m->compat_props, hw_compat_4_0, hw_compat_4_0_len); 662 compat_props_add(m->compat_props, pc_compat_4_0, pc_compat_4_0_len); 663 } 664 665 DEFINE_I440FX_MACHINE(4, 0); 666 667 static void pc_i440fx_machine_3_1_options(MachineClass *m) 668 { 669 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 670 671 pc_i440fx_machine_4_0_options(m); 672 m->smbus_no_migration_support = true; 673 pcmc->pvh_enabled = false; 674 compat_props_add(m->compat_props, hw_compat_3_1, hw_compat_3_1_len); 675 compat_props_add(m->compat_props, pc_compat_3_1, pc_compat_3_1_len); 676 } 677 678 DEFINE_I440FX_MACHINE(3, 1); 679 680 static void pc_i440fx_machine_3_0_options(MachineClass *m) 681 { 682 pc_i440fx_machine_3_1_options(m); 683 compat_props_add(m->compat_props, hw_compat_3_0, hw_compat_3_0_len); 684 compat_props_add(m->compat_props, pc_compat_3_0, pc_compat_3_0_len); 685 } 686 687 DEFINE_I440FX_MACHINE(3, 0); 688 689 static void pc_i440fx_machine_2_12_options(MachineClass *m) 690 { 691 pc_i440fx_machine_3_0_options(m); 692 compat_props_add(m->compat_props, hw_compat_2_12, hw_compat_2_12_len); 693 compat_props_add(m->compat_props, pc_compat_2_12, pc_compat_2_12_len); 694 } 695 696 DEFINE_I440FX_MACHINE(2, 12); 697 698 static void pc_i440fx_machine_2_11_options(MachineClass *m) 699 { 700 pc_i440fx_machine_2_12_options(m); 701 compat_props_add(m->compat_props, hw_compat_2_11, hw_compat_2_11_len); 702 compat_props_add(m->compat_props, pc_compat_2_11, pc_compat_2_11_len); 703 } 704 705 DEFINE_I440FX_MACHINE(2, 11); 706 707 static void pc_i440fx_machine_2_10_options(MachineClass *m) 708 { 709 pc_i440fx_machine_2_11_options(m); 710 compat_props_add(m->compat_props, hw_compat_2_10, hw_compat_2_10_len); 711 compat_props_add(m->compat_props, pc_compat_2_10, pc_compat_2_10_len); 712 m->auto_enable_numa_with_memhp = false; 713 } 714 715 DEFINE_I440FX_MACHINE(2, 10); 716 717 static void pc_i440fx_machine_2_9_options(MachineClass *m) 718 { 719 pc_i440fx_machine_2_10_options(m); 720 compat_props_add(m->compat_props, hw_compat_2_9, hw_compat_2_9_len); 721 compat_props_add(m->compat_props, pc_compat_2_9, pc_compat_2_9_len); 722 } 723 724 DEFINE_I440FX_MACHINE(2, 9); 725 726 static void pc_i440fx_machine_2_8_options(MachineClass *m) 727 { 728 pc_i440fx_machine_2_9_options(m); 729 compat_props_add(m->compat_props, hw_compat_2_8, hw_compat_2_8_len); 730 compat_props_add(m->compat_props, pc_compat_2_8, pc_compat_2_8_len); 731 } 732 733 DEFINE_I440FX_MACHINE(2, 8); 734 735 static void pc_i440fx_machine_2_7_options(MachineClass *m) 736 { 737 pc_i440fx_machine_2_8_options(m); 738 compat_props_add(m->compat_props, hw_compat_2_7, hw_compat_2_7_len); 739 compat_props_add(m->compat_props, pc_compat_2_7, pc_compat_2_7_len); 740 } 741 742 DEFINE_I440FX_MACHINE(2, 7); 743 744 static void pc_i440fx_machine_2_6_options(MachineClass *m) 745 { 746 X86MachineClass *x86mc = X86_MACHINE_CLASS(m); 747 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 748 749 pc_i440fx_machine_2_7_options(m); 750 pcmc->legacy_cpu_hotplug = true; 751 x86mc->fwcfg_dma_enabled = false; 752 compat_props_add(m->compat_props, hw_compat_2_6, hw_compat_2_6_len); 753 compat_props_add(m->compat_props, pc_compat_2_6, pc_compat_2_6_len); 754 } 755 756 DEFINE_I440FX_MACHINE(2, 6); 757 758 static void pc_i440fx_machine_2_5_options(MachineClass *m) 759 { 760 X86MachineClass *x86mc = X86_MACHINE_CLASS(m); 761 762 pc_i440fx_machine_2_6_options(m); 763 x86mc->save_tsc_khz = false; 764 m->legacy_fw_cfg_order = 1; 765 compat_props_add(m->compat_props, hw_compat_2_5, hw_compat_2_5_len); 766 compat_props_add(m->compat_props, pc_compat_2_5, pc_compat_2_5_len); 767 } 768 769 DEFINE_I440FX_MACHINE(2, 5); 770 771 static void pc_i440fx_machine_2_4_options(MachineClass *m) 772 { 773 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 774 775 pc_i440fx_machine_2_5_options(m); 776 m->hw_version = "2.4.0"; 777 pcmc->broken_reserved_end = true; 778 compat_props_add(m->compat_props, hw_compat_2_4, hw_compat_2_4_len); 779 compat_props_add(m->compat_props, pc_compat_2_4, pc_compat_2_4_len); 780 } 781 782 DEFINE_I440FX_MACHINE(2, 4); 783 784 #ifdef CONFIG_ISAPC 785 static void isapc_machine_options(MachineClass *m) 786 { 787 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 788 m->desc = "ISA-only PC"; 789 m->max_cpus = 1; 790 m->option_rom_has_mr = true; 791 m->rom_file_has_mr = false; 792 pcmc->pci_enabled = false; 793 pcmc->has_acpi_build = false; 794 pcmc->smbios_defaults = false; 795 pcmc->gigabyte_align = false; 796 pcmc->smbios_legacy_mode = true; 797 pcmc->has_reserved_memory = false; 798 m->default_nic = "ne2k_isa"; 799 m->default_cpu_type = X86_CPU_TYPE_NAME("486"); 800 m->no_floppy = !module_object_class_by_name(TYPE_ISA_FDC); 801 m->no_parallel = !module_object_class_by_name(TYPE_ISA_PARALLEL); 802 } 803 804 DEFINE_PC_MACHINE(isapc, "isapc", pc_init_isa, 805 isapc_machine_options); 806 #endif 807 808 #ifdef CONFIG_XEN 809 static void xenfv_machine_4_2_options(MachineClass *m) 810 { 811 pc_i440fx_machine_4_2_options(m); 812 m->desc = "Xen Fully-virtualized PC"; 813 m->max_cpus = HVM_MAX_VCPUS; 814 m->default_machine_opts = "accel=xen,suppress-vmdesc=on"; 815 } 816 817 DEFINE_PC_MACHINE(xenfv_4_2, "xenfv-4.2", pc_xen_hvm_init, 818 xenfv_machine_4_2_options); 819 820 static void xenfv_machine_3_1_options(MachineClass *m) 821 { 822 pc_i440fx_machine_3_1_options(m); 823 m->desc = "Xen Fully-virtualized PC"; 824 m->alias = "xenfv"; 825 m->max_cpus = HVM_MAX_VCPUS; 826 m->default_machine_opts = "accel=xen,suppress-vmdesc=on"; 827 } 828 829 DEFINE_PC_MACHINE(xenfv, "xenfv-3.1", pc_xen_hvm_init, 830 xenfv_machine_3_1_options); 831 #endif 832