1 /* 2 * QEMU PC System Emulator 3 * 4 * Copyright (c) 2003-2004 Fabrice Bellard 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 #include "qemu/osdep.h" 26 #include "config-devices.h" 27 28 #include "qemu/units.h" 29 #include "hw/loader.h" 30 #include "hw/i386/x86.h" 31 #include "hw/i386/pc.h" 32 #include "hw/i386/apic.h" 33 #include "hw/pci-host/i440fx.h" 34 #include "hw/southbridge/piix.h" 35 #include "hw/display/ramfb.h" 36 #include "hw/firmware/smbios.h" 37 #include "hw/pci/pci.h" 38 #include "hw/pci/pci_ids.h" 39 #include "hw/usb.h" 40 #include "net/net.h" 41 #include "hw/ide/pci.h" 42 #include "hw/irq.h" 43 #include "sysemu/kvm.h" 44 #include "hw/kvm/clock.h" 45 #include "sysemu/sysemu.h" 46 #include "hw/sysbus.h" 47 #include "sysemu/arch_init.h" 48 #include "hw/i2c/smbus_eeprom.h" 49 #include "hw/xen/xen.h" 50 #include "exec/memory.h" 51 #include "exec/address-spaces.h" 52 #include "hw/acpi/acpi.h" 53 #include "cpu.h" 54 #include "qapi/error.h" 55 #include "qemu/error-report.h" 56 #include "sysemu/xen.h" 57 #ifdef CONFIG_XEN 58 #include <xen/hvm/hvm_info_table.h> 59 #include "hw/xen/xen_pt.h" 60 #endif 61 #include "migration/global_state.h" 62 #include "migration/misc.h" 63 #include "sysemu/numa.h" 64 #include "hw/hyperv/vmbus-bridge.h" 65 #include "hw/mem/nvdimm.h" 66 #include "hw/i386/acpi-build.h" 67 68 #define MAX_IDE_BUS 2 69 70 #ifdef CONFIG_IDE_ISA 71 static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 }; 72 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 }; 73 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 }; 74 #endif 75 76 /* PC hardware initialisation */ 77 static void pc_init1(MachineState *machine, 78 const char *host_type, const char *pci_type) 79 { 80 PCMachineState *pcms = PC_MACHINE(machine); 81 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); 82 X86MachineState *x86ms = X86_MACHINE(machine); 83 MemoryRegion *system_memory = get_system_memory(); 84 MemoryRegion *system_io = get_system_io(); 85 PCIBus *pci_bus; 86 ISABus *isa_bus; 87 PCII440FXState *i440fx_state; 88 int piix3_devfn = -1; 89 qemu_irq smi_irq; 90 GSIState *gsi_state; 91 BusState *idebus[MAX_IDE_BUS]; 92 ISADevice *rtc_state; 93 MemoryRegion *ram_memory; 94 MemoryRegion *pci_memory; 95 MemoryRegion *rom_memory; 96 ram_addr_t lowmem; 97 98 /* 99 * Calculate ram split, for memory below and above 4G. It's a bit 100 * complicated for backward compatibility reasons ... 101 * 102 * - Traditional split is 3.5G (lowmem = 0xe0000000). This is the 103 * default value for max_ram_below_4g now. 104 * 105 * - Then, to gigabyte align the memory, we move the split to 3G 106 * (lowmem = 0xc0000000). But only in case we have to split in 107 * the first place, i.e. ram_size is larger than (traditional) 108 * lowmem. And for new machine types (gigabyte_align = true) 109 * only, for live migration compatibility reasons. 110 * 111 * - Next the max-ram-below-4g option was added, which allowed to 112 * reduce lowmem to a smaller value, to allow a larger PCI I/O 113 * window below 4G. qemu doesn't enforce gigabyte alignment here, 114 * but prints a warning. 115 * 116 * - Finally max-ram-below-4g got updated to also allow raising lowmem, 117 * so legacy non-PAE guests can get as much memory as possible in 118 * the 32bit address space below 4G. 119 * 120 * - Note that Xen has its own ram setp code in xen_ram_init(), 121 * called via xen_hvm_init(). 122 * 123 * Examples: 124 * qemu -M pc-1.7 -m 4G (old default) -> 3584M low, 512M high 125 * qemu -M pc -m 4G (new default) -> 3072M low, 1024M high 126 * qemu -M pc,max-ram-below-4g=2G -m 4G -> 2048M low, 2048M high 127 * qemu -M pc,max-ram-below-4g=4G -m 3968M -> 3968M low (=4G-128M) 128 */ 129 if (xen_enabled()) { 130 xen_hvm_init(pcms, &ram_memory); 131 } else { 132 if (!pcms->max_ram_below_4g) { 133 pcms->max_ram_below_4g = 0xe0000000; /* default: 3.5G */ 134 } 135 lowmem = pcms->max_ram_below_4g; 136 if (machine->ram_size >= pcms->max_ram_below_4g) { 137 if (pcmc->gigabyte_align) { 138 if (lowmem > 0xc0000000) { 139 lowmem = 0xc0000000; 140 } 141 if (lowmem & (1 * GiB - 1)) { 142 warn_report("Large machine and max_ram_below_4g " 143 "(%" PRIu64 ") not a multiple of 1G; " 144 "possible bad performance.", 145 pcms->max_ram_below_4g); 146 } 147 } 148 } 149 150 if (machine->ram_size >= lowmem) { 151 x86ms->above_4g_mem_size = machine->ram_size - lowmem; 152 x86ms->below_4g_mem_size = lowmem; 153 } else { 154 x86ms->above_4g_mem_size = 0; 155 x86ms->below_4g_mem_size = machine->ram_size; 156 } 157 } 158 159 x86_cpus_init(x86ms, pcmc->default_cpu_version); 160 161 if (kvm_enabled() && pcmc->kvmclock_enabled) { 162 kvmclock_create(); 163 } 164 165 if (pcmc->pci_enabled) { 166 pci_memory = g_new(MemoryRegion, 1); 167 memory_region_init(pci_memory, NULL, "pci", UINT64_MAX); 168 rom_memory = pci_memory; 169 } else { 170 pci_memory = NULL; 171 rom_memory = system_memory; 172 } 173 174 pc_guest_info_init(pcms); 175 176 if (pcmc->smbios_defaults) { 177 MachineClass *mc = MACHINE_GET_CLASS(machine); 178 /* These values are guest ABI, do not change */ 179 smbios_set_defaults("QEMU", "Standard PC (i440FX + PIIX, 1996)", 180 mc->name, pcmc->smbios_legacy_mode, 181 pcmc->smbios_uuid_encoded, 182 SMBIOS_ENTRY_POINT_21); 183 } 184 185 /* allocate ram and load rom/bios */ 186 if (!xen_enabled()) { 187 pc_memory_init(pcms, system_memory, 188 rom_memory, &ram_memory); 189 } else if (machine->kernel_filename != NULL) { 190 /* For xen HVM direct kernel boot, load linux here */ 191 xen_load_linux(pcms); 192 } 193 194 gsi_state = pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled); 195 196 if (pcmc->pci_enabled) { 197 PIIX3State *piix3; 198 199 pci_bus = i440fx_init(host_type, 200 pci_type, 201 &i440fx_state, 202 system_memory, system_io, machine->ram_size, 203 x86ms->below_4g_mem_size, 204 x86ms->above_4g_mem_size, 205 pci_memory, ram_memory); 206 pcms->bus = pci_bus; 207 208 piix3 = piix3_create(pci_bus, &isa_bus); 209 piix3->pic = x86ms->gsi; 210 piix3_devfn = piix3->dev.devfn; 211 } else { 212 pci_bus = NULL; 213 i440fx_state = NULL; 214 isa_bus = isa_bus_new(NULL, get_system_memory(), system_io, 215 &error_abort); 216 no_hpet = 1; 217 } 218 isa_bus_irqs(isa_bus, x86ms->gsi); 219 220 pc_i8259_create(isa_bus, gsi_state->i8259_irq); 221 222 if (pcmc->pci_enabled) { 223 ioapic_init_gsi(gsi_state, "i440fx"); 224 } 225 226 if (tcg_enabled()) { 227 x86_register_ferr_irq(x86ms->gsi[13]); 228 } 229 230 pc_vga_init(isa_bus, pcmc->pci_enabled ? pci_bus : NULL); 231 232 assert(pcms->vmport != ON_OFF_AUTO__MAX); 233 if (pcms->vmport == ON_OFF_AUTO_AUTO) { 234 pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON; 235 } 236 237 /* init basic PC hardware */ 238 pc_basic_device_init(isa_bus, x86ms->gsi, &rtc_state, true, 239 (pcms->vmport != ON_OFF_AUTO_ON), pcms->pit_enabled, 240 0x4); 241 242 pc_nic_init(pcmc, isa_bus, pci_bus); 243 244 if (pcmc->pci_enabled) { 245 PCIDevice *dev; 246 247 dev = pci_create_simple(pci_bus, piix3_devfn + 1, 248 xen_enabled() ? "piix3-ide-xen" : "piix3-ide"); 249 pci_ide_create_devs(dev); 250 idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0"); 251 idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1"); 252 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state); 253 } 254 #ifdef CONFIG_IDE_ISA 255 else { 256 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; 257 int i; 258 259 ide_drive_get(hd, ARRAY_SIZE(hd)); 260 for (i = 0; i < MAX_IDE_BUS; i++) { 261 ISADevice *dev; 262 char busname[] = "ide.0"; 263 dev = isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i], 264 ide_irq[i], 265 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]); 266 /* 267 * The ide bus name is ide.0 for the first bus and ide.1 for the 268 * second one. 269 */ 270 busname[4] = '0' + i; 271 idebus[i] = qdev_get_child_bus(DEVICE(dev), busname); 272 } 273 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state); 274 } 275 #endif 276 277 if (pcmc->pci_enabled && machine_usb(machine)) { 278 pci_create_simple(pci_bus, piix3_devfn + 2, "piix3-usb-uhci"); 279 } 280 281 if (pcmc->pci_enabled && x86_machine_is_acpi_enabled(X86_MACHINE(pcms))) { 282 DeviceState *piix4_pm; 283 284 smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0); 285 /* TODO: Populate SPD eeprom data. */ 286 pcms->smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, 287 x86ms->gsi[9], smi_irq, 288 x86_machine_is_smm_enabled(x86ms), 289 &piix4_pm); 290 smbus_eeprom_init(pcms->smbus, 8, NULL, 0); 291 292 object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP, 293 TYPE_HOTPLUG_HANDLER, 294 (Object **)&pcms->acpi_dev, 295 object_property_allow_set_link, 296 OBJ_PROP_LINK_STRONG); 297 object_property_set_link(OBJECT(machine), OBJECT(piix4_pm), 298 PC_MACHINE_ACPI_DEVICE_PROP, &error_abort); 299 } 300 301 if (machine->nvdimms_state->is_enabled) { 302 nvdimm_init_acpi_state(machine->nvdimms_state, system_io, 303 x86_nvdimm_acpi_dsmio, 304 x86ms->fw_cfg, OBJECT(pcms)); 305 } 306 } 307 308 /* Looking for a pc_compat_2_4() function? It doesn't exist. 309 * pc_compat_*() functions that run on machine-init time and 310 * change global QEMU state are deprecated. Please don't create 311 * one, and implement any pc-*-2.4 (and newer) compat code in 312 * hw_compat_*, pc_compat_*, or * pc_*_machine_options(). 313 */ 314 315 static void pc_compat_2_3_fn(MachineState *machine) 316 { 317 X86MachineState *x86ms = X86_MACHINE(machine); 318 if (kvm_enabled()) { 319 x86ms->smm = ON_OFF_AUTO_OFF; 320 } 321 } 322 323 static void pc_compat_2_2_fn(MachineState *machine) 324 { 325 pc_compat_2_3_fn(machine); 326 } 327 328 static void pc_compat_2_1_fn(MachineState *machine) 329 { 330 pc_compat_2_2_fn(machine); 331 x86_cpu_change_kvm_default("svm", NULL); 332 } 333 334 static void pc_compat_2_0_fn(MachineState *machine) 335 { 336 pc_compat_2_1_fn(machine); 337 } 338 339 static void pc_compat_1_7_fn(MachineState *machine) 340 { 341 pc_compat_2_0_fn(machine); 342 x86_cpu_change_kvm_default("x2apic", NULL); 343 } 344 345 static void pc_compat_1_6_fn(MachineState *machine) 346 { 347 pc_compat_1_7_fn(machine); 348 } 349 350 static void pc_compat_1_5_fn(MachineState *machine) 351 { 352 pc_compat_1_6_fn(machine); 353 } 354 355 static void pc_compat_1_4_fn(MachineState *machine) 356 { 357 pc_compat_1_5_fn(machine); 358 } 359 360 static void pc_compat_1_3(MachineState *machine) 361 { 362 pc_compat_1_4_fn(machine); 363 } 364 365 /* PC compat function for pc-1.0 to pc-1.2 */ 366 static void pc_compat_1_2(MachineState *machine) 367 { 368 pc_compat_1_3(machine); 369 x86_cpu_change_kvm_default("kvm-pv-eoi", NULL); 370 } 371 372 static void pc_init_isa(MachineState *machine) 373 { 374 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, TYPE_I440FX_PCI_DEVICE); 375 } 376 377 #ifdef CONFIG_XEN 378 static void pc_xen_hvm_init_pci(MachineState *machine) 379 { 380 const char *pci_type = xen_igd_gfx_pt_enabled() ? 381 TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE : TYPE_I440FX_PCI_DEVICE; 382 383 pc_init1(machine, 384 TYPE_I440FX_PCI_HOST_BRIDGE, 385 pci_type); 386 } 387 388 static void pc_xen_hvm_init(MachineState *machine) 389 { 390 PCMachineState *pcms = PC_MACHINE(machine); 391 392 if (!xen_enabled()) { 393 error_report("xenfv machine requires the xen accelerator"); 394 exit(1); 395 } 396 397 pc_xen_hvm_init_pci(machine); 398 pci_create_simple(pcms->bus, -1, "xen-platform"); 399 } 400 #endif 401 402 #define DEFINE_I440FX_MACHINE(suffix, name, compatfn, optionfn) \ 403 static void pc_init_##suffix(MachineState *machine) \ 404 { \ 405 void (*compat)(MachineState *m) = (compatfn); \ 406 if (compat) { \ 407 compat(machine); \ 408 } \ 409 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, \ 410 TYPE_I440FX_PCI_DEVICE); \ 411 } \ 412 DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn) 413 414 static void pc_i440fx_machine_options(MachineClass *m) 415 { 416 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 417 pcmc->default_nic_model = "e1000"; 418 419 m->family = "pc_piix"; 420 m->desc = "Standard PC (i440FX + PIIX, 1996)"; 421 m->default_machine_opts = "firmware=bios-256k.bin"; 422 m->default_display = "std"; 423 machine_class_allow_dynamic_sysbus_dev(m, TYPE_RAMFB_DEVICE); 424 machine_class_allow_dynamic_sysbus_dev(m, TYPE_VMBUS_BRIDGE); 425 } 426 427 static void pc_i440fx_5_1_machine_options(MachineClass *m) 428 { 429 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 430 pc_i440fx_machine_options(m); 431 m->alias = "pc"; 432 m->is_default = true; 433 pcmc->default_cpu_version = 1; 434 } 435 436 DEFINE_I440FX_MACHINE(v5_1, "pc-i440fx-5.1", NULL, 437 pc_i440fx_5_1_machine_options); 438 439 static void pc_i440fx_5_0_machine_options(MachineClass *m) 440 { 441 pc_i440fx_5_1_machine_options(m); 442 m->alias = NULL; 443 m->is_default = false; 444 compat_props_add(m->compat_props, hw_compat_5_0, hw_compat_5_0_len); 445 compat_props_add(m->compat_props, pc_compat_5_0, pc_compat_5_0_len); 446 } 447 448 DEFINE_I440FX_MACHINE(v5_0, "pc-i440fx-5.0", NULL, 449 pc_i440fx_5_0_machine_options); 450 451 static void pc_i440fx_4_2_machine_options(MachineClass *m) 452 { 453 pc_i440fx_5_0_machine_options(m); 454 m->alias = NULL; 455 m->is_default = false; 456 compat_props_add(m->compat_props, hw_compat_4_2, hw_compat_4_2_len); 457 compat_props_add(m->compat_props, pc_compat_4_2, pc_compat_4_2_len); 458 } 459 460 DEFINE_I440FX_MACHINE(v4_2, "pc-i440fx-4.2", NULL, 461 pc_i440fx_4_2_machine_options); 462 463 static void pc_i440fx_4_1_machine_options(MachineClass *m) 464 { 465 pc_i440fx_4_2_machine_options(m); 466 m->alias = NULL; 467 m->is_default = false; 468 compat_props_add(m->compat_props, hw_compat_4_1, hw_compat_4_1_len); 469 compat_props_add(m->compat_props, pc_compat_4_1, pc_compat_4_1_len); 470 } 471 472 DEFINE_I440FX_MACHINE(v4_1, "pc-i440fx-4.1", NULL, 473 pc_i440fx_4_1_machine_options); 474 475 static void pc_i440fx_4_0_machine_options(MachineClass *m) 476 { 477 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 478 pc_i440fx_4_1_machine_options(m); 479 m->alias = NULL; 480 m->is_default = false; 481 pcmc->default_cpu_version = CPU_VERSION_LEGACY; 482 compat_props_add(m->compat_props, hw_compat_4_0, hw_compat_4_0_len); 483 compat_props_add(m->compat_props, pc_compat_4_0, pc_compat_4_0_len); 484 } 485 486 DEFINE_I440FX_MACHINE(v4_0, "pc-i440fx-4.0", NULL, 487 pc_i440fx_4_0_machine_options); 488 489 static void pc_i440fx_3_1_machine_options(MachineClass *m) 490 { 491 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 492 493 pc_i440fx_4_0_machine_options(m); 494 m->is_default = false; 495 pcmc->do_not_add_smb_acpi = true; 496 m->smbus_no_migration_support = true; 497 m->alias = NULL; 498 pcmc->pvh_enabled = false; 499 compat_props_add(m->compat_props, hw_compat_3_1, hw_compat_3_1_len); 500 compat_props_add(m->compat_props, pc_compat_3_1, pc_compat_3_1_len); 501 } 502 503 DEFINE_I440FX_MACHINE(v3_1, "pc-i440fx-3.1", NULL, 504 pc_i440fx_3_1_machine_options); 505 506 static void pc_i440fx_3_0_machine_options(MachineClass *m) 507 { 508 pc_i440fx_3_1_machine_options(m); 509 compat_props_add(m->compat_props, hw_compat_3_0, hw_compat_3_0_len); 510 compat_props_add(m->compat_props, pc_compat_3_0, pc_compat_3_0_len); 511 } 512 513 DEFINE_I440FX_MACHINE(v3_0, "pc-i440fx-3.0", NULL, 514 pc_i440fx_3_0_machine_options); 515 516 static void pc_i440fx_2_12_machine_options(MachineClass *m) 517 { 518 pc_i440fx_3_0_machine_options(m); 519 compat_props_add(m->compat_props, hw_compat_2_12, hw_compat_2_12_len); 520 compat_props_add(m->compat_props, pc_compat_2_12, pc_compat_2_12_len); 521 } 522 523 DEFINE_I440FX_MACHINE(v2_12, "pc-i440fx-2.12", NULL, 524 pc_i440fx_2_12_machine_options); 525 526 static void pc_i440fx_2_11_machine_options(MachineClass *m) 527 { 528 pc_i440fx_2_12_machine_options(m); 529 compat_props_add(m->compat_props, hw_compat_2_11, hw_compat_2_11_len); 530 compat_props_add(m->compat_props, pc_compat_2_11, pc_compat_2_11_len); 531 } 532 533 DEFINE_I440FX_MACHINE(v2_11, "pc-i440fx-2.11", NULL, 534 pc_i440fx_2_11_machine_options); 535 536 static void pc_i440fx_2_10_machine_options(MachineClass *m) 537 { 538 pc_i440fx_2_11_machine_options(m); 539 compat_props_add(m->compat_props, hw_compat_2_10, hw_compat_2_10_len); 540 compat_props_add(m->compat_props, pc_compat_2_10, pc_compat_2_10_len); 541 m->auto_enable_numa_with_memhp = false; 542 } 543 544 DEFINE_I440FX_MACHINE(v2_10, "pc-i440fx-2.10", NULL, 545 pc_i440fx_2_10_machine_options); 546 547 static void pc_i440fx_2_9_machine_options(MachineClass *m) 548 { 549 pc_i440fx_2_10_machine_options(m); 550 compat_props_add(m->compat_props, hw_compat_2_9, hw_compat_2_9_len); 551 compat_props_add(m->compat_props, pc_compat_2_9, pc_compat_2_9_len); 552 m->numa_auto_assign_ram = numa_legacy_auto_assign_ram; 553 } 554 555 DEFINE_I440FX_MACHINE(v2_9, "pc-i440fx-2.9", NULL, 556 pc_i440fx_2_9_machine_options); 557 558 static void pc_i440fx_2_8_machine_options(MachineClass *m) 559 { 560 pc_i440fx_2_9_machine_options(m); 561 compat_props_add(m->compat_props, hw_compat_2_8, hw_compat_2_8_len); 562 compat_props_add(m->compat_props, pc_compat_2_8, pc_compat_2_8_len); 563 } 564 565 DEFINE_I440FX_MACHINE(v2_8, "pc-i440fx-2.8", NULL, 566 pc_i440fx_2_8_machine_options); 567 568 static void pc_i440fx_2_7_machine_options(MachineClass *m) 569 { 570 pc_i440fx_2_8_machine_options(m); 571 compat_props_add(m->compat_props, hw_compat_2_7, hw_compat_2_7_len); 572 compat_props_add(m->compat_props, pc_compat_2_7, pc_compat_2_7_len); 573 } 574 575 DEFINE_I440FX_MACHINE(v2_7, "pc-i440fx-2.7", NULL, 576 pc_i440fx_2_7_machine_options); 577 578 static void pc_i440fx_2_6_machine_options(MachineClass *m) 579 { 580 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 581 582 pc_i440fx_2_7_machine_options(m); 583 pcmc->legacy_cpu_hotplug = true; 584 pcmc->linuxboot_dma_enabled = false; 585 compat_props_add(m->compat_props, hw_compat_2_6, hw_compat_2_6_len); 586 compat_props_add(m->compat_props, pc_compat_2_6, pc_compat_2_6_len); 587 } 588 589 DEFINE_I440FX_MACHINE(v2_6, "pc-i440fx-2.6", NULL, 590 pc_i440fx_2_6_machine_options); 591 592 static void pc_i440fx_2_5_machine_options(MachineClass *m) 593 { 594 X86MachineClass *x86mc = X86_MACHINE_CLASS(m); 595 596 pc_i440fx_2_6_machine_options(m); 597 x86mc->save_tsc_khz = false; 598 m->legacy_fw_cfg_order = 1; 599 compat_props_add(m->compat_props, hw_compat_2_5, hw_compat_2_5_len); 600 compat_props_add(m->compat_props, pc_compat_2_5, pc_compat_2_5_len); 601 } 602 603 DEFINE_I440FX_MACHINE(v2_5, "pc-i440fx-2.5", NULL, 604 pc_i440fx_2_5_machine_options); 605 606 static void pc_i440fx_2_4_machine_options(MachineClass *m) 607 { 608 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 609 610 pc_i440fx_2_5_machine_options(m); 611 m->hw_version = "2.4.0"; 612 pcmc->broken_reserved_end = true; 613 compat_props_add(m->compat_props, hw_compat_2_4, hw_compat_2_4_len); 614 compat_props_add(m->compat_props, pc_compat_2_4, pc_compat_2_4_len); 615 } 616 617 DEFINE_I440FX_MACHINE(v2_4, "pc-i440fx-2.4", NULL, 618 pc_i440fx_2_4_machine_options) 619 620 static void pc_i440fx_2_3_machine_options(MachineClass *m) 621 { 622 pc_i440fx_2_4_machine_options(m); 623 m->hw_version = "2.3.0"; 624 compat_props_add(m->compat_props, hw_compat_2_3, hw_compat_2_3_len); 625 compat_props_add(m->compat_props, pc_compat_2_3, pc_compat_2_3_len); 626 } 627 628 DEFINE_I440FX_MACHINE(v2_3, "pc-i440fx-2.3", pc_compat_2_3_fn, 629 pc_i440fx_2_3_machine_options); 630 631 static void pc_i440fx_2_2_machine_options(MachineClass *m) 632 { 633 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 634 635 pc_i440fx_2_3_machine_options(m); 636 m->hw_version = "2.2.0"; 637 m->default_machine_opts = "firmware=bios-256k.bin,suppress-vmdesc=on"; 638 compat_props_add(m->compat_props, hw_compat_2_2, hw_compat_2_2_len); 639 compat_props_add(m->compat_props, pc_compat_2_2, pc_compat_2_2_len); 640 pcmc->rsdp_in_ram = false; 641 } 642 643 DEFINE_I440FX_MACHINE(v2_2, "pc-i440fx-2.2", pc_compat_2_2_fn, 644 pc_i440fx_2_2_machine_options); 645 646 static void pc_i440fx_2_1_machine_options(MachineClass *m) 647 { 648 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 649 650 pc_i440fx_2_2_machine_options(m); 651 m->hw_version = "2.1.0"; 652 m->default_display = NULL; 653 compat_props_add(m->compat_props, hw_compat_2_1, hw_compat_2_1_len); 654 compat_props_add(m->compat_props, pc_compat_2_1, pc_compat_2_1_len); 655 pcmc->smbios_uuid_encoded = false; 656 pcmc->enforce_aligned_dimm = false; 657 } 658 659 DEFINE_I440FX_MACHINE(v2_1, "pc-i440fx-2.1", pc_compat_2_1_fn, 660 pc_i440fx_2_1_machine_options); 661 662 static void pc_i440fx_2_0_machine_options(MachineClass *m) 663 { 664 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 665 666 pc_i440fx_2_1_machine_options(m); 667 m->hw_version = "2.0.0"; 668 compat_props_add(m->compat_props, pc_compat_2_0, pc_compat_2_0_len); 669 pcmc->smbios_legacy_mode = true; 670 pcmc->has_reserved_memory = false; 671 /* This value depends on the actual DSDT and SSDT compiled into 672 * the source QEMU; unfortunately it depends on the binary and 673 * not on the machine type, so we cannot make pc-i440fx-1.7 work on 674 * both QEMU 1.7 and QEMU 2.0. 675 * 676 * Large variations cause migration to fail for more than one 677 * consecutive value of the "-smp" maxcpus option. 678 * 679 * For small variations of the kind caused by different iasl versions, 680 * the 4k rounding usually leaves slack. However, there could be still 681 * one or two values that break. For QEMU 1.7 and QEMU 2.0 the 682 * slack is only ~10 bytes before one "-smp maxcpus" value breaks! 683 * 684 * 6652 is valid for QEMU 2.0, the right value for pc-i440fx-1.7 on 685 * QEMU 1.7 it is 6414. For RHEL/CentOS 7.0 it is 6418. 686 */ 687 pcmc->legacy_acpi_table_size = 6652; 688 pcmc->acpi_data_size = 0x10000; 689 } 690 691 DEFINE_I440FX_MACHINE(v2_0, "pc-i440fx-2.0", pc_compat_2_0_fn, 692 pc_i440fx_2_0_machine_options); 693 694 static void pc_i440fx_1_7_machine_options(MachineClass *m) 695 { 696 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 697 698 pc_i440fx_2_0_machine_options(m); 699 m->hw_version = "1.7.0"; 700 m->default_machine_opts = NULL; 701 m->option_rom_has_mr = true; 702 compat_props_add(m->compat_props, pc_compat_1_7, pc_compat_1_7_len); 703 pcmc->smbios_defaults = false; 704 pcmc->gigabyte_align = false; 705 pcmc->legacy_acpi_table_size = 6414; 706 } 707 708 DEFINE_I440FX_MACHINE(v1_7, "pc-i440fx-1.7", pc_compat_1_7_fn, 709 pc_i440fx_1_7_machine_options); 710 711 static void pc_i440fx_1_6_machine_options(MachineClass *m) 712 { 713 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 714 715 pc_i440fx_1_7_machine_options(m); 716 m->hw_version = "1.6.0"; 717 m->rom_file_has_mr = false; 718 compat_props_add(m->compat_props, pc_compat_1_6, pc_compat_1_6_len); 719 pcmc->has_acpi_build = false; 720 } 721 722 DEFINE_I440FX_MACHINE(v1_6, "pc-i440fx-1.6", pc_compat_1_6_fn, 723 pc_i440fx_1_6_machine_options); 724 725 static void pc_i440fx_1_5_machine_options(MachineClass *m) 726 { 727 pc_i440fx_1_6_machine_options(m); 728 m->hw_version = "1.5.0"; 729 compat_props_add(m->compat_props, pc_compat_1_5, pc_compat_1_5_len); 730 } 731 732 DEFINE_I440FX_MACHINE(v1_5, "pc-i440fx-1.5", pc_compat_1_5_fn, 733 pc_i440fx_1_5_machine_options); 734 735 static void pc_i440fx_1_4_machine_options(MachineClass *m) 736 { 737 pc_i440fx_1_5_machine_options(m); 738 m->hw_version = "1.4.0"; 739 m->hot_add_cpu = NULL; 740 compat_props_add(m->compat_props, pc_compat_1_4, pc_compat_1_4_len); 741 } 742 743 DEFINE_I440FX_MACHINE(v1_4, "pc-i440fx-1.4", pc_compat_1_4_fn, 744 pc_i440fx_1_4_machine_options); 745 746 static void pc_i440fx_1_3_machine_options(MachineClass *m) 747 { 748 X86MachineClass *x86mc = X86_MACHINE_CLASS(m); 749 static GlobalProperty compat[] = { 750 PC_CPU_MODEL_IDS("1.3.0") 751 { "usb-tablet", "usb_version", "1" }, 752 { "virtio-net-pci", "ctrl_mac_addr", "off" }, 753 { "virtio-net-pci", "mq", "off" }, 754 { "e1000", "autonegotiation", "off" }, 755 }; 756 757 pc_i440fx_1_4_machine_options(m); 758 m->hw_version = "1.3.0"; 759 m->deprecation_reason = "use a newer machine type instead"; 760 x86mc->compat_apic_id_mode = true; 761 compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat)); 762 } 763 764 DEFINE_I440FX_MACHINE(v1_3, "pc-1.3", pc_compat_1_3, 765 pc_i440fx_1_3_machine_options); 766 767 768 static void pc_i440fx_1_2_machine_options(MachineClass *m) 769 { 770 static GlobalProperty compat[] = { 771 PC_CPU_MODEL_IDS("1.2.0") 772 { "nec-usb-xhci", "msi", "off" }, 773 { "nec-usb-xhci", "msix", "off" }, 774 { "qxl", "revision", "3" }, 775 { "qxl-vga", "revision", "3" }, 776 { "VGA", "mmio", "off" }, 777 }; 778 779 pc_i440fx_1_3_machine_options(m); 780 m->hw_version = "1.2.0"; 781 compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat)); 782 } 783 784 DEFINE_I440FX_MACHINE(v1_2, "pc-1.2", pc_compat_1_2, 785 pc_i440fx_1_2_machine_options); 786 787 788 static void pc_i440fx_1_1_machine_options(MachineClass *m) 789 { 790 static GlobalProperty compat[] = { 791 PC_CPU_MODEL_IDS("1.1.0") 792 { "virtio-scsi-pci", "hotplug", "off" }, 793 { "virtio-scsi-pci", "param_change", "off" }, 794 { "VGA", "vgamem_mb", "8" }, 795 { "vmware-svga", "vgamem_mb", "8" }, 796 { "qxl-vga", "vgamem_mb", "8" }, 797 { "qxl", "vgamem_mb", "8" }, 798 { "virtio-blk-pci", "config-wce", "off" }, 799 }; 800 801 pc_i440fx_1_2_machine_options(m); 802 m->hw_version = "1.1.0"; 803 compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat)); 804 } 805 806 DEFINE_I440FX_MACHINE(v1_1, "pc-1.1", pc_compat_1_2, 807 pc_i440fx_1_1_machine_options); 808 809 static void pc_i440fx_1_0_machine_options(MachineClass *m) 810 { 811 static GlobalProperty compat[] = { 812 PC_CPU_MODEL_IDS("1.0") 813 { TYPE_ISA_FDC, "check_media_rate", "off" }, 814 { "virtio-balloon-pci", "class", stringify(PCI_CLASS_MEMORY_RAM) }, 815 { "apic-common", "vapic", "off" }, 816 { TYPE_USB_DEVICE, "full-path", "no" }, 817 }; 818 819 pc_i440fx_1_1_machine_options(m); 820 m->hw_version = "1.0"; 821 compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat)); 822 } 823 824 DEFINE_I440FX_MACHINE(v1_0, "pc-1.0", pc_compat_1_2, 825 pc_i440fx_1_0_machine_options); 826 827 828 typedef struct { 829 uint16_t gpu_device_id; 830 uint16_t pch_device_id; 831 uint8_t pch_revision_id; 832 } IGDDeviceIDInfo; 833 834 /* In real world different GPU should have different PCH. But actually 835 * the different PCH DIDs likely map to different PCH SKUs. We do the 836 * same thing for the GPU. For PCH, the different SKUs are going to be 837 * all the same silicon design and implementation, just different 838 * features turn on and off with fuses. The SW interfaces should be 839 * consistent across all SKUs in a given family (eg LPT). But just same 840 * features may not be supported. 841 * 842 * Most of these different PCH features probably don't matter to the 843 * Gfx driver, but obviously any difference in display port connections 844 * will so it should be fine with any PCH in case of passthrough. 845 * 846 * So currently use one PCH version, 0x8c4e, to cover all HSW(Haswell) 847 * scenarios, 0x9cc3 for BDW(Broadwell). 848 */ 849 static const IGDDeviceIDInfo igd_combo_id_infos[] = { 850 /* HSW Classic */ 851 {0x0402, 0x8c4e, 0x04}, /* HSWGT1D, HSWD_w7 */ 852 {0x0406, 0x8c4e, 0x04}, /* HSWGT1M, HSWM_w7 */ 853 {0x0412, 0x8c4e, 0x04}, /* HSWGT2D, HSWD_w7 */ 854 {0x0416, 0x8c4e, 0x04}, /* HSWGT2M, HSWM_w7 */ 855 {0x041E, 0x8c4e, 0x04}, /* HSWGT15D, HSWD_w7 */ 856 /* HSW ULT */ 857 {0x0A06, 0x8c4e, 0x04}, /* HSWGT1UT, HSWM_w7 */ 858 {0x0A16, 0x8c4e, 0x04}, /* HSWGT2UT, HSWM_w7 */ 859 {0x0A26, 0x8c4e, 0x06}, /* HSWGT3UT, HSWM_w7 */ 860 {0x0A2E, 0x8c4e, 0x04}, /* HSWGT3UT28W, HSWM_w7 */ 861 {0x0A1E, 0x8c4e, 0x04}, /* HSWGT2UX, HSWM_w7 */ 862 {0x0A0E, 0x8c4e, 0x04}, /* HSWGT1ULX, HSWM_w7 */ 863 /* HSW CRW */ 864 {0x0D26, 0x8c4e, 0x04}, /* HSWGT3CW, HSWM_w7 */ 865 {0x0D22, 0x8c4e, 0x04}, /* HSWGT3CWDT, HSWD_w7 */ 866 /* HSW Server */ 867 {0x041A, 0x8c4e, 0x04}, /* HSWSVGT2, HSWD_w7 */ 868 /* HSW SRVR */ 869 {0x040A, 0x8c4e, 0x04}, /* HSWSVGT1, HSWD_w7 */ 870 /* BSW */ 871 {0x1606, 0x9cc3, 0x03}, /* BDWULTGT1, BDWM_w7 */ 872 {0x1616, 0x9cc3, 0x03}, /* BDWULTGT2, BDWM_w7 */ 873 {0x1626, 0x9cc3, 0x03}, /* BDWULTGT3, BDWM_w7 */ 874 {0x160E, 0x9cc3, 0x03}, /* BDWULXGT1, BDWM_w7 */ 875 {0x161E, 0x9cc3, 0x03}, /* BDWULXGT2, BDWM_w7 */ 876 {0x1602, 0x9cc3, 0x03}, /* BDWHALOGT1, BDWM_w7 */ 877 {0x1612, 0x9cc3, 0x03}, /* BDWHALOGT2, BDWM_w7 */ 878 {0x1622, 0x9cc3, 0x03}, /* BDWHALOGT3, BDWM_w7 */ 879 {0x162B, 0x9cc3, 0x03}, /* BDWHALO28W, BDWM_w7 */ 880 {0x162A, 0x9cc3, 0x03}, /* BDWGT3WRKS, BDWM_w7 */ 881 {0x162D, 0x9cc3, 0x03}, /* BDWGT3SRVR, BDWM_w7 */ 882 }; 883 884 static void isa_bridge_class_init(ObjectClass *klass, void *data) 885 { 886 DeviceClass *dc = DEVICE_CLASS(klass); 887 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 888 889 dc->desc = "ISA bridge faked to support IGD PT"; 890 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); 891 k->vendor_id = PCI_VENDOR_ID_INTEL; 892 k->class_id = PCI_CLASS_BRIDGE_ISA; 893 }; 894 895 static TypeInfo isa_bridge_info = { 896 .name = "igd-passthrough-isa-bridge", 897 .parent = TYPE_PCI_DEVICE, 898 .instance_size = sizeof(PCIDevice), 899 .class_init = isa_bridge_class_init, 900 .interfaces = (InterfaceInfo[]) { 901 { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 902 { }, 903 }, 904 }; 905 906 static void pt_graphics_register_types(void) 907 { 908 type_register_static(&isa_bridge_info); 909 } 910 type_init(pt_graphics_register_types) 911 912 void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id) 913 { 914 struct PCIDevice *bridge_dev; 915 int i, num; 916 uint16_t pch_dev_id = 0xffff; 917 uint8_t pch_rev_id; 918 919 num = ARRAY_SIZE(igd_combo_id_infos); 920 for (i = 0; i < num; i++) { 921 if (gpu_dev_id == igd_combo_id_infos[i].gpu_device_id) { 922 pch_dev_id = igd_combo_id_infos[i].pch_device_id; 923 pch_rev_id = igd_combo_id_infos[i].pch_revision_id; 924 } 925 } 926 927 if (pch_dev_id == 0xffff) { 928 return; 929 } 930 931 /* Currently IGD drivers always need to access PCH by 1f.0. */ 932 bridge_dev = pci_create_simple(bus, PCI_DEVFN(0x1f, 0), 933 "igd-passthrough-isa-bridge"); 934 935 /* 936 * Note that vendor id is always PCI_VENDOR_ID_INTEL. 937 */ 938 if (!bridge_dev) { 939 fprintf(stderr, "set igd-passthrough-isa-bridge failed!\n"); 940 return; 941 } 942 pci_config_set_device_id(bridge_dev->config, pch_dev_id); 943 pci_config_set_revision(bridge_dev->config, pch_rev_id); 944 } 945 946 static void isapc_machine_options(MachineClass *m) 947 { 948 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 949 m->desc = "ISA-only PC"; 950 m->max_cpus = 1; 951 m->option_rom_has_mr = true; 952 m->rom_file_has_mr = false; 953 pcmc->pci_enabled = false; 954 pcmc->has_acpi_build = false; 955 pcmc->smbios_defaults = false; 956 pcmc->gigabyte_align = false; 957 pcmc->smbios_legacy_mode = true; 958 pcmc->has_reserved_memory = false; 959 pcmc->default_nic_model = "ne2k_isa"; 960 m->default_cpu_type = X86_CPU_TYPE_NAME("486"); 961 } 962 963 DEFINE_PC_MACHINE(isapc, "isapc", pc_init_isa, 964 isapc_machine_options); 965 966 967 #ifdef CONFIG_XEN 968 static void xenfv_4_2_machine_options(MachineClass *m) 969 { 970 pc_i440fx_4_2_machine_options(m); 971 m->desc = "Xen Fully-virtualized PC"; 972 m->max_cpus = HVM_MAX_VCPUS; 973 m->default_machine_opts = "accel=xen"; 974 } 975 976 DEFINE_PC_MACHINE(xenfv_4_2, "xenfv-4.2", pc_xen_hvm_init, 977 xenfv_4_2_machine_options); 978 979 static void xenfv_3_1_machine_options(MachineClass *m) 980 { 981 pc_i440fx_3_1_machine_options(m); 982 m->desc = "Xen Fully-virtualized PC"; 983 m->alias = "xenfv"; 984 m->max_cpus = HVM_MAX_VCPUS; 985 m->default_machine_opts = "accel=xen"; 986 } 987 988 DEFINE_PC_MACHINE(xenfv, "xenfv-3.1", pc_xen_hvm_init, 989 xenfv_3_1_machine_options); 990 #endif 991