1 /* 2 * QEMU PC System Emulator 3 * 4 * Copyright (c) 2003-2004 Fabrice Bellard 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 #include "qemu/osdep.h" 26 27 #include "qemu/units.h" 28 #include "hw/hw.h" 29 #include "hw/loader.h" 30 #include "hw/i386/pc.h" 31 #include "hw/i386/apic.h" 32 #include "hw/display/ramfb.h" 33 #include "hw/smbios/smbios.h" 34 #include "hw/pci/pci.h" 35 #include "hw/pci/pci_ids.h" 36 #include "hw/usb.h" 37 #include "net/net.h" 38 #include "hw/boards.h" 39 #include "hw/ide.h" 40 #include "sysemu/kvm.h" 41 #include "hw/kvm/clock.h" 42 #include "sysemu/sysemu.h" 43 #include "hw/sysbus.h" 44 #include "sysemu/arch_init.h" 45 #include "hw/i2c/smbus.h" 46 #include "hw/xen/xen.h" 47 #include "exec/memory.h" 48 #include "exec/address-spaces.h" 49 #include "hw/acpi/acpi.h" 50 #include "cpu.h" 51 #include "qapi/error.h" 52 #include "qemu/error-report.h" 53 #ifdef CONFIG_XEN 54 #include <xen/hvm/hvm_info_table.h> 55 #include "hw/xen/xen_pt.h" 56 #endif 57 #include "migration/global_state.h" 58 #include "migration/misc.h" 59 #include "kvm_i386.h" 60 #include "sysemu/numa.h" 61 62 #define MAX_IDE_BUS 2 63 64 static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 }; 65 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 }; 66 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 }; 67 68 /* PC hardware initialisation */ 69 static void pc_init1(MachineState *machine, 70 const char *host_type, const char *pci_type) 71 { 72 PCMachineState *pcms = PC_MACHINE(machine); 73 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); 74 MemoryRegion *system_memory = get_system_memory(); 75 MemoryRegion *system_io = get_system_io(); 76 int i; 77 PCIBus *pci_bus; 78 ISABus *isa_bus; 79 PCII440FXState *i440fx_state; 80 int piix3_devfn = -1; 81 qemu_irq *i8259; 82 qemu_irq smi_irq; 83 GSIState *gsi_state; 84 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; 85 BusState *idebus[MAX_IDE_BUS]; 86 ISADevice *rtc_state; 87 MemoryRegion *ram_memory; 88 MemoryRegion *pci_memory; 89 MemoryRegion *rom_memory; 90 ram_addr_t lowmem; 91 92 /* 93 * Calculate ram split, for memory below and above 4G. It's a bit 94 * complicated for backward compatibility reasons ... 95 * 96 * - Traditional split is 3.5G (lowmem = 0xe0000000). This is the 97 * default value for max_ram_below_4g now. 98 * 99 * - Then, to gigabyte align the memory, we move the split to 3G 100 * (lowmem = 0xc0000000). But only in case we have to split in 101 * the first place, i.e. ram_size is larger than (traditional) 102 * lowmem. And for new machine types (gigabyte_align = true) 103 * only, for live migration compatibility reasons. 104 * 105 * - Next the max-ram-below-4g option was added, which allowed to 106 * reduce lowmem to a smaller value, to allow a larger PCI I/O 107 * window below 4G. qemu doesn't enforce gigabyte alignment here, 108 * but prints a warning. 109 * 110 * - Finally max-ram-below-4g got updated to also allow raising lowmem, 111 * so legacy non-PAE guests can get as much memory as possible in 112 * the 32bit address space below 4G. 113 * 114 * - Note that Xen has its own ram setp code in xen_ram_init(), 115 * called via xen_hvm_init(). 116 * 117 * Examples: 118 * qemu -M pc-1.7 -m 4G (old default) -> 3584M low, 512M high 119 * qemu -M pc -m 4G (new default) -> 3072M low, 1024M high 120 * qemu -M pc,max-ram-below-4g=2G -m 4G -> 2048M low, 2048M high 121 * qemu -M pc,max-ram-below-4g=4G -m 3968M -> 3968M low (=4G-128M) 122 */ 123 if (xen_enabled()) { 124 xen_hvm_init(pcms, &ram_memory); 125 } else { 126 if (!pcms->max_ram_below_4g) { 127 pcms->max_ram_below_4g = 0xe0000000; /* default: 3.5G */ 128 } 129 lowmem = pcms->max_ram_below_4g; 130 if (machine->ram_size >= pcms->max_ram_below_4g) { 131 if (pcmc->gigabyte_align) { 132 if (lowmem > 0xc0000000) { 133 lowmem = 0xc0000000; 134 } 135 if (lowmem & (1 * GiB - 1)) { 136 warn_report("Large machine and max_ram_below_4g " 137 "(%" PRIu64 ") not a multiple of 1G; " 138 "possible bad performance.", 139 pcms->max_ram_below_4g); 140 } 141 } 142 } 143 144 if (machine->ram_size >= lowmem) { 145 pcms->above_4g_mem_size = machine->ram_size - lowmem; 146 pcms->below_4g_mem_size = lowmem; 147 } else { 148 pcms->above_4g_mem_size = 0; 149 pcms->below_4g_mem_size = machine->ram_size; 150 } 151 } 152 153 pc_cpus_init(pcms); 154 155 if (kvm_enabled() && pcmc->kvmclock_enabled) { 156 kvmclock_create(); 157 } 158 159 if (pcmc->pci_enabled) { 160 pci_memory = g_new(MemoryRegion, 1); 161 memory_region_init(pci_memory, NULL, "pci", UINT64_MAX); 162 rom_memory = pci_memory; 163 } else { 164 pci_memory = NULL; 165 rom_memory = system_memory; 166 } 167 168 pc_guest_info_init(pcms); 169 170 if (pcmc->smbios_defaults) { 171 MachineClass *mc = MACHINE_GET_CLASS(machine); 172 /* These values are guest ABI, do not change */ 173 smbios_set_defaults("QEMU", "Standard PC (i440FX + PIIX, 1996)", 174 mc->name, pcmc->smbios_legacy_mode, 175 pcmc->smbios_uuid_encoded, 176 SMBIOS_ENTRY_POINT_21); 177 } 178 179 /* allocate ram and load rom/bios */ 180 if (!xen_enabled()) { 181 pc_memory_init(pcms, system_memory, 182 rom_memory, &ram_memory); 183 } else if (machine->kernel_filename != NULL) { 184 /* For xen HVM direct kernel boot, load linux here */ 185 xen_load_linux(pcms); 186 } 187 188 gsi_state = g_malloc0(sizeof(*gsi_state)); 189 if (kvm_ioapic_in_kernel()) { 190 kvm_pc_setup_irq_routing(pcmc->pci_enabled); 191 pcms->gsi = qemu_allocate_irqs(kvm_pc_gsi_handler, gsi_state, 192 GSI_NUM_PINS); 193 } else { 194 pcms->gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS); 195 } 196 197 if (pcmc->pci_enabled) { 198 pci_bus = i440fx_init(host_type, 199 pci_type, 200 &i440fx_state, &piix3_devfn, &isa_bus, pcms->gsi, 201 system_memory, system_io, machine->ram_size, 202 pcms->below_4g_mem_size, 203 pcms->above_4g_mem_size, 204 pci_memory, ram_memory); 205 pcms->bus = pci_bus; 206 } else { 207 pci_bus = NULL; 208 i440fx_state = NULL; 209 isa_bus = isa_bus_new(NULL, get_system_memory(), system_io, 210 &error_abort); 211 no_hpet = 1; 212 } 213 isa_bus_irqs(isa_bus, pcms->gsi); 214 215 if (kvm_pic_in_kernel()) { 216 i8259 = kvm_i8259_init(isa_bus); 217 } else if (xen_enabled()) { 218 i8259 = xen_interrupt_controller_init(); 219 } else { 220 i8259 = i8259_init(isa_bus, pc_allocate_cpu_irq()); 221 } 222 223 for (i = 0; i < ISA_NUM_IRQS; i++) { 224 gsi_state->i8259_irq[i] = i8259[i]; 225 } 226 g_free(i8259); 227 if (pcmc->pci_enabled) { 228 ioapic_init_gsi(gsi_state, "i440fx"); 229 } 230 231 pc_register_ferr_irq(pcms->gsi[13]); 232 233 pc_vga_init(isa_bus, pcmc->pci_enabled ? pci_bus : NULL); 234 235 assert(pcms->vmport != ON_OFF_AUTO__MAX); 236 if (pcms->vmport == ON_OFF_AUTO_AUTO) { 237 pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON; 238 } 239 240 /* init basic PC hardware */ 241 pc_basic_device_init(isa_bus, pcms->gsi, &rtc_state, true, 242 (pcms->vmport != ON_OFF_AUTO_ON), pcms->pit, 0x4); 243 244 pc_nic_init(pcmc, isa_bus, pci_bus); 245 246 ide_drive_get(hd, ARRAY_SIZE(hd)); 247 if (pcmc->pci_enabled) { 248 PCIDevice *dev; 249 if (xen_enabled()) { 250 dev = pci_piix3_xen_ide_init(pci_bus, hd, piix3_devfn + 1); 251 } else { 252 dev = pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1); 253 } 254 idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0"); 255 idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1"); 256 } else { 257 for(i = 0; i < MAX_IDE_BUS; i++) { 258 ISADevice *dev; 259 char busname[] = "ide.0"; 260 dev = isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i], 261 ide_irq[i], 262 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]); 263 /* 264 * The ide bus name is ide.0 for the first bus and ide.1 for the 265 * second one. 266 */ 267 busname[4] = '0' + i; 268 idebus[i] = qdev_get_child_bus(DEVICE(dev), busname); 269 } 270 } 271 272 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state); 273 274 if (pcmc->pci_enabled && machine_usb(machine)) { 275 pci_create_simple(pci_bus, piix3_devfn + 2, "piix3-usb-uhci"); 276 } 277 278 if (pcmc->pci_enabled && acpi_enabled) { 279 DeviceState *piix4_pm; 280 I2CBus *smbus; 281 282 smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0); 283 /* TODO: Populate SPD eeprom data. */ 284 smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, 285 pcms->gsi[9], smi_irq, 286 pc_machine_is_smm_enabled(pcms), 287 &piix4_pm); 288 smbus_eeprom_init(smbus, 8, NULL, 0); 289 290 object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP, 291 TYPE_HOTPLUG_HANDLER, 292 (Object **)&pcms->acpi_dev, 293 object_property_allow_set_link, 294 OBJ_PROP_LINK_STRONG, &error_abort); 295 object_property_set_link(OBJECT(machine), OBJECT(piix4_pm), 296 PC_MACHINE_ACPI_DEVICE_PROP, &error_abort); 297 } 298 299 if (pcms->acpi_nvdimm_state.is_enabled) { 300 nvdimm_init_acpi_state(&pcms->acpi_nvdimm_state, system_io, 301 pcms->fw_cfg, OBJECT(pcms)); 302 } 303 } 304 305 /* Looking for a pc_compat_2_4() function? It doesn't exist. 306 * pc_compat_*() functions that run on machine-init time and 307 * change global QEMU state are deprecated. Please don't create 308 * one, and implement any pc-*-2.4 (and newer) compat code in 309 * HW_COMPAT_*, PC_COMPAT_*, or * pc_*_machine_options(). 310 */ 311 312 static void pc_compat_2_3(MachineState *machine) 313 { 314 PCMachineState *pcms = PC_MACHINE(machine); 315 if (kvm_enabled()) { 316 pcms->smm = ON_OFF_AUTO_OFF; 317 } 318 } 319 320 static void pc_compat_2_2(MachineState *machine) 321 { 322 pc_compat_2_3(machine); 323 machine->suppress_vmdesc = true; 324 } 325 326 static void pc_compat_2_1(MachineState *machine) 327 { 328 pc_compat_2_2(machine); 329 x86_cpu_change_kvm_default("svm", NULL); 330 } 331 332 static void pc_compat_2_0(MachineState *machine) 333 { 334 pc_compat_2_1(machine); 335 } 336 337 static void pc_compat_1_7(MachineState *machine) 338 { 339 pc_compat_2_0(machine); 340 x86_cpu_change_kvm_default("x2apic", NULL); 341 } 342 343 static void pc_compat_1_6(MachineState *machine) 344 { 345 pc_compat_1_7(machine); 346 } 347 348 static void pc_compat_1_5(MachineState *machine) 349 { 350 pc_compat_1_6(machine); 351 } 352 353 static void pc_compat_1_4(MachineState *machine) 354 { 355 pc_compat_1_5(machine); 356 } 357 358 static void pc_compat_1_3(MachineState *machine) 359 { 360 pc_compat_1_4(machine); 361 enable_compat_apic_id_mode(); 362 } 363 364 /* PC compat function for pc-0.14 to pc-1.2 */ 365 static void pc_compat_1_2(MachineState *machine) 366 { 367 pc_compat_1_3(machine); 368 x86_cpu_change_kvm_default("kvm-pv-eoi", NULL); 369 } 370 371 /* PC compat function for pc-0.10 to pc-0.13 */ 372 static void pc_compat_0_13(MachineState *machine) 373 { 374 pc_compat_1_2(machine); 375 } 376 377 static void pc_init_isa(MachineState *machine) 378 { 379 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, TYPE_I440FX_PCI_DEVICE); 380 } 381 382 #ifdef CONFIG_XEN 383 static void pc_xen_hvm_init_pci(MachineState *machine) 384 { 385 const char *pci_type = has_igd_gfx_passthru ? 386 TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE : TYPE_I440FX_PCI_DEVICE; 387 388 pc_init1(machine, 389 TYPE_I440FX_PCI_HOST_BRIDGE, 390 pci_type); 391 } 392 393 static void pc_xen_hvm_init(MachineState *machine) 394 { 395 PCMachineState *pcms = PC_MACHINE(machine); 396 397 if (!xen_enabled()) { 398 error_report("xenfv machine requires the xen accelerator"); 399 exit(1); 400 } 401 402 pc_xen_hvm_init_pci(machine); 403 pci_create_simple(pcms->bus, -1, "xen-platform"); 404 } 405 #endif 406 407 #define DEFINE_I440FX_MACHINE(suffix, name, compatfn, optionfn) \ 408 static void pc_init_##suffix(MachineState *machine) \ 409 { \ 410 void (*compat)(MachineState *m) = (compatfn); \ 411 if (compat) { \ 412 compat(machine); \ 413 } \ 414 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, \ 415 TYPE_I440FX_PCI_DEVICE); \ 416 } \ 417 DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn) 418 419 static void pc_i440fx_machine_options(MachineClass *m) 420 { 421 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 422 pcmc->default_nic_model = "e1000"; 423 424 m->family = "pc_piix"; 425 m->desc = "Standard PC (i440FX + PIIX, 1996)"; 426 m->default_machine_opts = "firmware=bios-256k.bin"; 427 m->default_display = "std"; 428 machine_class_allow_dynamic_sysbus_dev(m, TYPE_RAMFB_DEVICE); 429 } 430 431 static void pc_i440fx_3_0_machine_options(MachineClass *m) 432 { 433 pc_i440fx_machine_options(m); 434 m->alias = "pc"; 435 m->is_default = 1; 436 } 437 438 DEFINE_I440FX_MACHINE(v3_0, "pc-i440fx-3.0", NULL, 439 pc_i440fx_3_0_machine_options); 440 441 static void pc_i440fx_2_12_machine_options(MachineClass *m) 442 { 443 pc_i440fx_3_0_machine_options(m); 444 m->is_default = 0; 445 m->alias = NULL; 446 SET_MACHINE_COMPAT(m, PC_COMPAT_2_12); 447 } 448 449 DEFINE_I440FX_MACHINE(v2_12, "pc-i440fx-2.12", NULL, 450 pc_i440fx_2_12_machine_options); 451 452 static void pc_i440fx_2_11_machine_options(MachineClass *m) 453 { 454 pc_i440fx_2_12_machine_options(m); 455 SET_MACHINE_COMPAT(m, PC_COMPAT_2_11); 456 } 457 458 DEFINE_I440FX_MACHINE(v2_11, "pc-i440fx-2.11", NULL, 459 pc_i440fx_2_11_machine_options); 460 461 static void pc_i440fx_2_10_machine_options(MachineClass *m) 462 { 463 pc_i440fx_2_11_machine_options(m); 464 SET_MACHINE_COMPAT(m, PC_COMPAT_2_10); 465 m->auto_enable_numa_with_memhp = false; 466 } 467 468 DEFINE_I440FX_MACHINE(v2_10, "pc-i440fx-2.10", NULL, 469 pc_i440fx_2_10_machine_options); 470 471 static void pc_i440fx_2_9_machine_options(MachineClass *m) 472 { 473 pc_i440fx_2_10_machine_options(m); 474 SET_MACHINE_COMPAT(m, PC_COMPAT_2_9); 475 m->numa_auto_assign_ram = numa_legacy_auto_assign_ram; 476 } 477 478 DEFINE_I440FX_MACHINE(v2_9, "pc-i440fx-2.9", NULL, 479 pc_i440fx_2_9_machine_options); 480 481 static void pc_i440fx_2_8_machine_options(MachineClass *m) 482 { 483 pc_i440fx_2_9_machine_options(m); 484 SET_MACHINE_COMPAT(m, PC_COMPAT_2_8); 485 } 486 487 DEFINE_I440FX_MACHINE(v2_8, "pc-i440fx-2.8", NULL, 488 pc_i440fx_2_8_machine_options); 489 490 491 static void pc_i440fx_2_7_machine_options(MachineClass *m) 492 { 493 pc_i440fx_2_8_machine_options(m); 494 SET_MACHINE_COMPAT(m, PC_COMPAT_2_7); 495 } 496 497 DEFINE_I440FX_MACHINE(v2_7, "pc-i440fx-2.7", NULL, 498 pc_i440fx_2_7_machine_options); 499 500 501 static void pc_i440fx_2_6_machine_options(MachineClass *m) 502 { 503 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 504 pc_i440fx_2_7_machine_options(m); 505 pcmc->legacy_cpu_hotplug = true; 506 pcmc->linuxboot_dma_enabled = false; 507 SET_MACHINE_COMPAT(m, PC_COMPAT_2_6); 508 } 509 510 DEFINE_I440FX_MACHINE(v2_6, "pc-i440fx-2.6", NULL, 511 pc_i440fx_2_6_machine_options); 512 513 514 static void pc_i440fx_2_5_machine_options(MachineClass *m) 515 { 516 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 517 pc_i440fx_2_6_machine_options(m); 518 pcmc->save_tsc_khz = false; 519 m->legacy_fw_cfg_order = 1; 520 SET_MACHINE_COMPAT(m, PC_COMPAT_2_5); 521 } 522 523 DEFINE_I440FX_MACHINE(v2_5, "pc-i440fx-2.5", NULL, 524 pc_i440fx_2_5_machine_options); 525 526 527 static void pc_i440fx_2_4_machine_options(MachineClass *m) 528 { 529 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 530 pc_i440fx_2_5_machine_options(m); 531 m->hw_version = "2.4.0"; 532 pcmc->broken_reserved_end = true; 533 SET_MACHINE_COMPAT(m, PC_COMPAT_2_4); 534 } 535 536 DEFINE_I440FX_MACHINE(v2_4, "pc-i440fx-2.4", NULL, 537 pc_i440fx_2_4_machine_options) 538 539 540 static void pc_i440fx_2_3_machine_options(MachineClass *m) 541 { 542 pc_i440fx_2_4_machine_options(m); 543 m->hw_version = "2.3.0"; 544 SET_MACHINE_COMPAT(m, PC_COMPAT_2_3); 545 } 546 547 DEFINE_I440FX_MACHINE(v2_3, "pc-i440fx-2.3", pc_compat_2_3, 548 pc_i440fx_2_3_machine_options); 549 550 551 static void pc_i440fx_2_2_machine_options(MachineClass *m) 552 { 553 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 554 pc_i440fx_2_3_machine_options(m); 555 m->hw_version = "2.2.0"; 556 SET_MACHINE_COMPAT(m, PC_COMPAT_2_2); 557 pcmc->rsdp_in_ram = false; 558 } 559 560 DEFINE_I440FX_MACHINE(v2_2, "pc-i440fx-2.2", pc_compat_2_2, 561 pc_i440fx_2_2_machine_options); 562 563 564 static void pc_i440fx_2_1_machine_options(MachineClass *m) 565 { 566 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 567 pc_i440fx_2_2_machine_options(m); 568 m->hw_version = "2.1.0"; 569 m->default_display = NULL; 570 SET_MACHINE_COMPAT(m, PC_COMPAT_2_1); 571 pcmc->smbios_uuid_encoded = false; 572 pcmc->enforce_aligned_dimm = false; 573 } 574 575 DEFINE_I440FX_MACHINE(v2_1, "pc-i440fx-2.1", pc_compat_2_1, 576 pc_i440fx_2_1_machine_options); 577 578 579 580 static void pc_i440fx_2_0_machine_options(MachineClass *m) 581 { 582 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 583 pc_i440fx_2_1_machine_options(m); 584 m->hw_version = "2.0.0"; 585 SET_MACHINE_COMPAT(m, PC_COMPAT_2_0); 586 pcmc->smbios_legacy_mode = true; 587 pcmc->has_reserved_memory = false; 588 /* This value depends on the actual DSDT and SSDT compiled into 589 * the source QEMU; unfortunately it depends on the binary and 590 * not on the machine type, so we cannot make pc-i440fx-1.7 work on 591 * both QEMU 1.7 and QEMU 2.0. 592 * 593 * Large variations cause migration to fail for more than one 594 * consecutive value of the "-smp" maxcpus option. 595 * 596 * For small variations of the kind caused by different iasl versions, 597 * the 4k rounding usually leaves slack. However, there could be still 598 * one or two values that break. For QEMU 1.7 and QEMU 2.0 the 599 * slack is only ~10 bytes before one "-smp maxcpus" value breaks! 600 * 601 * 6652 is valid for QEMU 2.0, the right value for pc-i440fx-1.7 on 602 * QEMU 1.7 it is 6414. For RHEL/CentOS 7.0 it is 6418. 603 */ 604 pcmc->legacy_acpi_table_size = 6652; 605 pcmc->acpi_data_size = 0x10000; 606 } 607 608 DEFINE_I440FX_MACHINE(v2_0, "pc-i440fx-2.0", pc_compat_2_0, 609 pc_i440fx_2_0_machine_options); 610 611 612 static void pc_i440fx_1_7_machine_options(MachineClass *m) 613 { 614 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 615 pc_i440fx_2_0_machine_options(m); 616 m->hw_version = "1.7.0"; 617 m->default_machine_opts = NULL; 618 m->option_rom_has_mr = true; 619 SET_MACHINE_COMPAT(m, PC_COMPAT_1_7); 620 pcmc->smbios_defaults = false; 621 pcmc->gigabyte_align = false; 622 pcmc->legacy_acpi_table_size = 6414; 623 } 624 625 DEFINE_I440FX_MACHINE(v1_7, "pc-i440fx-1.7", pc_compat_1_7, 626 pc_i440fx_1_7_machine_options); 627 628 629 static void pc_i440fx_1_6_machine_options(MachineClass *m) 630 { 631 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 632 pc_i440fx_1_7_machine_options(m); 633 m->hw_version = "1.6.0"; 634 m->rom_file_has_mr = false; 635 SET_MACHINE_COMPAT(m, PC_COMPAT_1_6); 636 pcmc->has_acpi_build = false; 637 } 638 639 DEFINE_I440FX_MACHINE(v1_6, "pc-i440fx-1.6", pc_compat_1_6, 640 pc_i440fx_1_6_machine_options); 641 642 643 static void pc_i440fx_1_5_machine_options(MachineClass *m) 644 { 645 pc_i440fx_1_6_machine_options(m); 646 m->hw_version = "1.5.0"; 647 SET_MACHINE_COMPAT(m, PC_COMPAT_1_5); 648 } 649 650 DEFINE_I440FX_MACHINE(v1_5, "pc-i440fx-1.5", pc_compat_1_5, 651 pc_i440fx_1_5_machine_options); 652 653 654 static void pc_i440fx_1_4_machine_options(MachineClass *m) 655 { 656 pc_i440fx_1_5_machine_options(m); 657 m->hw_version = "1.4.0"; 658 m->hot_add_cpu = NULL; 659 SET_MACHINE_COMPAT(m, PC_COMPAT_1_4); 660 } 661 662 DEFINE_I440FX_MACHINE(v1_4, "pc-i440fx-1.4", pc_compat_1_4, 663 pc_i440fx_1_4_machine_options); 664 665 666 #define PC_COMPAT_1_3 \ 667 PC_CPU_MODEL_IDS("1.3.0") \ 668 {\ 669 .driver = "usb-tablet",\ 670 .property = "usb_version",\ 671 .value = stringify(1),\ 672 },{\ 673 .driver = "virtio-net-pci",\ 674 .property = "ctrl_mac_addr",\ 675 .value = "off", \ 676 },{ \ 677 .driver = "virtio-net-pci", \ 678 .property = "mq", \ 679 .value = "off", \ 680 }, {\ 681 .driver = "e1000",\ 682 .property = "autonegotiation",\ 683 .value = "off",\ 684 }, 685 686 687 static void pc_i440fx_1_3_machine_options(MachineClass *m) 688 { 689 pc_i440fx_1_4_machine_options(m); 690 m->hw_version = "1.3.0"; 691 SET_MACHINE_COMPAT(m, PC_COMPAT_1_3); 692 } 693 694 DEFINE_I440FX_MACHINE(v1_3, "pc-1.3", pc_compat_1_3, 695 pc_i440fx_1_3_machine_options); 696 697 698 #define PC_COMPAT_1_2 \ 699 PC_CPU_MODEL_IDS("1.2.0") \ 700 {\ 701 .driver = "nec-usb-xhci",\ 702 .property = "msi",\ 703 .value = "off",\ 704 },{\ 705 .driver = "nec-usb-xhci",\ 706 .property = "msix",\ 707 .value = "off",\ 708 },{\ 709 .driver = "ivshmem",\ 710 .property = "use64",\ 711 .value = "0",\ 712 },{\ 713 .driver = "qxl",\ 714 .property = "revision",\ 715 .value = stringify(3),\ 716 },{\ 717 .driver = "qxl-vga",\ 718 .property = "revision",\ 719 .value = stringify(3),\ 720 },{\ 721 .driver = "VGA",\ 722 .property = "mmio",\ 723 .value = "off",\ 724 }, 725 726 static void pc_i440fx_1_2_machine_options(MachineClass *m) 727 { 728 pc_i440fx_1_3_machine_options(m); 729 m->hw_version = "1.2.0"; 730 SET_MACHINE_COMPAT(m, PC_COMPAT_1_2); 731 } 732 733 DEFINE_I440FX_MACHINE(v1_2, "pc-1.2", pc_compat_1_2, 734 pc_i440fx_1_2_machine_options); 735 736 737 #define PC_COMPAT_1_1 \ 738 PC_CPU_MODEL_IDS("1.1.0") \ 739 {\ 740 .driver = "virtio-scsi-pci",\ 741 .property = "hotplug",\ 742 .value = "off",\ 743 },{\ 744 .driver = "virtio-scsi-pci",\ 745 .property = "param_change",\ 746 .value = "off",\ 747 },{\ 748 .driver = "VGA",\ 749 .property = "vgamem_mb",\ 750 .value = stringify(8),\ 751 },{\ 752 .driver = "vmware-svga",\ 753 .property = "vgamem_mb",\ 754 .value = stringify(8),\ 755 },{\ 756 .driver = "qxl-vga",\ 757 .property = "vgamem_mb",\ 758 .value = stringify(8),\ 759 },{\ 760 .driver = "qxl",\ 761 .property = "vgamem_mb",\ 762 .value = stringify(8),\ 763 },{\ 764 .driver = "virtio-blk-pci",\ 765 .property = "config-wce",\ 766 .value = "off",\ 767 }, 768 769 static void pc_i440fx_1_1_machine_options(MachineClass *m) 770 { 771 pc_i440fx_1_2_machine_options(m); 772 m->hw_version = "1.1.0"; 773 SET_MACHINE_COMPAT(m, PC_COMPAT_1_1); 774 } 775 776 DEFINE_I440FX_MACHINE(v1_1, "pc-1.1", pc_compat_1_2, 777 pc_i440fx_1_1_machine_options); 778 779 780 #define PC_COMPAT_1_0 \ 781 PC_CPU_MODEL_IDS("1.0") \ 782 {\ 783 .driver = TYPE_ISA_FDC,\ 784 .property = "check_media_rate",\ 785 .value = "off",\ 786 }, {\ 787 .driver = "virtio-balloon-pci",\ 788 .property = "class",\ 789 .value = stringify(PCI_CLASS_MEMORY_RAM),\ 790 },{\ 791 .driver = "apic-common",\ 792 .property = "vapic",\ 793 .value = "off",\ 794 },{\ 795 .driver = TYPE_USB_DEVICE,\ 796 .property = "full-path",\ 797 .value = "no",\ 798 }, 799 800 static void pc_i440fx_1_0_machine_options(MachineClass *m) 801 { 802 pc_i440fx_1_1_machine_options(m); 803 m->hw_version = "1.0"; 804 SET_MACHINE_COMPAT(m, PC_COMPAT_1_0); 805 } 806 807 DEFINE_I440FX_MACHINE(v1_0, "pc-1.0", pc_compat_1_2, 808 pc_i440fx_1_0_machine_options); 809 810 811 #define PC_COMPAT_0_15 \ 812 PC_CPU_MODEL_IDS("0.15") 813 814 static void pc_i440fx_0_15_machine_options(MachineClass *m) 815 { 816 pc_i440fx_1_0_machine_options(m); 817 m->hw_version = "0.15"; 818 SET_MACHINE_COMPAT(m, PC_COMPAT_0_15); 819 } 820 821 DEFINE_I440FX_MACHINE(v0_15, "pc-0.15", pc_compat_1_2, 822 pc_i440fx_0_15_machine_options); 823 824 825 #define PC_COMPAT_0_14 \ 826 PC_CPU_MODEL_IDS("0.14") \ 827 {\ 828 .driver = "virtio-blk-pci",\ 829 .property = "event_idx",\ 830 .value = "off",\ 831 },{\ 832 .driver = "virtio-serial-pci",\ 833 .property = "event_idx",\ 834 .value = "off",\ 835 },{\ 836 .driver = "virtio-net-pci",\ 837 .property = "event_idx",\ 838 .value = "off",\ 839 },{\ 840 .driver = "virtio-balloon-pci",\ 841 .property = "event_idx",\ 842 .value = "off",\ 843 },{\ 844 .driver = "qxl",\ 845 .property = "revision",\ 846 .value = stringify(2),\ 847 },{\ 848 .driver = "qxl-vga",\ 849 .property = "revision",\ 850 .value = stringify(2),\ 851 }, 852 853 static void pc_i440fx_0_14_machine_options(MachineClass *m) 854 { 855 pc_i440fx_0_15_machine_options(m); 856 m->hw_version = "0.14"; 857 SET_MACHINE_COMPAT(m, PC_COMPAT_0_14); 858 } 859 860 DEFINE_I440FX_MACHINE(v0_14, "pc-0.14", pc_compat_1_2, 861 pc_i440fx_0_14_machine_options); 862 863 864 #define PC_COMPAT_0_13 \ 865 PC_CPU_MODEL_IDS("0.13") \ 866 {\ 867 .driver = TYPE_PCI_DEVICE,\ 868 .property = "command_serr_enable",\ 869 .value = "off",\ 870 },{\ 871 .driver = "AC97",\ 872 .property = "use_broken_id",\ 873 .value = stringify(1),\ 874 },{\ 875 .driver = "virtio-9p-pci",\ 876 .property = "vectors",\ 877 .value = stringify(0),\ 878 },{\ 879 .driver = "VGA",\ 880 .property = "rombar",\ 881 .value = stringify(0),\ 882 },{\ 883 .driver = "vmware-svga",\ 884 .property = "rombar",\ 885 .value = stringify(0),\ 886 }, 887 888 static void pc_i440fx_0_13_machine_options(MachineClass *m) 889 { 890 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 891 pc_i440fx_0_14_machine_options(m); 892 m->hw_version = "0.13"; 893 SET_MACHINE_COMPAT(m, PC_COMPAT_0_13); 894 pcmc->kvmclock_enabled = false; 895 } 896 897 DEFINE_I440FX_MACHINE(v0_13, "pc-0.13", pc_compat_0_13, 898 pc_i440fx_0_13_machine_options); 899 900 901 #define PC_COMPAT_0_12 \ 902 PC_CPU_MODEL_IDS("0.12") \ 903 {\ 904 .driver = "virtio-serial-pci",\ 905 .property = "max_ports",\ 906 .value = stringify(1),\ 907 },{\ 908 .driver = "virtio-serial-pci",\ 909 .property = "vectors",\ 910 .value = stringify(0),\ 911 },{\ 912 .driver = "usb-mouse",\ 913 .property = "serial",\ 914 .value = "1",\ 915 },{\ 916 .driver = "usb-tablet",\ 917 .property = "serial",\ 918 .value = "1",\ 919 },{\ 920 .driver = "usb-kbd",\ 921 .property = "serial",\ 922 .value = "1",\ 923 }, 924 925 static void pc_i440fx_0_12_machine_options(MachineClass *m) 926 { 927 pc_i440fx_0_13_machine_options(m); 928 m->hw_version = "0.12"; 929 SET_MACHINE_COMPAT(m, PC_COMPAT_0_12); 930 } 931 932 DEFINE_I440FX_MACHINE(v0_12, "pc-0.12", pc_compat_0_13, 933 pc_i440fx_0_12_machine_options); 934 935 936 #define PC_COMPAT_0_11 \ 937 PC_CPU_MODEL_IDS("0.11") \ 938 {\ 939 .driver = "virtio-blk-pci",\ 940 .property = "vectors",\ 941 .value = stringify(0),\ 942 },{\ 943 .driver = TYPE_PCI_DEVICE,\ 944 .property = "rombar",\ 945 .value = stringify(0),\ 946 },{\ 947 .driver = "ide-drive",\ 948 .property = "ver",\ 949 .value = "0.11",\ 950 },{\ 951 .driver = "scsi-disk",\ 952 .property = "ver",\ 953 .value = "0.11",\ 954 }, 955 956 static void pc_i440fx_0_11_machine_options(MachineClass *m) 957 { 958 pc_i440fx_0_12_machine_options(m); 959 m->hw_version = "0.11"; 960 m->deprecation_reason = "use a newer machine type instead"; 961 SET_MACHINE_COMPAT(m, PC_COMPAT_0_11); 962 } 963 964 DEFINE_I440FX_MACHINE(v0_11, "pc-0.11", pc_compat_0_13, 965 pc_i440fx_0_11_machine_options); 966 967 968 #define PC_COMPAT_0_10 \ 969 PC_CPU_MODEL_IDS("0.10") \ 970 {\ 971 .driver = "virtio-blk-pci",\ 972 .property = "class",\ 973 .value = stringify(PCI_CLASS_STORAGE_OTHER),\ 974 },{\ 975 .driver = "virtio-serial-pci",\ 976 .property = "class",\ 977 .value = stringify(PCI_CLASS_DISPLAY_OTHER),\ 978 },{\ 979 .driver = "virtio-net-pci",\ 980 .property = "vectors",\ 981 .value = stringify(0),\ 982 },{\ 983 .driver = "ide-drive",\ 984 .property = "ver",\ 985 .value = "0.10",\ 986 },{\ 987 .driver = "scsi-disk",\ 988 .property = "ver",\ 989 .value = "0.10",\ 990 }, 991 992 static void pc_i440fx_0_10_machine_options(MachineClass *m) 993 { 994 pc_i440fx_0_11_machine_options(m); 995 m->hw_version = "0.10"; 996 SET_MACHINE_COMPAT(m, PC_COMPAT_0_10); 997 } 998 999 DEFINE_I440FX_MACHINE(v0_10, "pc-0.10", pc_compat_0_13, 1000 pc_i440fx_0_10_machine_options); 1001 1002 typedef struct { 1003 uint16_t gpu_device_id; 1004 uint16_t pch_device_id; 1005 uint8_t pch_revision_id; 1006 } IGDDeviceIDInfo; 1007 1008 /* In real world different GPU should have different PCH. But actually 1009 * the different PCH DIDs likely map to different PCH SKUs. We do the 1010 * same thing for the GPU. For PCH, the different SKUs are going to be 1011 * all the same silicon design and implementation, just different 1012 * features turn on and off with fuses. The SW interfaces should be 1013 * consistent across all SKUs in a given family (eg LPT). But just same 1014 * features may not be supported. 1015 * 1016 * Most of these different PCH features probably don't matter to the 1017 * Gfx driver, but obviously any difference in display port connections 1018 * will so it should be fine with any PCH in case of passthrough. 1019 * 1020 * So currently use one PCH version, 0x8c4e, to cover all HSW(Haswell) 1021 * scenarios, 0x9cc3 for BDW(Broadwell). 1022 */ 1023 static const IGDDeviceIDInfo igd_combo_id_infos[] = { 1024 /* HSW Classic */ 1025 {0x0402, 0x8c4e, 0x04}, /* HSWGT1D, HSWD_w7 */ 1026 {0x0406, 0x8c4e, 0x04}, /* HSWGT1M, HSWM_w7 */ 1027 {0x0412, 0x8c4e, 0x04}, /* HSWGT2D, HSWD_w7 */ 1028 {0x0416, 0x8c4e, 0x04}, /* HSWGT2M, HSWM_w7 */ 1029 {0x041E, 0x8c4e, 0x04}, /* HSWGT15D, HSWD_w7 */ 1030 /* HSW ULT */ 1031 {0x0A06, 0x8c4e, 0x04}, /* HSWGT1UT, HSWM_w7 */ 1032 {0x0A16, 0x8c4e, 0x04}, /* HSWGT2UT, HSWM_w7 */ 1033 {0x0A26, 0x8c4e, 0x06}, /* HSWGT3UT, HSWM_w7 */ 1034 {0x0A2E, 0x8c4e, 0x04}, /* HSWGT3UT28W, HSWM_w7 */ 1035 {0x0A1E, 0x8c4e, 0x04}, /* HSWGT2UX, HSWM_w7 */ 1036 {0x0A0E, 0x8c4e, 0x04}, /* HSWGT1ULX, HSWM_w7 */ 1037 /* HSW CRW */ 1038 {0x0D26, 0x8c4e, 0x04}, /* HSWGT3CW, HSWM_w7 */ 1039 {0x0D22, 0x8c4e, 0x04}, /* HSWGT3CWDT, HSWD_w7 */ 1040 /* HSW Server */ 1041 {0x041A, 0x8c4e, 0x04}, /* HSWSVGT2, HSWD_w7 */ 1042 /* HSW SRVR */ 1043 {0x040A, 0x8c4e, 0x04}, /* HSWSVGT1, HSWD_w7 */ 1044 /* BSW */ 1045 {0x1606, 0x9cc3, 0x03}, /* BDWULTGT1, BDWM_w7 */ 1046 {0x1616, 0x9cc3, 0x03}, /* BDWULTGT2, BDWM_w7 */ 1047 {0x1626, 0x9cc3, 0x03}, /* BDWULTGT3, BDWM_w7 */ 1048 {0x160E, 0x9cc3, 0x03}, /* BDWULXGT1, BDWM_w7 */ 1049 {0x161E, 0x9cc3, 0x03}, /* BDWULXGT2, BDWM_w7 */ 1050 {0x1602, 0x9cc3, 0x03}, /* BDWHALOGT1, BDWM_w7 */ 1051 {0x1612, 0x9cc3, 0x03}, /* BDWHALOGT2, BDWM_w7 */ 1052 {0x1622, 0x9cc3, 0x03}, /* BDWHALOGT3, BDWM_w7 */ 1053 {0x162B, 0x9cc3, 0x03}, /* BDWHALO28W, BDWM_w7 */ 1054 {0x162A, 0x9cc3, 0x03}, /* BDWGT3WRKS, BDWM_w7 */ 1055 {0x162D, 0x9cc3, 0x03}, /* BDWGT3SRVR, BDWM_w7 */ 1056 }; 1057 1058 static void isa_bridge_class_init(ObjectClass *klass, void *data) 1059 { 1060 DeviceClass *dc = DEVICE_CLASS(klass); 1061 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 1062 1063 dc->desc = "ISA bridge faked to support IGD PT"; 1064 k->vendor_id = PCI_VENDOR_ID_INTEL; 1065 k->class_id = PCI_CLASS_BRIDGE_ISA; 1066 }; 1067 1068 static TypeInfo isa_bridge_info = { 1069 .name = "igd-passthrough-isa-bridge", 1070 .parent = TYPE_PCI_DEVICE, 1071 .instance_size = sizeof(PCIDevice), 1072 .class_init = isa_bridge_class_init, 1073 .interfaces = (InterfaceInfo[]) { 1074 { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 1075 { }, 1076 }, 1077 }; 1078 1079 static void pt_graphics_register_types(void) 1080 { 1081 type_register_static(&isa_bridge_info); 1082 } 1083 type_init(pt_graphics_register_types) 1084 1085 void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id) 1086 { 1087 struct PCIDevice *bridge_dev; 1088 int i, num; 1089 uint16_t pch_dev_id = 0xffff; 1090 uint8_t pch_rev_id; 1091 1092 num = ARRAY_SIZE(igd_combo_id_infos); 1093 for (i = 0; i < num; i++) { 1094 if (gpu_dev_id == igd_combo_id_infos[i].gpu_device_id) { 1095 pch_dev_id = igd_combo_id_infos[i].pch_device_id; 1096 pch_rev_id = igd_combo_id_infos[i].pch_revision_id; 1097 } 1098 } 1099 1100 if (pch_dev_id == 0xffff) { 1101 return; 1102 } 1103 1104 /* Currently IGD drivers always need to access PCH by 1f.0. */ 1105 bridge_dev = pci_create_simple(bus, PCI_DEVFN(0x1f, 0), 1106 "igd-passthrough-isa-bridge"); 1107 1108 /* 1109 * Note that vendor id is always PCI_VENDOR_ID_INTEL. 1110 */ 1111 if (!bridge_dev) { 1112 fprintf(stderr, "set igd-passthrough-isa-bridge failed!\n"); 1113 return; 1114 } 1115 pci_config_set_device_id(bridge_dev->config, pch_dev_id); 1116 pci_config_set_revision(bridge_dev->config, pch_rev_id); 1117 } 1118 1119 static void isapc_machine_options(MachineClass *m) 1120 { 1121 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 1122 m->desc = "ISA-only PC"; 1123 m->max_cpus = 1; 1124 m->option_rom_has_mr = true; 1125 m->rom_file_has_mr = false; 1126 pcmc->pci_enabled = false; 1127 pcmc->has_acpi_build = false; 1128 pcmc->smbios_defaults = false; 1129 pcmc->gigabyte_align = false; 1130 pcmc->smbios_legacy_mode = true; 1131 pcmc->has_reserved_memory = false; 1132 pcmc->default_nic_model = "ne2k_isa"; 1133 m->default_cpu_type = X86_CPU_TYPE_NAME("486"); 1134 } 1135 1136 DEFINE_PC_MACHINE(isapc, "isapc", pc_init_isa, 1137 isapc_machine_options); 1138 1139 1140 #ifdef CONFIG_XEN 1141 static void xenfv_machine_options(MachineClass *m) 1142 { 1143 m->desc = "Xen Fully-virtualized PC"; 1144 m->max_cpus = HVM_MAX_VCPUS; 1145 m->default_machine_opts = "accel=xen"; 1146 } 1147 1148 DEFINE_PC_MACHINE(xenfv, "xenfv", pc_xen_hvm_init, 1149 xenfv_machine_options); 1150 #endif 1151