1 /* 2 * QEMU PC System Emulator 3 * 4 * Copyright (c) 2003-2004 Fabrice Bellard 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 #include "qemu/osdep.h" 26 #include CONFIG_DEVICES 27 28 #include "qemu/units.h" 29 #include "hw/loader.h" 30 #include "hw/i386/x86.h" 31 #include "hw/i386/pc.h" 32 #include "hw/i386/apic.h" 33 #include "hw/pci-host/i440fx.h" 34 #include "hw/southbridge/piix.h" 35 #include "hw/display/ramfb.h" 36 #include "hw/firmware/smbios.h" 37 #include "hw/pci/pci.h" 38 #include "hw/pci/pci_ids.h" 39 #include "hw/usb.h" 40 #include "net/net.h" 41 #include "hw/ide/pci.h" 42 #include "hw/irq.h" 43 #include "sysemu/kvm.h" 44 #include "hw/kvm/clock.h" 45 #include "sysemu/sysemu.h" 46 #include "hw/sysbus.h" 47 #include "sysemu/arch_init.h" 48 #include "hw/i2c/smbus_eeprom.h" 49 #include "hw/xen/xen-x86.h" 50 #include "exec/memory.h" 51 #include "exec/address-spaces.h" 52 #include "hw/acpi/acpi.h" 53 #include "cpu.h" 54 #include "qapi/error.h" 55 #include "qemu/error-report.h" 56 #include "sysemu/xen.h" 57 #ifdef CONFIG_XEN 58 #include <xen/hvm/hvm_info_table.h> 59 #include "hw/xen/xen_pt.h" 60 #endif 61 #include "migration/global_state.h" 62 #include "migration/misc.h" 63 #include "sysemu/numa.h" 64 #include "hw/hyperv/vmbus-bridge.h" 65 #include "hw/mem/nvdimm.h" 66 #include "hw/i386/acpi-build.h" 67 68 #define MAX_IDE_BUS 2 69 70 #ifdef CONFIG_IDE_ISA 71 static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 }; 72 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 }; 73 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 }; 74 #endif 75 76 /* PC hardware initialisation */ 77 static void pc_init1(MachineState *machine, 78 const char *host_type, const char *pci_type) 79 { 80 PCMachineState *pcms = PC_MACHINE(machine); 81 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); 82 X86MachineState *x86ms = X86_MACHINE(machine); 83 MemoryRegion *system_memory = get_system_memory(); 84 MemoryRegion *system_io = get_system_io(); 85 PCIBus *pci_bus; 86 ISABus *isa_bus; 87 PCII440FXState *i440fx_state; 88 int piix3_devfn = -1; 89 qemu_irq smi_irq; 90 GSIState *gsi_state; 91 BusState *idebus[MAX_IDE_BUS]; 92 ISADevice *rtc_state; 93 MemoryRegion *ram_memory; 94 MemoryRegion *pci_memory; 95 MemoryRegion *rom_memory; 96 ram_addr_t lowmem; 97 98 /* 99 * Calculate ram split, for memory below and above 4G. It's a bit 100 * complicated for backward compatibility reasons ... 101 * 102 * - Traditional split is 3.5G (lowmem = 0xe0000000). This is the 103 * default value for max_ram_below_4g now. 104 * 105 * - Then, to gigabyte align the memory, we move the split to 3G 106 * (lowmem = 0xc0000000). But only in case we have to split in 107 * the first place, i.e. ram_size is larger than (traditional) 108 * lowmem. And for new machine types (gigabyte_align = true) 109 * only, for live migration compatibility reasons. 110 * 111 * - Next the max-ram-below-4g option was added, which allowed to 112 * reduce lowmem to a smaller value, to allow a larger PCI I/O 113 * window below 4G. qemu doesn't enforce gigabyte alignment here, 114 * but prints a warning. 115 * 116 * - Finally max-ram-below-4g got updated to also allow raising lowmem, 117 * so legacy non-PAE guests can get as much memory as possible in 118 * the 32bit address space below 4G. 119 * 120 * - Note that Xen has its own ram setup code in xen_ram_init(), 121 * called via xen_hvm_init_pc(). 122 * 123 * Examples: 124 * qemu -M pc-1.7 -m 4G (old default) -> 3584M low, 512M high 125 * qemu -M pc -m 4G (new default) -> 3072M low, 1024M high 126 * qemu -M pc,max-ram-below-4g=2G -m 4G -> 2048M low, 2048M high 127 * qemu -M pc,max-ram-below-4g=4G -m 3968M -> 3968M low (=4G-128M) 128 */ 129 if (xen_enabled()) { 130 xen_hvm_init_pc(pcms, &ram_memory); 131 } else { 132 if (!pcms->max_ram_below_4g) { 133 pcms->max_ram_below_4g = 0xe0000000; /* default: 3.5G */ 134 } 135 lowmem = pcms->max_ram_below_4g; 136 if (machine->ram_size >= pcms->max_ram_below_4g) { 137 if (pcmc->gigabyte_align) { 138 if (lowmem > 0xc0000000) { 139 lowmem = 0xc0000000; 140 } 141 if (lowmem & (1 * GiB - 1)) { 142 warn_report("Large machine and max_ram_below_4g " 143 "(%" PRIu64 ") not a multiple of 1G; " 144 "possible bad performance.", 145 pcms->max_ram_below_4g); 146 } 147 } 148 } 149 150 if (machine->ram_size >= lowmem) { 151 x86ms->above_4g_mem_size = machine->ram_size - lowmem; 152 x86ms->below_4g_mem_size = lowmem; 153 } else { 154 x86ms->above_4g_mem_size = 0; 155 x86ms->below_4g_mem_size = machine->ram_size; 156 } 157 } 158 159 x86_cpus_init(x86ms, pcmc->default_cpu_version); 160 161 if (pcmc->kvmclock_enabled) { 162 kvmclock_create(pcmc->kvmclock_create_always); 163 } 164 165 if (pcmc->pci_enabled) { 166 pci_memory = g_new(MemoryRegion, 1); 167 memory_region_init(pci_memory, NULL, "pci", UINT64_MAX); 168 rom_memory = pci_memory; 169 } else { 170 pci_memory = NULL; 171 rom_memory = system_memory; 172 } 173 174 pc_guest_info_init(pcms); 175 176 if (pcmc->smbios_defaults) { 177 MachineClass *mc = MACHINE_GET_CLASS(machine); 178 /* These values are guest ABI, do not change */ 179 smbios_set_defaults("QEMU", "Standard PC (i440FX + PIIX, 1996)", 180 mc->name, pcmc->smbios_legacy_mode, 181 pcmc->smbios_uuid_encoded, 182 SMBIOS_ENTRY_POINT_21); 183 } 184 185 /* allocate ram and load rom/bios */ 186 if (!xen_enabled()) { 187 pc_memory_init(pcms, system_memory, 188 rom_memory, &ram_memory); 189 } else { 190 pc_system_flash_cleanup_unused(pcms); 191 if (machine->kernel_filename != NULL) { 192 /* For xen HVM direct kernel boot, load linux here */ 193 xen_load_linux(pcms); 194 } 195 } 196 197 gsi_state = pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled); 198 199 if (pcmc->pci_enabled) { 200 PIIX3State *piix3; 201 202 pci_bus = i440fx_init(host_type, 203 pci_type, 204 &i440fx_state, 205 system_memory, system_io, machine->ram_size, 206 x86ms->below_4g_mem_size, 207 x86ms->above_4g_mem_size, 208 pci_memory, ram_memory); 209 pcms->bus = pci_bus; 210 211 piix3 = piix3_create(pci_bus, &isa_bus); 212 piix3->pic = x86ms->gsi; 213 piix3_devfn = piix3->dev.devfn; 214 } else { 215 pci_bus = NULL; 216 i440fx_state = NULL; 217 isa_bus = isa_bus_new(NULL, get_system_memory(), system_io, 218 &error_abort); 219 pcms->hpet_enabled = false; 220 } 221 isa_bus_irqs(isa_bus, x86ms->gsi); 222 223 pc_i8259_create(isa_bus, gsi_state->i8259_irq); 224 225 if (pcmc->pci_enabled) { 226 ioapic_init_gsi(gsi_state, "i440fx"); 227 } 228 229 if (tcg_enabled()) { 230 x86_register_ferr_irq(x86ms->gsi[13]); 231 } 232 233 pc_vga_init(isa_bus, pcmc->pci_enabled ? pci_bus : NULL); 234 235 assert(pcms->vmport != ON_OFF_AUTO__MAX); 236 if (pcms->vmport == ON_OFF_AUTO_AUTO) { 237 pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON; 238 } 239 240 /* init basic PC hardware */ 241 pc_basic_device_init(pcms, isa_bus, x86ms->gsi, &rtc_state, true, 242 0x4); 243 244 pc_nic_init(pcmc, isa_bus, pci_bus); 245 246 if (pcmc->pci_enabled) { 247 PCIDevice *dev; 248 249 dev = pci_create_simple(pci_bus, piix3_devfn + 1, 250 xen_enabled() ? "piix3-ide-xen" : "piix3-ide"); 251 pci_ide_create_devs(dev); 252 idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0"); 253 idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1"); 254 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state); 255 } 256 #ifdef CONFIG_IDE_ISA 257 else { 258 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; 259 int i; 260 261 ide_drive_get(hd, ARRAY_SIZE(hd)); 262 for (i = 0; i < MAX_IDE_BUS; i++) { 263 ISADevice *dev; 264 char busname[] = "ide.0"; 265 dev = isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i], 266 ide_irq[i], 267 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]); 268 /* 269 * The ide bus name is ide.0 for the first bus and ide.1 for the 270 * second one. 271 */ 272 busname[4] = '0' + i; 273 idebus[i] = qdev_get_child_bus(DEVICE(dev), busname); 274 } 275 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state); 276 } 277 #endif 278 279 if (pcmc->pci_enabled && machine_usb(machine)) { 280 pci_create_simple(pci_bus, piix3_devfn + 2, "piix3-usb-uhci"); 281 } 282 283 if (pcmc->pci_enabled && x86_machine_is_acpi_enabled(X86_MACHINE(pcms))) { 284 DeviceState *piix4_pm; 285 286 smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0); 287 /* TODO: Populate SPD eeprom data. */ 288 pcms->smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, 289 x86ms->gsi[9], smi_irq, 290 x86_machine_is_smm_enabled(x86ms), 291 &piix4_pm); 292 smbus_eeprom_init(pcms->smbus, 8, NULL, 0); 293 294 object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP, 295 TYPE_HOTPLUG_HANDLER, 296 (Object **)&x86ms->acpi_dev, 297 object_property_allow_set_link, 298 OBJ_PROP_LINK_STRONG); 299 object_property_set_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP, 300 OBJECT(piix4_pm), &error_abort); 301 } 302 303 if (machine->nvdimms_state->is_enabled) { 304 nvdimm_init_acpi_state(machine->nvdimms_state, system_io, 305 x86_nvdimm_acpi_dsmio, 306 x86ms->fw_cfg, OBJECT(pcms)); 307 } 308 } 309 310 /* Looking for a pc_compat_2_4() function? It doesn't exist. 311 * pc_compat_*() functions that run on machine-init time and 312 * change global QEMU state are deprecated. Please don't create 313 * one, and implement any pc-*-2.4 (and newer) compat code in 314 * hw_compat_*, pc_compat_*, or * pc_*_machine_options(). 315 */ 316 317 static void pc_compat_2_3_fn(MachineState *machine) 318 { 319 X86MachineState *x86ms = X86_MACHINE(machine); 320 if (kvm_enabled()) { 321 x86ms->smm = ON_OFF_AUTO_OFF; 322 } 323 } 324 325 static void pc_compat_2_2_fn(MachineState *machine) 326 { 327 pc_compat_2_3_fn(machine); 328 } 329 330 static void pc_compat_2_1_fn(MachineState *machine) 331 { 332 pc_compat_2_2_fn(machine); 333 x86_cpu_change_kvm_default("svm", NULL); 334 } 335 336 static void pc_compat_2_0_fn(MachineState *machine) 337 { 338 pc_compat_2_1_fn(machine); 339 } 340 341 static void pc_compat_1_7_fn(MachineState *machine) 342 { 343 pc_compat_2_0_fn(machine); 344 x86_cpu_change_kvm_default("x2apic", NULL); 345 } 346 347 static void pc_compat_1_6_fn(MachineState *machine) 348 { 349 pc_compat_1_7_fn(machine); 350 } 351 352 static void pc_compat_1_5_fn(MachineState *machine) 353 { 354 pc_compat_1_6_fn(machine); 355 } 356 357 static void pc_compat_1_4_fn(MachineState *machine) 358 { 359 pc_compat_1_5_fn(machine); 360 } 361 362 static void pc_init_isa(MachineState *machine) 363 { 364 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, TYPE_I440FX_PCI_DEVICE); 365 } 366 367 #ifdef CONFIG_XEN 368 static void pc_xen_hvm_init_pci(MachineState *machine) 369 { 370 const char *pci_type = xen_igd_gfx_pt_enabled() ? 371 TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE : TYPE_I440FX_PCI_DEVICE; 372 373 pc_init1(machine, 374 TYPE_I440FX_PCI_HOST_BRIDGE, 375 pci_type); 376 } 377 378 static void pc_xen_hvm_init(MachineState *machine) 379 { 380 PCMachineState *pcms = PC_MACHINE(machine); 381 382 if (!xen_enabled()) { 383 error_report("xenfv machine requires the xen accelerator"); 384 exit(1); 385 } 386 387 pc_xen_hvm_init_pci(machine); 388 pci_create_simple(pcms->bus, -1, "xen-platform"); 389 } 390 #endif 391 392 #define DEFINE_I440FX_MACHINE(suffix, name, compatfn, optionfn) \ 393 static void pc_init_##suffix(MachineState *machine) \ 394 { \ 395 void (*compat)(MachineState *m) = (compatfn); \ 396 if (compat) { \ 397 compat(machine); \ 398 } \ 399 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, \ 400 TYPE_I440FX_PCI_DEVICE); \ 401 } \ 402 DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn) 403 404 static void pc_i440fx_machine_options(MachineClass *m) 405 { 406 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 407 pcmc->default_nic_model = "e1000"; 408 pcmc->pci_root_uid = 0; 409 410 m->family = "pc_piix"; 411 m->desc = "Standard PC (i440FX + PIIX, 1996)"; 412 m->default_machine_opts = "firmware=bios-256k.bin"; 413 m->default_display = "std"; 414 machine_class_allow_dynamic_sysbus_dev(m, TYPE_RAMFB_DEVICE); 415 machine_class_allow_dynamic_sysbus_dev(m, TYPE_VMBUS_BRIDGE); 416 } 417 418 static void pc_i440fx_6_1_machine_options(MachineClass *m) 419 { 420 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 421 pc_i440fx_machine_options(m); 422 m->alias = "pc"; 423 m->is_default = true; 424 pcmc->default_cpu_version = 1; 425 } 426 427 DEFINE_I440FX_MACHINE(v6_1, "pc-i440fx-6.1", NULL, 428 pc_i440fx_6_1_machine_options); 429 430 static void pc_i440fx_6_0_machine_options(MachineClass *m) 431 { 432 pc_i440fx_6_1_machine_options(m); 433 m->alias = NULL; 434 m->is_default = false; 435 compat_props_add(m->compat_props, hw_compat_6_0, hw_compat_6_0_len); 436 compat_props_add(m->compat_props, pc_compat_6_0, pc_compat_6_0_len); 437 } 438 439 DEFINE_I440FX_MACHINE(v6_0, "pc-i440fx-6.0", NULL, 440 pc_i440fx_6_0_machine_options); 441 442 static void pc_i440fx_5_2_machine_options(MachineClass *m) 443 { 444 pc_i440fx_6_0_machine_options(m); 445 m->alias = NULL; 446 m->is_default = false; 447 compat_props_add(m->compat_props, hw_compat_5_2, hw_compat_5_2_len); 448 compat_props_add(m->compat_props, pc_compat_5_2, pc_compat_5_2_len); 449 } 450 451 DEFINE_I440FX_MACHINE(v5_2, "pc-i440fx-5.2", NULL, 452 pc_i440fx_5_2_machine_options); 453 454 static void pc_i440fx_5_1_machine_options(MachineClass *m) 455 { 456 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 457 458 pc_i440fx_5_2_machine_options(m); 459 m->alias = NULL; 460 m->is_default = false; 461 compat_props_add(m->compat_props, hw_compat_5_1, hw_compat_5_1_len); 462 compat_props_add(m->compat_props, pc_compat_5_1, pc_compat_5_1_len); 463 pcmc->kvmclock_create_always = false; 464 pcmc->pci_root_uid = 1; 465 } 466 467 DEFINE_I440FX_MACHINE(v5_1, "pc-i440fx-5.1", NULL, 468 pc_i440fx_5_1_machine_options); 469 470 static void pc_i440fx_5_0_machine_options(MachineClass *m) 471 { 472 pc_i440fx_5_1_machine_options(m); 473 m->alias = NULL; 474 m->is_default = false; 475 m->numa_mem_supported = true; 476 compat_props_add(m->compat_props, hw_compat_5_0, hw_compat_5_0_len); 477 compat_props_add(m->compat_props, pc_compat_5_0, pc_compat_5_0_len); 478 m->auto_enable_numa_with_memdev = false; 479 } 480 481 DEFINE_I440FX_MACHINE(v5_0, "pc-i440fx-5.0", NULL, 482 pc_i440fx_5_0_machine_options); 483 484 static void pc_i440fx_4_2_machine_options(MachineClass *m) 485 { 486 pc_i440fx_5_0_machine_options(m); 487 m->alias = NULL; 488 m->is_default = false; 489 compat_props_add(m->compat_props, hw_compat_4_2, hw_compat_4_2_len); 490 compat_props_add(m->compat_props, pc_compat_4_2, pc_compat_4_2_len); 491 } 492 493 DEFINE_I440FX_MACHINE(v4_2, "pc-i440fx-4.2", NULL, 494 pc_i440fx_4_2_machine_options); 495 496 static void pc_i440fx_4_1_machine_options(MachineClass *m) 497 { 498 pc_i440fx_4_2_machine_options(m); 499 m->alias = NULL; 500 m->is_default = false; 501 compat_props_add(m->compat_props, hw_compat_4_1, hw_compat_4_1_len); 502 compat_props_add(m->compat_props, pc_compat_4_1, pc_compat_4_1_len); 503 } 504 505 DEFINE_I440FX_MACHINE(v4_1, "pc-i440fx-4.1", NULL, 506 pc_i440fx_4_1_machine_options); 507 508 static void pc_i440fx_4_0_machine_options(MachineClass *m) 509 { 510 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 511 pc_i440fx_4_1_machine_options(m); 512 m->alias = NULL; 513 m->is_default = false; 514 pcmc->default_cpu_version = CPU_VERSION_LEGACY; 515 compat_props_add(m->compat_props, hw_compat_4_0, hw_compat_4_0_len); 516 compat_props_add(m->compat_props, pc_compat_4_0, pc_compat_4_0_len); 517 } 518 519 DEFINE_I440FX_MACHINE(v4_0, "pc-i440fx-4.0", NULL, 520 pc_i440fx_4_0_machine_options); 521 522 static void pc_i440fx_3_1_machine_options(MachineClass *m) 523 { 524 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 525 526 pc_i440fx_4_0_machine_options(m); 527 m->is_default = false; 528 pcmc->do_not_add_smb_acpi = true; 529 m->smbus_no_migration_support = true; 530 m->alias = NULL; 531 pcmc->pvh_enabled = false; 532 compat_props_add(m->compat_props, hw_compat_3_1, hw_compat_3_1_len); 533 compat_props_add(m->compat_props, pc_compat_3_1, pc_compat_3_1_len); 534 } 535 536 DEFINE_I440FX_MACHINE(v3_1, "pc-i440fx-3.1", NULL, 537 pc_i440fx_3_1_machine_options); 538 539 static void pc_i440fx_3_0_machine_options(MachineClass *m) 540 { 541 pc_i440fx_3_1_machine_options(m); 542 compat_props_add(m->compat_props, hw_compat_3_0, hw_compat_3_0_len); 543 compat_props_add(m->compat_props, pc_compat_3_0, pc_compat_3_0_len); 544 } 545 546 DEFINE_I440FX_MACHINE(v3_0, "pc-i440fx-3.0", NULL, 547 pc_i440fx_3_0_machine_options); 548 549 static void pc_i440fx_2_12_machine_options(MachineClass *m) 550 { 551 pc_i440fx_3_0_machine_options(m); 552 compat_props_add(m->compat_props, hw_compat_2_12, hw_compat_2_12_len); 553 compat_props_add(m->compat_props, pc_compat_2_12, pc_compat_2_12_len); 554 } 555 556 DEFINE_I440FX_MACHINE(v2_12, "pc-i440fx-2.12", NULL, 557 pc_i440fx_2_12_machine_options); 558 559 static void pc_i440fx_2_11_machine_options(MachineClass *m) 560 { 561 pc_i440fx_2_12_machine_options(m); 562 compat_props_add(m->compat_props, hw_compat_2_11, hw_compat_2_11_len); 563 compat_props_add(m->compat_props, pc_compat_2_11, pc_compat_2_11_len); 564 } 565 566 DEFINE_I440FX_MACHINE(v2_11, "pc-i440fx-2.11", NULL, 567 pc_i440fx_2_11_machine_options); 568 569 static void pc_i440fx_2_10_machine_options(MachineClass *m) 570 { 571 pc_i440fx_2_11_machine_options(m); 572 compat_props_add(m->compat_props, hw_compat_2_10, hw_compat_2_10_len); 573 compat_props_add(m->compat_props, pc_compat_2_10, pc_compat_2_10_len); 574 m->auto_enable_numa_with_memhp = false; 575 } 576 577 DEFINE_I440FX_MACHINE(v2_10, "pc-i440fx-2.10", NULL, 578 pc_i440fx_2_10_machine_options); 579 580 static void pc_i440fx_2_9_machine_options(MachineClass *m) 581 { 582 pc_i440fx_2_10_machine_options(m); 583 compat_props_add(m->compat_props, hw_compat_2_9, hw_compat_2_9_len); 584 compat_props_add(m->compat_props, pc_compat_2_9, pc_compat_2_9_len); 585 } 586 587 DEFINE_I440FX_MACHINE(v2_9, "pc-i440fx-2.9", NULL, 588 pc_i440fx_2_9_machine_options); 589 590 static void pc_i440fx_2_8_machine_options(MachineClass *m) 591 { 592 pc_i440fx_2_9_machine_options(m); 593 compat_props_add(m->compat_props, hw_compat_2_8, hw_compat_2_8_len); 594 compat_props_add(m->compat_props, pc_compat_2_8, pc_compat_2_8_len); 595 } 596 597 DEFINE_I440FX_MACHINE(v2_8, "pc-i440fx-2.8", NULL, 598 pc_i440fx_2_8_machine_options); 599 600 static void pc_i440fx_2_7_machine_options(MachineClass *m) 601 { 602 pc_i440fx_2_8_machine_options(m); 603 compat_props_add(m->compat_props, hw_compat_2_7, hw_compat_2_7_len); 604 compat_props_add(m->compat_props, pc_compat_2_7, pc_compat_2_7_len); 605 } 606 607 DEFINE_I440FX_MACHINE(v2_7, "pc-i440fx-2.7", NULL, 608 pc_i440fx_2_7_machine_options); 609 610 static void pc_i440fx_2_6_machine_options(MachineClass *m) 611 { 612 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 613 614 pc_i440fx_2_7_machine_options(m); 615 pcmc->legacy_cpu_hotplug = true; 616 pcmc->linuxboot_dma_enabled = false; 617 compat_props_add(m->compat_props, hw_compat_2_6, hw_compat_2_6_len); 618 compat_props_add(m->compat_props, pc_compat_2_6, pc_compat_2_6_len); 619 } 620 621 DEFINE_I440FX_MACHINE(v2_6, "pc-i440fx-2.6", NULL, 622 pc_i440fx_2_6_machine_options); 623 624 static void pc_i440fx_2_5_machine_options(MachineClass *m) 625 { 626 X86MachineClass *x86mc = X86_MACHINE_CLASS(m); 627 628 pc_i440fx_2_6_machine_options(m); 629 x86mc->save_tsc_khz = false; 630 m->legacy_fw_cfg_order = 1; 631 compat_props_add(m->compat_props, hw_compat_2_5, hw_compat_2_5_len); 632 compat_props_add(m->compat_props, pc_compat_2_5, pc_compat_2_5_len); 633 } 634 635 DEFINE_I440FX_MACHINE(v2_5, "pc-i440fx-2.5", NULL, 636 pc_i440fx_2_5_machine_options); 637 638 static void pc_i440fx_2_4_machine_options(MachineClass *m) 639 { 640 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 641 642 pc_i440fx_2_5_machine_options(m); 643 m->hw_version = "2.4.0"; 644 pcmc->broken_reserved_end = true; 645 compat_props_add(m->compat_props, hw_compat_2_4, hw_compat_2_4_len); 646 compat_props_add(m->compat_props, pc_compat_2_4, pc_compat_2_4_len); 647 } 648 649 DEFINE_I440FX_MACHINE(v2_4, "pc-i440fx-2.4", NULL, 650 pc_i440fx_2_4_machine_options) 651 652 static void pc_i440fx_2_3_machine_options(MachineClass *m) 653 { 654 pc_i440fx_2_4_machine_options(m); 655 m->hw_version = "2.3.0"; 656 compat_props_add(m->compat_props, hw_compat_2_3, hw_compat_2_3_len); 657 compat_props_add(m->compat_props, pc_compat_2_3, pc_compat_2_3_len); 658 } 659 660 DEFINE_I440FX_MACHINE(v2_3, "pc-i440fx-2.3", pc_compat_2_3_fn, 661 pc_i440fx_2_3_machine_options); 662 663 static void pc_i440fx_2_2_machine_options(MachineClass *m) 664 { 665 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 666 667 pc_i440fx_2_3_machine_options(m); 668 m->hw_version = "2.2.0"; 669 m->default_machine_opts = "firmware=bios-256k.bin,suppress-vmdesc=on"; 670 compat_props_add(m->compat_props, hw_compat_2_2, hw_compat_2_2_len); 671 compat_props_add(m->compat_props, pc_compat_2_2, pc_compat_2_2_len); 672 pcmc->rsdp_in_ram = false; 673 } 674 675 DEFINE_I440FX_MACHINE(v2_2, "pc-i440fx-2.2", pc_compat_2_2_fn, 676 pc_i440fx_2_2_machine_options); 677 678 static void pc_i440fx_2_1_machine_options(MachineClass *m) 679 { 680 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 681 682 pc_i440fx_2_2_machine_options(m); 683 m->hw_version = "2.1.0"; 684 m->default_display = NULL; 685 compat_props_add(m->compat_props, hw_compat_2_1, hw_compat_2_1_len); 686 compat_props_add(m->compat_props, pc_compat_2_1, pc_compat_2_1_len); 687 pcmc->smbios_uuid_encoded = false; 688 pcmc->enforce_aligned_dimm = false; 689 } 690 691 DEFINE_I440FX_MACHINE(v2_1, "pc-i440fx-2.1", pc_compat_2_1_fn, 692 pc_i440fx_2_1_machine_options); 693 694 static void pc_i440fx_2_0_machine_options(MachineClass *m) 695 { 696 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 697 698 pc_i440fx_2_1_machine_options(m); 699 m->hw_version = "2.0.0"; 700 compat_props_add(m->compat_props, pc_compat_2_0, pc_compat_2_0_len); 701 pcmc->smbios_legacy_mode = true; 702 pcmc->has_reserved_memory = false; 703 /* This value depends on the actual DSDT and SSDT compiled into 704 * the source QEMU; unfortunately it depends on the binary and 705 * not on the machine type, so we cannot make pc-i440fx-1.7 work on 706 * both QEMU 1.7 and QEMU 2.0. 707 * 708 * Large variations cause migration to fail for more than one 709 * consecutive value of the "-smp" maxcpus option. 710 * 711 * For small variations of the kind caused by different iasl versions, 712 * the 4k rounding usually leaves slack. However, there could be still 713 * one or two values that break. For QEMU 1.7 and QEMU 2.0 the 714 * slack is only ~10 bytes before one "-smp maxcpus" value breaks! 715 * 716 * 6652 is valid for QEMU 2.0, the right value for pc-i440fx-1.7 on 717 * QEMU 1.7 it is 6414. For RHEL/CentOS 7.0 it is 6418. 718 */ 719 pcmc->legacy_acpi_table_size = 6652; 720 pcmc->acpi_data_size = 0x10000; 721 } 722 723 DEFINE_I440FX_MACHINE(v2_0, "pc-i440fx-2.0", pc_compat_2_0_fn, 724 pc_i440fx_2_0_machine_options); 725 726 static void pc_i440fx_1_7_machine_options(MachineClass *m) 727 { 728 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 729 730 pc_i440fx_2_0_machine_options(m); 731 m->hw_version = "1.7.0"; 732 m->default_machine_opts = NULL; 733 m->option_rom_has_mr = true; 734 compat_props_add(m->compat_props, pc_compat_1_7, pc_compat_1_7_len); 735 pcmc->smbios_defaults = false; 736 pcmc->gigabyte_align = false; 737 pcmc->legacy_acpi_table_size = 6414; 738 } 739 740 DEFINE_I440FX_MACHINE(v1_7, "pc-i440fx-1.7", pc_compat_1_7_fn, 741 pc_i440fx_1_7_machine_options); 742 743 static void pc_i440fx_1_6_machine_options(MachineClass *m) 744 { 745 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 746 747 pc_i440fx_1_7_machine_options(m); 748 m->hw_version = "1.6.0"; 749 m->rom_file_has_mr = false; 750 compat_props_add(m->compat_props, pc_compat_1_6, pc_compat_1_6_len); 751 pcmc->has_acpi_build = false; 752 } 753 754 DEFINE_I440FX_MACHINE(v1_6, "pc-i440fx-1.6", pc_compat_1_6_fn, 755 pc_i440fx_1_6_machine_options); 756 757 static void pc_i440fx_1_5_machine_options(MachineClass *m) 758 { 759 pc_i440fx_1_6_machine_options(m); 760 m->hw_version = "1.5.0"; 761 compat_props_add(m->compat_props, pc_compat_1_5, pc_compat_1_5_len); 762 } 763 764 DEFINE_I440FX_MACHINE(v1_5, "pc-i440fx-1.5", pc_compat_1_5_fn, 765 pc_i440fx_1_5_machine_options); 766 767 static void pc_i440fx_1_4_machine_options(MachineClass *m) 768 { 769 pc_i440fx_1_5_machine_options(m); 770 m->hw_version = "1.4.0"; 771 compat_props_add(m->compat_props, pc_compat_1_4, pc_compat_1_4_len); 772 } 773 774 DEFINE_I440FX_MACHINE(v1_4, "pc-i440fx-1.4", pc_compat_1_4_fn, 775 pc_i440fx_1_4_machine_options); 776 777 typedef struct { 778 uint16_t gpu_device_id; 779 uint16_t pch_device_id; 780 uint8_t pch_revision_id; 781 } IGDDeviceIDInfo; 782 783 /* In real world different GPU should have different PCH. But actually 784 * the different PCH DIDs likely map to different PCH SKUs. We do the 785 * same thing for the GPU. For PCH, the different SKUs are going to be 786 * all the same silicon design and implementation, just different 787 * features turn on and off with fuses. The SW interfaces should be 788 * consistent across all SKUs in a given family (eg LPT). But just same 789 * features may not be supported. 790 * 791 * Most of these different PCH features probably don't matter to the 792 * Gfx driver, but obviously any difference in display port connections 793 * will so it should be fine with any PCH in case of passthrough. 794 * 795 * So currently use one PCH version, 0x8c4e, to cover all HSW(Haswell) 796 * scenarios, 0x9cc3 for BDW(Broadwell). 797 */ 798 static const IGDDeviceIDInfo igd_combo_id_infos[] = { 799 /* HSW Classic */ 800 {0x0402, 0x8c4e, 0x04}, /* HSWGT1D, HSWD_w7 */ 801 {0x0406, 0x8c4e, 0x04}, /* HSWGT1M, HSWM_w7 */ 802 {0x0412, 0x8c4e, 0x04}, /* HSWGT2D, HSWD_w7 */ 803 {0x0416, 0x8c4e, 0x04}, /* HSWGT2M, HSWM_w7 */ 804 {0x041E, 0x8c4e, 0x04}, /* HSWGT15D, HSWD_w7 */ 805 /* HSW ULT */ 806 {0x0A06, 0x8c4e, 0x04}, /* HSWGT1UT, HSWM_w7 */ 807 {0x0A16, 0x8c4e, 0x04}, /* HSWGT2UT, HSWM_w7 */ 808 {0x0A26, 0x8c4e, 0x06}, /* HSWGT3UT, HSWM_w7 */ 809 {0x0A2E, 0x8c4e, 0x04}, /* HSWGT3UT28W, HSWM_w7 */ 810 {0x0A1E, 0x8c4e, 0x04}, /* HSWGT2UX, HSWM_w7 */ 811 {0x0A0E, 0x8c4e, 0x04}, /* HSWGT1ULX, HSWM_w7 */ 812 /* HSW CRW */ 813 {0x0D26, 0x8c4e, 0x04}, /* HSWGT3CW, HSWM_w7 */ 814 {0x0D22, 0x8c4e, 0x04}, /* HSWGT3CWDT, HSWD_w7 */ 815 /* HSW Server */ 816 {0x041A, 0x8c4e, 0x04}, /* HSWSVGT2, HSWD_w7 */ 817 /* HSW SRVR */ 818 {0x040A, 0x8c4e, 0x04}, /* HSWSVGT1, HSWD_w7 */ 819 /* BSW */ 820 {0x1606, 0x9cc3, 0x03}, /* BDWULTGT1, BDWM_w7 */ 821 {0x1616, 0x9cc3, 0x03}, /* BDWULTGT2, BDWM_w7 */ 822 {0x1626, 0x9cc3, 0x03}, /* BDWULTGT3, BDWM_w7 */ 823 {0x160E, 0x9cc3, 0x03}, /* BDWULXGT1, BDWM_w7 */ 824 {0x161E, 0x9cc3, 0x03}, /* BDWULXGT2, BDWM_w7 */ 825 {0x1602, 0x9cc3, 0x03}, /* BDWHALOGT1, BDWM_w7 */ 826 {0x1612, 0x9cc3, 0x03}, /* BDWHALOGT2, BDWM_w7 */ 827 {0x1622, 0x9cc3, 0x03}, /* BDWHALOGT3, BDWM_w7 */ 828 {0x162B, 0x9cc3, 0x03}, /* BDWHALO28W, BDWM_w7 */ 829 {0x162A, 0x9cc3, 0x03}, /* BDWGT3WRKS, BDWM_w7 */ 830 {0x162D, 0x9cc3, 0x03}, /* BDWGT3SRVR, BDWM_w7 */ 831 }; 832 833 static void isa_bridge_class_init(ObjectClass *klass, void *data) 834 { 835 DeviceClass *dc = DEVICE_CLASS(klass); 836 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 837 838 dc->desc = "ISA bridge faked to support IGD PT"; 839 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); 840 k->vendor_id = PCI_VENDOR_ID_INTEL; 841 k->class_id = PCI_CLASS_BRIDGE_ISA; 842 }; 843 844 static TypeInfo isa_bridge_info = { 845 .name = "igd-passthrough-isa-bridge", 846 .parent = TYPE_PCI_DEVICE, 847 .instance_size = sizeof(PCIDevice), 848 .class_init = isa_bridge_class_init, 849 .interfaces = (InterfaceInfo[]) { 850 { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 851 { }, 852 }, 853 }; 854 855 static void pt_graphics_register_types(void) 856 { 857 type_register_static(&isa_bridge_info); 858 } 859 type_init(pt_graphics_register_types) 860 861 void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id) 862 { 863 struct PCIDevice *bridge_dev; 864 int i, num; 865 uint16_t pch_dev_id = 0xffff; 866 uint8_t pch_rev_id = 0; 867 868 num = ARRAY_SIZE(igd_combo_id_infos); 869 for (i = 0; i < num; i++) { 870 if (gpu_dev_id == igd_combo_id_infos[i].gpu_device_id) { 871 pch_dev_id = igd_combo_id_infos[i].pch_device_id; 872 pch_rev_id = igd_combo_id_infos[i].pch_revision_id; 873 } 874 } 875 876 if (pch_dev_id == 0xffff) { 877 return; 878 } 879 880 /* Currently IGD drivers always need to access PCH by 1f.0. */ 881 bridge_dev = pci_create_simple(bus, PCI_DEVFN(0x1f, 0), 882 "igd-passthrough-isa-bridge"); 883 884 /* 885 * Note that vendor id is always PCI_VENDOR_ID_INTEL. 886 */ 887 if (!bridge_dev) { 888 fprintf(stderr, "set igd-passthrough-isa-bridge failed!\n"); 889 return; 890 } 891 pci_config_set_device_id(bridge_dev->config, pch_dev_id); 892 pci_config_set_revision(bridge_dev->config, pch_rev_id); 893 } 894 895 static void isapc_machine_options(MachineClass *m) 896 { 897 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 898 m->desc = "ISA-only PC"; 899 m->max_cpus = 1; 900 m->option_rom_has_mr = true; 901 m->rom_file_has_mr = false; 902 pcmc->pci_enabled = false; 903 pcmc->has_acpi_build = false; 904 pcmc->smbios_defaults = false; 905 pcmc->gigabyte_align = false; 906 pcmc->smbios_legacy_mode = true; 907 pcmc->has_reserved_memory = false; 908 pcmc->default_nic_model = "ne2k_isa"; 909 m->default_cpu_type = X86_CPU_TYPE_NAME("486"); 910 } 911 912 DEFINE_PC_MACHINE(isapc, "isapc", pc_init_isa, 913 isapc_machine_options); 914 915 916 #ifdef CONFIG_XEN 917 static void xenfv_4_2_machine_options(MachineClass *m) 918 { 919 pc_i440fx_4_2_machine_options(m); 920 m->desc = "Xen Fully-virtualized PC"; 921 m->max_cpus = HVM_MAX_VCPUS; 922 m->default_machine_opts = "accel=xen,suppress-vmdesc=on"; 923 } 924 925 DEFINE_PC_MACHINE(xenfv_4_2, "xenfv-4.2", pc_xen_hvm_init, 926 xenfv_4_2_machine_options); 927 928 static void xenfv_3_1_machine_options(MachineClass *m) 929 { 930 pc_i440fx_3_1_machine_options(m); 931 m->desc = "Xen Fully-virtualized PC"; 932 m->alias = "xenfv"; 933 m->max_cpus = HVM_MAX_VCPUS; 934 m->default_machine_opts = "accel=xen,suppress-vmdesc=on"; 935 } 936 937 DEFINE_PC_MACHINE(xenfv, "xenfv-3.1", pc_xen_hvm_init, 938 xenfv_3_1_machine_options); 939 #endif 940