1 /* 2 * QEMU PC System Emulator 3 * 4 * Copyright (c) 2003-2004 Fabrice Bellard 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 #include "qemu/osdep.h" 26 #include CONFIG_DEVICES 27 28 #include "qemu/units.h" 29 #include "hw/char/parallel-isa.h" 30 #include "hw/dma/i8257.h" 31 #include "hw/loader.h" 32 #include "hw/i386/x86.h" 33 #include "hw/i386/pc.h" 34 #include "hw/i386/apic.h" 35 #include "hw/pci-host/i440fx.h" 36 #include "hw/rtc/mc146818rtc.h" 37 #include "hw/southbridge/piix.h" 38 #include "hw/display/ramfb.h" 39 #include "hw/pci/pci.h" 40 #include "hw/pci/pci_ids.h" 41 #include "hw/usb.h" 42 #include "net/net.h" 43 #include "hw/ide/isa.h" 44 #include "hw/ide/pci.h" 45 #include "hw/irq.h" 46 #include "sysemu/kvm.h" 47 #include "hw/i386/kvm/clock.h" 48 #include "hw/sysbus.h" 49 #include "hw/i2c/smbus_eeprom.h" 50 #include "exec/memory.h" 51 #include "hw/acpi/acpi.h" 52 #include "qapi/error.h" 53 #include "qemu/error-report.h" 54 #include "sysemu/xen.h" 55 #ifdef CONFIG_XEN 56 #include <xen/hvm/hvm_info_table.h> 57 #include "hw/xen/xen_pt.h" 58 #include "hw/xen/xen_igd.h" 59 #endif 60 #include "hw/xen/xen-x86.h" 61 #include "hw/xen/xen.h" 62 #include "migration/global_state.h" 63 #include "migration/misc.h" 64 #include "sysemu/runstate.h" 65 #include "sysemu/numa.h" 66 #include "hw/hyperv/vmbus-bridge.h" 67 #include "hw/mem/nvdimm.h" 68 #include "hw/i386/acpi-build.h" 69 #include "kvm/kvm-cpu.h" 70 #include "target/i386/cpu.h" 71 72 #define XEN_IOAPIC_NUM_PIRQS 128ULL 73 74 #ifdef CONFIG_IDE_ISA 75 static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 }; 76 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 }; 77 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 }; 78 #endif 79 80 /* 81 * Return the global irq number corresponding to a given device irq 82 * pin. We could also use the bus number to have a more precise mapping. 83 */ 84 static int pc_pci_slot_get_pirq(PCIDevice *pci_dev, int pci_intx) 85 { 86 int slot_addend; 87 slot_addend = PCI_SLOT(pci_dev->devfn) - 1; 88 return (pci_intx + slot_addend) & 3; 89 } 90 91 static void piix_intx_routing_notifier_xen(PCIDevice *dev) 92 { 93 int i; 94 95 /* Scan for updates to PCI link routes. */ 96 for (i = 0; i < PIIX_NUM_PIRQS; i++) { 97 const PCIINTxRoute route = pci_device_route_intx_to_irq(dev, i); 98 const uint8_t v = route.mode == PCI_INTX_ENABLED ? route.irq : 0; 99 xen_set_pci_link_route(i, v); 100 } 101 } 102 103 /* PC hardware initialisation */ 104 static void pc_init1(MachineState *machine, const char *pci_type) 105 { 106 PCMachineState *pcms = PC_MACHINE(machine); 107 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); 108 X86MachineState *x86ms = X86_MACHINE(machine); 109 MemoryRegion *system_memory = get_system_memory(); 110 MemoryRegion *system_io = get_system_io(); 111 Object *phb = NULL; 112 ISABus *isa_bus; 113 Object *piix4_pm = NULL; 114 qemu_irq smi_irq; 115 GSIState *gsi_state; 116 MemoryRegion *ram_memory; 117 MemoryRegion *pci_memory = NULL; 118 MemoryRegion *rom_memory = system_memory; 119 ram_addr_t lowmem; 120 uint64_t hole64_size = 0; 121 122 /* 123 * Calculate ram split, for memory below and above 4G. It's a bit 124 * complicated for backward compatibility reasons ... 125 * 126 * - Traditional split is 3.5G (lowmem = 0xe0000000). This is the 127 * default value for max_ram_below_4g now. 128 * 129 * - Then, to gigabyte align the memory, we move the split to 3G 130 * (lowmem = 0xc0000000). But only in case we have to split in 131 * the first place, i.e. ram_size is larger than (traditional) 132 * lowmem. And for new machine types (gigabyte_align = true) 133 * only, for live migration compatibility reasons. 134 * 135 * - Next the max-ram-below-4g option was added, which allowed to 136 * reduce lowmem to a smaller value, to allow a larger PCI I/O 137 * window below 4G. qemu doesn't enforce gigabyte alignment here, 138 * but prints a warning. 139 * 140 * - Finally max-ram-below-4g got updated to also allow raising lowmem, 141 * so legacy non-PAE guests can get as much memory as possible in 142 * the 32bit address space below 4G. 143 * 144 * - Note that Xen has its own ram setup code in xen_ram_init(), 145 * called via xen_hvm_init_pc(). 146 * 147 * Examples: 148 * qemu -M pc-1.7 -m 4G (old default) -> 3584M low, 512M high 149 * qemu -M pc -m 4G (new default) -> 3072M low, 1024M high 150 * qemu -M pc,max-ram-below-4g=2G -m 4G -> 2048M low, 2048M high 151 * qemu -M pc,max-ram-below-4g=4G -m 3968M -> 3968M low (=4G-128M) 152 */ 153 if (xen_enabled()) { 154 xen_hvm_init_pc(pcms, &ram_memory); 155 } else { 156 ram_memory = machine->ram; 157 if (!pcms->max_ram_below_4g) { 158 pcms->max_ram_below_4g = 0xe0000000; /* default: 3.5G */ 159 } 160 lowmem = pcms->max_ram_below_4g; 161 if (machine->ram_size >= pcms->max_ram_below_4g) { 162 if (pcmc->gigabyte_align) { 163 if (lowmem > 0xc0000000) { 164 lowmem = 0xc0000000; 165 } 166 if (lowmem & (1 * GiB - 1)) { 167 warn_report("Large machine and max_ram_below_4g " 168 "(%" PRIu64 ") not a multiple of 1G; " 169 "possible bad performance.", 170 pcms->max_ram_below_4g); 171 } 172 } 173 } 174 175 if (machine->ram_size >= lowmem) { 176 x86ms->above_4g_mem_size = machine->ram_size - lowmem; 177 x86ms->below_4g_mem_size = lowmem; 178 } else { 179 x86ms->above_4g_mem_size = 0; 180 x86ms->below_4g_mem_size = machine->ram_size; 181 } 182 } 183 184 pc_machine_init_sgx_epc(pcms); 185 x86_cpus_init(x86ms, pcmc->default_cpu_version); 186 187 if (kvm_enabled()) { 188 kvmclock_create(pcmc->kvmclock_create_always); 189 } 190 191 if (pcmc->pci_enabled) { 192 pci_memory = g_new(MemoryRegion, 1); 193 memory_region_init(pci_memory, NULL, "pci", UINT64_MAX); 194 rom_memory = pci_memory; 195 196 phb = OBJECT(qdev_new(TYPE_I440FX_PCI_HOST_BRIDGE)); 197 object_property_add_child(OBJECT(machine), "i440fx", phb); 198 object_property_set_link(phb, PCI_HOST_PROP_RAM_MEM, 199 OBJECT(ram_memory), &error_fatal); 200 object_property_set_link(phb, PCI_HOST_PROP_PCI_MEM, 201 OBJECT(pci_memory), &error_fatal); 202 object_property_set_link(phb, PCI_HOST_PROP_SYSTEM_MEM, 203 OBJECT(system_memory), &error_fatal); 204 object_property_set_link(phb, PCI_HOST_PROP_IO_MEM, 205 OBJECT(system_io), &error_fatal); 206 object_property_set_uint(phb, PCI_HOST_BELOW_4G_MEM_SIZE, 207 x86ms->below_4g_mem_size, &error_fatal); 208 object_property_set_uint(phb, PCI_HOST_ABOVE_4G_MEM_SIZE, 209 x86ms->above_4g_mem_size, &error_fatal); 210 object_property_set_str(phb, I440FX_HOST_PROP_PCI_TYPE, pci_type, 211 &error_fatal); 212 sysbus_realize_and_unref(SYS_BUS_DEVICE(phb), &error_fatal); 213 214 pcms->pcibus = PCI_BUS(qdev_get_child_bus(DEVICE(phb), "pci.0")); 215 pci_bus_map_irqs(pcms->pcibus, 216 xen_enabled() ? xen_pci_slot_get_pirq 217 : pc_pci_slot_get_pirq); 218 219 hole64_size = object_property_get_uint(phb, 220 PCI_HOST_PROP_PCI_HOLE64_SIZE, 221 &error_abort); 222 } 223 224 /* allocate ram and load rom/bios */ 225 if (!xen_enabled()) { 226 pc_memory_init(pcms, system_memory, rom_memory, hole64_size); 227 } else { 228 assert(machine->ram_size == x86ms->below_4g_mem_size + 229 x86ms->above_4g_mem_size); 230 231 if (machine->kernel_filename != NULL) { 232 /* For xen HVM direct kernel boot, load linux here */ 233 xen_load_linux(pcms); 234 } 235 } 236 237 gsi_state = pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled); 238 239 if (pcmc->pci_enabled) { 240 PCIDevice *pci_dev; 241 DeviceState *dev; 242 size_t i; 243 244 pci_dev = pci_new_multifunction(-1, pcms->south_bridge); 245 object_property_set_bool(OBJECT(pci_dev), "has-usb", 246 machine_usb(machine), &error_abort); 247 object_property_set_bool(OBJECT(pci_dev), "has-acpi", 248 x86_machine_is_acpi_enabled(x86ms), 249 &error_abort); 250 object_property_set_bool(OBJECT(pci_dev), "has-pic", false, 251 &error_abort); 252 object_property_set_bool(OBJECT(pci_dev), "has-pit", false, 253 &error_abort); 254 qdev_prop_set_uint32(DEVICE(pci_dev), "smb_io_base", 0xb100); 255 object_property_set_bool(OBJECT(pci_dev), "smm-enabled", 256 x86_machine_is_smm_enabled(x86ms), 257 &error_abort); 258 dev = DEVICE(pci_dev); 259 for (i = 0; i < ISA_NUM_IRQS; i++) { 260 qdev_connect_gpio_out_named(dev, "isa-irqs", i, x86ms->gsi[i]); 261 } 262 pci_realize_and_unref(pci_dev, pcms->pcibus, &error_fatal); 263 264 if (xen_enabled()) { 265 pci_device_set_intx_routing_notifier( 266 pci_dev, piix_intx_routing_notifier_xen); 267 268 /* 269 * Xen supports additional interrupt routes from the PCI devices to 270 * the IOAPIC: the four pins of each PCI device on the bus are also 271 * connected to the IOAPIC directly. 272 * These additional routes can be discovered through ACPI. 273 */ 274 pci_bus_irqs(pcms->pcibus, xen_intx_set_irq, pci_dev, 275 XEN_IOAPIC_NUM_PIRQS); 276 } 277 278 isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(pci_dev), "isa.0")); 279 x86ms->rtc = ISA_DEVICE(object_resolve_path_component(OBJECT(pci_dev), 280 "rtc")); 281 piix4_pm = object_resolve_path_component(OBJECT(pci_dev), "pm"); 282 dev = DEVICE(object_resolve_path_component(OBJECT(pci_dev), "ide")); 283 pci_ide_create_devs(PCI_DEVICE(dev)); 284 pcms->idebus[0] = qdev_get_child_bus(dev, "ide.0"); 285 pcms->idebus[1] = qdev_get_child_bus(dev, "ide.1"); 286 } else { 287 isa_bus = isa_bus_new(NULL, system_memory, system_io, 288 &error_abort); 289 isa_bus_register_input_irqs(isa_bus, x86ms->gsi); 290 291 x86ms->rtc = isa_new(TYPE_MC146818_RTC); 292 qdev_prop_set_int32(DEVICE(x86ms->rtc), "base_year", 2000); 293 isa_realize_and_unref(x86ms->rtc, isa_bus, &error_fatal); 294 295 i8257_dma_init(OBJECT(machine), isa_bus, 0); 296 pcms->hpet_enabled = false; 297 } 298 299 if (x86ms->pic == ON_OFF_AUTO_ON || x86ms->pic == ON_OFF_AUTO_AUTO) { 300 pc_i8259_create(isa_bus, gsi_state->i8259_irq); 301 } 302 303 if (phb) { 304 ioapic_init_gsi(gsi_state, phb); 305 } 306 307 if (tcg_enabled()) { 308 x86_register_ferr_irq(x86ms->gsi[13]); 309 } 310 311 pc_vga_init(isa_bus, pcmc->pci_enabled ? pcms->pcibus : NULL); 312 313 assert(pcms->vmport != ON_OFF_AUTO__MAX); 314 if (pcms->vmport == ON_OFF_AUTO_AUTO) { 315 pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON; 316 } 317 318 /* init basic PC hardware */ 319 pc_basic_device_init(pcms, isa_bus, x86ms->gsi, x86ms->rtc, true, 320 0x4); 321 322 pc_nic_init(pcmc, isa_bus, pcms->pcibus); 323 324 #ifdef CONFIG_IDE_ISA 325 if (!pcmc->pci_enabled) { 326 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; 327 int i; 328 329 ide_drive_get(hd, ARRAY_SIZE(hd)); 330 for (i = 0; i < MAX_IDE_BUS; i++) { 331 ISADevice *dev; 332 char busname[] = "ide.0"; 333 dev = isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i], 334 ide_irq[i], 335 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]); 336 /* 337 * The ide bus name is ide.0 for the first bus and ide.1 for the 338 * second one. 339 */ 340 busname[4] = '0' + i; 341 pcms->idebus[i] = qdev_get_child_bus(DEVICE(dev), busname); 342 } 343 } 344 #endif 345 346 pc_cmos_init(pcms, x86ms->rtc); 347 348 if (piix4_pm) { 349 smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0); 350 351 qdev_connect_gpio_out_named(DEVICE(piix4_pm), "smi-irq", 0, smi_irq); 352 pcms->smbus = I2C_BUS(qdev_get_child_bus(DEVICE(piix4_pm), "i2c")); 353 /* TODO: Populate SPD eeprom data. */ 354 smbus_eeprom_init(pcms->smbus, 8, NULL, 0); 355 356 object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP, 357 TYPE_HOTPLUG_HANDLER, 358 (Object **)&x86ms->acpi_dev, 359 object_property_allow_set_link, 360 OBJ_PROP_LINK_STRONG); 361 object_property_set_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP, 362 piix4_pm, &error_abort); 363 } 364 365 if (machine->nvdimms_state->is_enabled) { 366 nvdimm_init_acpi_state(machine->nvdimms_state, system_io, 367 x86_nvdimm_acpi_dsmio, 368 x86ms->fw_cfg, OBJECT(pcms)); 369 } 370 } 371 372 typedef enum PCSouthBridgeOption { 373 PC_SOUTH_BRIDGE_OPTION_PIIX3, 374 PC_SOUTH_BRIDGE_OPTION_PIIX4, 375 PC_SOUTH_BRIDGE_OPTION_MAX, 376 } PCSouthBridgeOption; 377 378 static const QEnumLookup PCSouthBridgeOption_lookup = { 379 .array = (const char *const[]) { 380 [PC_SOUTH_BRIDGE_OPTION_PIIX3] = TYPE_PIIX3_DEVICE, 381 [PC_SOUTH_BRIDGE_OPTION_PIIX4] = TYPE_PIIX4_PCI_DEVICE, 382 }, 383 .size = PC_SOUTH_BRIDGE_OPTION_MAX 384 }; 385 386 static int pc_get_south_bridge(Object *obj, Error **errp) 387 { 388 PCMachineState *pcms = PC_MACHINE(obj); 389 int i; 390 391 for (i = 0; i < PCSouthBridgeOption_lookup.size; i++) { 392 if (g_strcmp0(PCSouthBridgeOption_lookup.array[i], 393 pcms->south_bridge) == 0) { 394 return i; 395 } 396 } 397 398 error_setg(errp, "Invalid south bridge value set"); 399 return 0; 400 } 401 402 static void pc_set_south_bridge(Object *obj, int value, Error **errp) 403 { 404 PCMachineState *pcms = PC_MACHINE(obj); 405 406 if (value < 0) { 407 error_setg(errp, "Value can't be negative"); 408 return; 409 } 410 411 if (value >= PCSouthBridgeOption_lookup.size) { 412 error_setg(errp, "Value too big"); 413 return; 414 } 415 416 pcms->south_bridge = PCSouthBridgeOption_lookup.array[value]; 417 } 418 419 /* Looking for a pc_compat_2_4() function? It doesn't exist. 420 * pc_compat_*() functions that run on machine-init time and 421 * change global QEMU state are deprecated. Please don't create 422 * one, and implement any pc-*-2.4 (and newer) compat code in 423 * hw_compat_*, pc_compat_*, or * pc_*_machine_options(). 424 */ 425 426 static void pc_compat_2_3_fn(MachineState *machine) 427 { 428 X86MachineState *x86ms = X86_MACHINE(machine); 429 if (kvm_enabled()) { 430 x86ms->smm = ON_OFF_AUTO_OFF; 431 } 432 } 433 434 static void pc_compat_2_2_fn(MachineState *machine) 435 { 436 pc_compat_2_3_fn(machine); 437 } 438 439 static void pc_compat_2_1_fn(MachineState *machine) 440 { 441 pc_compat_2_2_fn(machine); 442 x86_cpu_change_kvm_default("svm", NULL); 443 } 444 445 static void pc_compat_2_0_fn(MachineState *machine) 446 { 447 pc_compat_2_1_fn(machine); 448 } 449 450 #ifdef CONFIG_ISAPC 451 static void pc_init_isa(MachineState *machine) 452 { 453 pc_init1(machine, NULL); 454 } 455 #endif 456 457 #ifdef CONFIG_XEN 458 static void pc_xen_hvm_init_pci(MachineState *machine) 459 { 460 const char *pci_type = xen_igd_gfx_pt_enabled() ? 461 TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE : TYPE_I440FX_PCI_DEVICE; 462 463 pc_init1(machine, pci_type); 464 } 465 466 static void pc_xen_hvm_init(MachineState *machine) 467 { 468 PCMachineState *pcms = PC_MACHINE(machine); 469 470 if (!xen_enabled()) { 471 error_report("xenfv machine requires the xen accelerator"); 472 exit(1); 473 } 474 475 pc_xen_hvm_init_pci(machine); 476 xen_igd_reserve_slot(pcms->pcibus); 477 pci_create_simple(pcms->pcibus, -1, "xen-platform"); 478 } 479 #endif 480 481 #define DEFINE_I440FX_MACHINE(suffix, name, compatfn, optionfn) \ 482 static void pc_init_##suffix(MachineState *machine) \ 483 { \ 484 void (*compat)(MachineState *m) = (compatfn); \ 485 if (compat) { \ 486 compat(machine); \ 487 } \ 488 pc_init1(machine, TYPE_I440FX_PCI_DEVICE); \ 489 } \ 490 DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn) 491 492 static void pc_i440fx_machine_options(MachineClass *m) 493 { 494 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 495 ObjectClass *oc = OBJECT_CLASS(m); 496 pcmc->default_south_bridge = TYPE_PIIX3_DEVICE; 497 pcmc->pci_root_uid = 0; 498 pcmc->default_cpu_version = 1; 499 500 m->family = "pc_piix"; 501 m->desc = "Standard PC (i440FX + PIIX, 1996)"; 502 m->default_machine_opts = "firmware=bios-256k.bin"; 503 m->default_display = "std"; 504 m->default_nic = "e1000"; 505 m->no_parallel = !module_object_class_by_name(TYPE_ISA_PARALLEL); 506 machine_class_allow_dynamic_sysbus_dev(m, TYPE_RAMFB_DEVICE); 507 machine_class_allow_dynamic_sysbus_dev(m, TYPE_VMBUS_BRIDGE); 508 509 object_class_property_add_enum(oc, "x-south-bridge", "PCSouthBridgeOption", 510 &PCSouthBridgeOption_lookup, 511 pc_get_south_bridge, 512 pc_set_south_bridge); 513 object_class_property_set_description(oc, "x-south-bridge", 514 "Use a different south bridge than PIIX3"); 515 } 516 517 static void pc_i440fx_9_0_machine_options(MachineClass *m) 518 { 519 pc_i440fx_machine_options(m); 520 m->alias = "pc"; 521 m->is_default = true; 522 } 523 524 DEFINE_I440FX_MACHINE(v9_0, "pc-i440fx-9.0", NULL, 525 pc_i440fx_9_0_machine_options); 526 527 static void pc_i440fx_8_2_machine_options(MachineClass *m) 528 { 529 pc_i440fx_9_0_machine_options(m); 530 m->alias = NULL; 531 m->is_default = false; 532 533 compat_props_add(m->compat_props, hw_compat_8_2, hw_compat_8_2_len); 534 compat_props_add(m->compat_props, pc_compat_8_2, pc_compat_8_2_len); 535 } 536 537 DEFINE_I440FX_MACHINE(v8_2, "pc-i440fx-8.2", NULL, 538 pc_i440fx_8_2_machine_options); 539 540 static void pc_i440fx_8_1_machine_options(MachineClass *m) 541 { 542 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 543 544 pc_i440fx_8_2_machine_options(m); 545 pcmc->broken_32bit_mem_addr_check = true; 546 547 compat_props_add(m->compat_props, hw_compat_8_1, hw_compat_8_1_len); 548 compat_props_add(m->compat_props, pc_compat_8_1, pc_compat_8_1_len); 549 } 550 551 DEFINE_I440FX_MACHINE(v8_1, "pc-i440fx-8.1", NULL, 552 pc_i440fx_8_1_machine_options); 553 554 static void pc_i440fx_8_0_machine_options(MachineClass *m) 555 { 556 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 557 558 pc_i440fx_8_1_machine_options(m); 559 compat_props_add(m->compat_props, hw_compat_8_0, hw_compat_8_0_len); 560 compat_props_add(m->compat_props, pc_compat_8_0, pc_compat_8_0_len); 561 562 /* For pc-i44fx-8.0 and older, use SMBIOS 2.8 by default */ 563 pcmc->default_smbios_ep_type = SMBIOS_ENTRY_POINT_TYPE_32; 564 } 565 566 DEFINE_I440FX_MACHINE(v8_0, "pc-i440fx-8.0", NULL, 567 pc_i440fx_8_0_machine_options); 568 569 static void pc_i440fx_7_2_machine_options(MachineClass *m) 570 { 571 pc_i440fx_8_0_machine_options(m); 572 compat_props_add(m->compat_props, hw_compat_7_2, hw_compat_7_2_len); 573 compat_props_add(m->compat_props, pc_compat_7_2, pc_compat_7_2_len); 574 } 575 576 DEFINE_I440FX_MACHINE(v7_2, "pc-i440fx-7.2", NULL, 577 pc_i440fx_7_2_machine_options); 578 579 static void pc_i440fx_7_1_machine_options(MachineClass *m) 580 { 581 pc_i440fx_7_2_machine_options(m); 582 compat_props_add(m->compat_props, hw_compat_7_1, hw_compat_7_1_len); 583 compat_props_add(m->compat_props, pc_compat_7_1, pc_compat_7_1_len); 584 } 585 586 DEFINE_I440FX_MACHINE(v7_1, "pc-i440fx-7.1", NULL, 587 pc_i440fx_7_1_machine_options); 588 589 static void pc_i440fx_7_0_machine_options(MachineClass *m) 590 { 591 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 592 pc_i440fx_7_1_machine_options(m); 593 pcmc->enforce_amd_1tb_hole = false; 594 compat_props_add(m->compat_props, hw_compat_7_0, hw_compat_7_0_len); 595 compat_props_add(m->compat_props, pc_compat_7_0, pc_compat_7_0_len); 596 } 597 598 DEFINE_I440FX_MACHINE(v7_0, "pc-i440fx-7.0", NULL, 599 pc_i440fx_7_0_machine_options); 600 601 static void pc_i440fx_6_2_machine_options(MachineClass *m) 602 { 603 pc_i440fx_7_0_machine_options(m); 604 compat_props_add(m->compat_props, hw_compat_6_2, hw_compat_6_2_len); 605 compat_props_add(m->compat_props, pc_compat_6_2, pc_compat_6_2_len); 606 } 607 608 DEFINE_I440FX_MACHINE(v6_2, "pc-i440fx-6.2", NULL, 609 pc_i440fx_6_2_machine_options); 610 611 static void pc_i440fx_6_1_machine_options(MachineClass *m) 612 { 613 pc_i440fx_6_2_machine_options(m); 614 compat_props_add(m->compat_props, hw_compat_6_1, hw_compat_6_1_len); 615 compat_props_add(m->compat_props, pc_compat_6_1, pc_compat_6_1_len); 616 m->smp_props.prefer_sockets = true; 617 } 618 619 DEFINE_I440FX_MACHINE(v6_1, "pc-i440fx-6.1", NULL, 620 pc_i440fx_6_1_machine_options); 621 622 static void pc_i440fx_6_0_machine_options(MachineClass *m) 623 { 624 pc_i440fx_6_1_machine_options(m); 625 compat_props_add(m->compat_props, hw_compat_6_0, hw_compat_6_0_len); 626 compat_props_add(m->compat_props, pc_compat_6_0, pc_compat_6_0_len); 627 } 628 629 DEFINE_I440FX_MACHINE(v6_0, "pc-i440fx-6.0", NULL, 630 pc_i440fx_6_0_machine_options); 631 632 static void pc_i440fx_5_2_machine_options(MachineClass *m) 633 { 634 pc_i440fx_6_0_machine_options(m); 635 compat_props_add(m->compat_props, hw_compat_5_2, hw_compat_5_2_len); 636 compat_props_add(m->compat_props, pc_compat_5_2, pc_compat_5_2_len); 637 } 638 639 DEFINE_I440FX_MACHINE(v5_2, "pc-i440fx-5.2", NULL, 640 pc_i440fx_5_2_machine_options); 641 642 static void pc_i440fx_5_1_machine_options(MachineClass *m) 643 { 644 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 645 646 pc_i440fx_5_2_machine_options(m); 647 compat_props_add(m->compat_props, hw_compat_5_1, hw_compat_5_1_len); 648 compat_props_add(m->compat_props, pc_compat_5_1, pc_compat_5_1_len); 649 pcmc->kvmclock_create_always = false; 650 pcmc->pci_root_uid = 1; 651 } 652 653 DEFINE_I440FX_MACHINE(v5_1, "pc-i440fx-5.1", NULL, 654 pc_i440fx_5_1_machine_options); 655 656 static void pc_i440fx_5_0_machine_options(MachineClass *m) 657 { 658 pc_i440fx_5_1_machine_options(m); 659 m->numa_mem_supported = true; 660 compat_props_add(m->compat_props, hw_compat_5_0, hw_compat_5_0_len); 661 compat_props_add(m->compat_props, pc_compat_5_0, pc_compat_5_0_len); 662 m->auto_enable_numa_with_memdev = false; 663 } 664 665 DEFINE_I440FX_MACHINE(v5_0, "pc-i440fx-5.0", NULL, 666 pc_i440fx_5_0_machine_options); 667 668 static void pc_i440fx_4_2_machine_options(MachineClass *m) 669 { 670 pc_i440fx_5_0_machine_options(m); 671 compat_props_add(m->compat_props, hw_compat_4_2, hw_compat_4_2_len); 672 compat_props_add(m->compat_props, pc_compat_4_2, pc_compat_4_2_len); 673 } 674 675 DEFINE_I440FX_MACHINE(v4_2, "pc-i440fx-4.2", NULL, 676 pc_i440fx_4_2_machine_options); 677 678 static void pc_i440fx_4_1_machine_options(MachineClass *m) 679 { 680 pc_i440fx_4_2_machine_options(m); 681 compat_props_add(m->compat_props, hw_compat_4_1, hw_compat_4_1_len); 682 compat_props_add(m->compat_props, pc_compat_4_1, pc_compat_4_1_len); 683 } 684 685 DEFINE_I440FX_MACHINE(v4_1, "pc-i440fx-4.1", NULL, 686 pc_i440fx_4_1_machine_options); 687 688 static void pc_i440fx_4_0_machine_options(MachineClass *m) 689 { 690 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 691 pc_i440fx_4_1_machine_options(m); 692 pcmc->default_cpu_version = CPU_VERSION_LEGACY; 693 compat_props_add(m->compat_props, hw_compat_4_0, hw_compat_4_0_len); 694 compat_props_add(m->compat_props, pc_compat_4_0, pc_compat_4_0_len); 695 } 696 697 DEFINE_I440FX_MACHINE(v4_0, "pc-i440fx-4.0", NULL, 698 pc_i440fx_4_0_machine_options); 699 700 static void pc_i440fx_3_1_machine_options(MachineClass *m) 701 { 702 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 703 704 pc_i440fx_4_0_machine_options(m); 705 m->smbus_no_migration_support = true; 706 pcmc->pvh_enabled = false; 707 compat_props_add(m->compat_props, hw_compat_3_1, hw_compat_3_1_len); 708 compat_props_add(m->compat_props, pc_compat_3_1, pc_compat_3_1_len); 709 } 710 711 DEFINE_I440FX_MACHINE(v3_1, "pc-i440fx-3.1", NULL, 712 pc_i440fx_3_1_machine_options); 713 714 static void pc_i440fx_3_0_machine_options(MachineClass *m) 715 { 716 pc_i440fx_3_1_machine_options(m); 717 compat_props_add(m->compat_props, hw_compat_3_0, hw_compat_3_0_len); 718 compat_props_add(m->compat_props, pc_compat_3_0, pc_compat_3_0_len); 719 } 720 721 DEFINE_I440FX_MACHINE(v3_0, "pc-i440fx-3.0", NULL, 722 pc_i440fx_3_0_machine_options); 723 724 static void pc_i440fx_2_12_machine_options(MachineClass *m) 725 { 726 pc_i440fx_3_0_machine_options(m); 727 compat_props_add(m->compat_props, hw_compat_2_12, hw_compat_2_12_len); 728 compat_props_add(m->compat_props, pc_compat_2_12, pc_compat_2_12_len); 729 } 730 731 DEFINE_I440FX_MACHINE(v2_12, "pc-i440fx-2.12", NULL, 732 pc_i440fx_2_12_machine_options); 733 734 static void pc_i440fx_2_11_machine_options(MachineClass *m) 735 { 736 pc_i440fx_2_12_machine_options(m); 737 compat_props_add(m->compat_props, hw_compat_2_11, hw_compat_2_11_len); 738 compat_props_add(m->compat_props, pc_compat_2_11, pc_compat_2_11_len); 739 } 740 741 DEFINE_I440FX_MACHINE(v2_11, "pc-i440fx-2.11", NULL, 742 pc_i440fx_2_11_machine_options); 743 744 static void pc_i440fx_2_10_machine_options(MachineClass *m) 745 { 746 pc_i440fx_2_11_machine_options(m); 747 compat_props_add(m->compat_props, hw_compat_2_10, hw_compat_2_10_len); 748 compat_props_add(m->compat_props, pc_compat_2_10, pc_compat_2_10_len); 749 m->auto_enable_numa_with_memhp = false; 750 } 751 752 DEFINE_I440FX_MACHINE(v2_10, "pc-i440fx-2.10", NULL, 753 pc_i440fx_2_10_machine_options); 754 755 static void pc_i440fx_2_9_machine_options(MachineClass *m) 756 { 757 pc_i440fx_2_10_machine_options(m); 758 compat_props_add(m->compat_props, hw_compat_2_9, hw_compat_2_9_len); 759 compat_props_add(m->compat_props, pc_compat_2_9, pc_compat_2_9_len); 760 } 761 762 DEFINE_I440FX_MACHINE(v2_9, "pc-i440fx-2.9", NULL, 763 pc_i440fx_2_9_machine_options); 764 765 static void pc_i440fx_2_8_machine_options(MachineClass *m) 766 { 767 pc_i440fx_2_9_machine_options(m); 768 compat_props_add(m->compat_props, hw_compat_2_8, hw_compat_2_8_len); 769 compat_props_add(m->compat_props, pc_compat_2_8, pc_compat_2_8_len); 770 } 771 772 DEFINE_I440FX_MACHINE(v2_8, "pc-i440fx-2.8", NULL, 773 pc_i440fx_2_8_machine_options); 774 775 static void pc_i440fx_2_7_machine_options(MachineClass *m) 776 { 777 pc_i440fx_2_8_machine_options(m); 778 compat_props_add(m->compat_props, hw_compat_2_7, hw_compat_2_7_len); 779 compat_props_add(m->compat_props, pc_compat_2_7, pc_compat_2_7_len); 780 } 781 782 DEFINE_I440FX_MACHINE(v2_7, "pc-i440fx-2.7", NULL, 783 pc_i440fx_2_7_machine_options); 784 785 static void pc_i440fx_2_6_machine_options(MachineClass *m) 786 { 787 X86MachineClass *x86mc = X86_MACHINE_CLASS(m); 788 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 789 790 pc_i440fx_2_7_machine_options(m); 791 pcmc->legacy_cpu_hotplug = true; 792 x86mc->fwcfg_dma_enabled = false; 793 compat_props_add(m->compat_props, hw_compat_2_6, hw_compat_2_6_len); 794 compat_props_add(m->compat_props, pc_compat_2_6, pc_compat_2_6_len); 795 } 796 797 DEFINE_I440FX_MACHINE(v2_6, "pc-i440fx-2.6", NULL, 798 pc_i440fx_2_6_machine_options); 799 800 static void pc_i440fx_2_5_machine_options(MachineClass *m) 801 { 802 X86MachineClass *x86mc = X86_MACHINE_CLASS(m); 803 804 pc_i440fx_2_6_machine_options(m); 805 x86mc->save_tsc_khz = false; 806 m->legacy_fw_cfg_order = 1; 807 compat_props_add(m->compat_props, hw_compat_2_5, hw_compat_2_5_len); 808 compat_props_add(m->compat_props, pc_compat_2_5, pc_compat_2_5_len); 809 } 810 811 DEFINE_I440FX_MACHINE(v2_5, "pc-i440fx-2.5", NULL, 812 pc_i440fx_2_5_machine_options); 813 814 static void pc_i440fx_2_4_machine_options(MachineClass *m) 815 { 816 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 817 818 pc_i440fx_2_5_machine_options(m); 819 m->hw_version = "2.4.0"; 820 pcmc->broken_reserved_end = true; 821 compat_props_add(m->compat_props, hw_compat_2_4, hw_compat_2_4_len); 822 compat_props_add(m->compat_props, pc_compat_2_4, pc_compat_2_4_len); 823 } 824 825 DEFINE_I440FX_MACHINE(v2_4, "pc-i440fx-2.4", NULL, 826 pc_i440fx_2_4_machine_options) 827 828 static void pc_i440fx_2_3_machine_options(MachineClass *m) 829 { 830 pc_i440fx_2_4_machine_options(m); 831 m->hw_version = "2.3.0"; 832 m->deprecation_reason = "old and unattended - use a newer version instead"; 833 compat_props_add(m->compat_props, hw_compat_2_3, hw_compat_2_3_len); 834 compat_props_add(m->compat_props, pc_compat_2_3, pc_compat_2_3_len); 835 } 836 837 DEFINE_I440FX_MACHINE(v2_3, "pc-i440fx-2.3", pc_compat_2_3_fn, 838 pc_i440fx_2_3_machine_options); 839 840 static void pc_i440fx_2_2_machine_options(MachineClass *m) 841 { 842 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 843 844 pc_i440fx_2_3_machine_options(m); 845 m->hw_version = "2.2.0"; 846 m->default_machine_opts = "firmware=bios-256k.bin,suppress-vmdesc=on"; 847 compat_props_add(m->compat_props, hw_compat_2_2, hw_compat_2_2_len); 848 compat_props_add(m->compat_props, pc_compat_2_2, pc_compat_2_2_len); 849 pcmc->rsdp_in_ram = false; 850 pcmc->resizable_acpi_blob = false; 851 } 852 853 DEFINE_I440FX_MACHINE(v2_2, "pc-i440fx-2.2", pc_compat_2_2_fn, 854 pc_i440fx_2_2_machine_options); 855 856 static void pc_i440fx_2_1_machine_options(MachineClass *m) 857 { 858 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 859 860 pc_i440fx_2_2_machine_options(m); 861 m->hw_version = "2.1.0"; 862 m->default_display = NULL; 863 compat_props_add(m->compat_props, hw_compat_2_1, hw_compat_2_1_len); 864 compat_props_add(m->compat_props, pc_compat_2_1, pc_compat_2_1_len); 865 pcmc->smbios_uuid_encoded = false; 866 pcmc->enforce_aligned_dimm = false; 867 } 868 869 DEFINE_I440FX_MACHINE(v2_1, "pc-i440fx-2.1", pc_compat_2_1_fn, 870 pc_i440fx_2_1_machine_options); 871 872 static void pc_i440fx_2_0_machine_options(MachineClass *m) 873 { 874 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 875 876 pc_i440fx_2_1_machine_options(m); 877 m->hw_version = "2.0.0"; 878 compat_props_add(m->compat_props, pc_compat_2_0, pc_compat_2_0_len); 879 pcmc->smbios_legacy_mode = true; 880 pcmc->has_reserved_memory = false; 881 /* This value depends on the actual DSDT and SSDT compiled into 882 * the source QEMU; unfortunately it depends on the binary and 883 * not on the machine type, so we cannot make pc-i440fx-1.7 work on 884 * both QEMU 1.7 and QEMU 2.0. 885 * 886 * Large variations cause migration to fail for more than one 887 * consecutive value of the "-smp" maxcpus option. 888 * 889 * For small variations of the kind caused by different iasl versions, 890 * the 4k rounding usually leaves slack. However, there could be still 891 * one or two values that break. For QEMU 1.7 and QEMU 2.0 the 892 * slack is only ~10 bytes before one "-smp maxcpus" value breaks! 893 * 894 * 6652 is valid for QEMU 2.0, the right value for pc-i440fx-1.7 on 895 * QEMU 1.7 it is 6414. For RHEL/CentOS 7.0 it is 6418. 896 */ 897 pcmc->legacy_acpi_table_size = 6652; 898 pcmc->acpi_data_size = 0x10000; 899 } 900 901 DEFINE_I440FX_MACHINE(v2_0, "pc-i440fx-2.0", pc_compat_2_0_fn, 902 pc_i440fx_2_0_machine_options); 903 904 #ifdef CONFIG_ISAPC 905 static void isapc_machine_options(MachineClass *m) 906 { 907 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 908 m->desc = "ISA-only PC"; 909 m->max_cpus = 1; 910 m->option_rom_has_mr = true; 911 m->rom_file_has_mr = false; 912 pcmc->pci_enabled = false; 913 pcmc->has_acpi_build = false; 914 pcmc->smbios_defaults = false; 915 pcmc->gigabyte_align = false; 916 pcmc->smbios_legacy_mode = true; 917 pcmc->has_reserved_memory = false; 918 m->default_nic = "ne2k_isa"; 919 m->default_cpu_type = X86_CPU_TYPE_NAME("486"); 920 m->no_parallel = !module_object_class_by_name(TYPE_ISA_PARALLEL); 921 } 922 923 DEFINE_PC_MACHINE(isapc, "isapc", pc_init_isa, 924 isapc_machine_options); 925 #endif 926 927 #ifdef CONFIG_XEN 928 static void xenfv_4_2_machine_options(MachineClass *m) 929 { 930 pc_i440fx_4_2_machine_options(m); 931 m->desc = "Xen Fully-virtualized PC"; 932 m->max_cpus = HVM_MAX_VCPUS; 933 m->default_machine_opts = "accel=xen,suppress-vmdesc=on"; 934 } 935 936 DEFINE_PC_MACHINE(xenfv_4_2, "xenfv-4.2", pc_xen_hvm_init, 937 xenfv_4_2_machine_options); 938 939 static void xenfv_3_1_machine_options(MachineClass *m) 940 { 941 pc_i440fx_3_1_machine_options(m); 942 m->desc = "Xen Fully-virtualized PC"; 943 m->alias = "xenfv"; 944 m->max_cpus = HVM_MAX_VCPUS; 945 m->default_machine_opts = "accel=xen,suppress-vmdesc=on"; 946 } 947 948 DEFINE_PC_MACHINE(xenfv, "xenfv-3.1", pc_xen_hvm_init, 949 xenfv_3_1_machine_options); 950 #endif 951