1 /* 2 * QEMU PC System Emulator 3 * 4 * Copyright (c) 2003-2004 Fabrice Bellard 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 #include "qemu/osdep.h" 26 #include <glib.h> 27 28 #include "hw/hw.h" 29 #include "hw/loader.h" 30 #include "hw/i386/pc.h" 31 #include "hw/i386/apic.h" 32 #include "hw/smbios/smbios.h" 33 #include "hw/pci/pci.h" 34 #include "hw/pci/pci_ids.h" 35 #include "hw/usb.h" 36 #include "net/net.h" 37 #include "hw/boards.h" 38 #include "hw/ide.h" 39 #include "sysemu/kvm.h" 40 #include "hw/kvm/clock.h" 41 #include "sysemu/sysemu.h" 42 #include "hw/sysbus.h" 43 #include "sysemu/arch_init.h" 44 #include "sysemu/block-backend.h" 45 #include "hw/i2c/smbus.h" 46 #include "hw/xen/xen.h" 47 #include "exec/memory.h" 48 #include "exec/address-spaces.h" 49 #include "hw/acpi/acpi.h" 50 #include "cpu.h" 51 #include "qemu/error-report.h" 52 #ifdef CONFIG_XEN 53 #include <xen/hvm/hvm_info_table.h> 54 #include "hw/xen/xen_pt.h" 55 #endif 56 #include "migration/migration.h" 57 #include "kvm_i386.h" 58 59 #define MAX_IDE_BUS 2 60 61 static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 }; 62 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 }; 63 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 }; 64 65 /* PC hardware initialisation */ 66 static void pc_init1(MachineState *machine, 67 const char *host_type, const char *pci_type) 68 { 69 PCMachineState *pcms = PC_MACHINE(machine); 70 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); 71 MemoryRegion *system_memory = get_system_memory(); 72 MemoryRegion *system_io = get_system_io(); 73 int i; 74 PCIBus *pci_bus; 75 ISABus *isa_bus; 76 PCII440FXState *i440fx_state; 77 int piix3_devfn = -1; 78 qemu_irq *gsi; 79 qemu_irq *i8259; 80 qemu_irq smi_irq; 81 GSIState *gsi_state; 82 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; 83 BusState *idebus[MAX_IDE_BUS]; 84 ISADevice *rtc_state; 85 MemoryRegion *ram_memory; 86 MemoryRegion *pci_memory; 87 MemoryRegion *rom_memory; 88 ram_addr_t lowmem; 89 90 /* Check whether RAM fits below 4G (leaving 1/2 GByte for IO memory). 91 * If it doesn't, we need to split it in chunks below and above 4G. 92 * In any case, try to make sure that guest addresses aligned at 93 * 1G boundaries get mapped to host addresses aligned at 1G boundaries. 94 * For old machine types, use whatever split we used historically to avoid 95 * breaking migration. 96 */ 97 if (machine->ram_size >= 0xe0000000) { 98 lowmem = pcmc->gigabyte_align ? 0xc0000000 : 0xe0000000; 99 } else { 100 lowmem = 0xe0000000; 101 } 102 103 /* Handle the machine opt max-ram-below-4g. It is basically doing 104 * min(qemu limit, user limit). 105 */ 106 if (lowmem > pcms->max_ram_below_4g) { 107 lowmem = pcms->max_ram_below_4g; 108 if (machine->ram_size - lowmem > lowmem && 109 lowmem & ((1ULL << 30) - 1)) { 110 error_report("Warning: Large machine and max_ram_below_4g(%"PRIu64 111 ") not a multiple of 1G; possible bad performance.", 112 pcms->max_ram_below_4g); 113 } 114 } 115 116 if (machine->ram_size >= lowmem) { 117 pcms->above_4g_mem_size = machine->ram_size - lowmem; 118 pcms->below_4g_mem_size = lowmem; 119 } else { 120 pcms->above_4g_mem_size = 0; 121 pcms->below_4g_mem_size = machine->ram_size; 122 } 123 124 if (xen_enabled()) { 125 xen_hvm_init(pcms, &ram_memory); 126 } 127 128 pc_cpus_init(pcms); 129 130 if (kvm_enabled() && pcmc->kvmclock_enabled) { 131 kvmclock_create(); 132 } 133 134 if (pcmc->pci_enabled) { 135 pci_memory = g_new(MemoryRegion, 1); 136 memory_region_init(pci_memory, NULL, "pci", UINT64_MAX); 137 rom_memory = pci_memory; 138 } else { 139 pci_memory = NULL; 140 rom_memory = system_memory; 141 } 142 143 pc_guest_info_init(pcms); 144 145 if (pcmc->smbios_defaults) { 146 MachineClass *mc = MACHINE_GET_CLASS(machine); 147 /* These values are guest ABI, do not change */ 148 smbios_set_defaults("QEMU", "Standard PC (i440FX + PIIX, 1996)", 149 mc->name, pcmc->smbios_legacy_mode, 150 pcmc->smbios_uuid_encoded, 151 SMBIOS_ENTRY_POINT_21); 152 } 153 154 /* allocate ram and load rom/bios */ 155 if (!xen_enabled()) { 156 pc_memory_init(pcms, system_memory, 157 rom_memory, &ram_memory); 158 } else if (machine->kernel_filename != NULL) { 159 /* For xen HVM direct kernel boot, load linux here */ 160 xen_load_linux(pcms); 161 } 162 163 gsi_state = g_malloc0(sizeof(*gsi_state)); 164 if (kvm_ioapic_in_kernel()) { 165 kvm_pc_setup_irq_routing(pcmc->pci_enabled); 166 gsi = qemu_allocate_irqs(kvm_pc_gsi_handler, gsi_state, 167 GSI_NUM_PINS); 168 } else { 169 gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS); 170 } 171 172 if (pcmc->pci_enabled) { 173 pci_bus = i440fx_init(host_type, 174 pci_type, 175 &i440fx_state, &piix3_devfn, &isa_bus, gsi, 176 system_memory, system_io, machine->ram_size, 177 pcms->below_4g_mem_size, 178 pcms->above_4g_mem_size, 179 pci_memory, ram_memory); 180 pcms->bus = pci_bus; 181 } else { 182 pci_bus = NULL; 183 i440fx_state = NULL; 184 isa_bus = isa_bus_new(NULL, get_system_memory(), system_io, 185 &error_abort); 186 no_hpet = 1; 187 } 188 isa_bus_irqs(isa_bus, gsi); 189 190 if (kvm_pic_in_kernel()) { 191 i8259 = kvm_i8259_init(isa_bus); 192 } else if (xen_enabled()) { 193 i8259 = xen_interrupt_controller_init(); 194 } else { 195 i8259 = i8259_init(isa_bus, pc_allocate_cpu_irq()); 196 } 197 198 for (i = 0; i < ISA_NUM_IRQS; i++) { 199 gsi_state->i8259_irq[i] = i8259[i]; 200 } 201 g_free(i8259); 202 if (pcmc->pci_enabled) { 203 ioapic_init_gsi(gsi_state, "i440fx"); 204 } 205 206 pc_register_ferr_irq(gsi[13]); 207 208 pc_vga_init(isa_bus, pcmc->pci_enabled ? pci_bus : NULL); 209 210 assert(pcms->vmport != ON_OFF_AUTO__MAX); 211 if (pcms->vmport == ON_OFF_AUTO_AUTO) { 212 pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON; 213 } 214 215 /* init basic PC hardware */ 216 pc_basic_device_init(isa_bus, gsi, &rtc_state, true, 217 (pcms->vmport != ON_OFF_AUTO_ON), 0x4); 218 219 pc_nic_init(isa_bus, pci_bus); 220 221 ide_drive_get(hd, ARRAY_SIZE(hd)); 222 if (pcmc->pci_enabled) { 223 PCIDevice *dev; 224 if (xen_enabled()) { 225 dev = pci_piix3_xen_ide_init(pci_bus, hd, piix3_devfn + 1); 226 } else { 227 dev = pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1); 228 } 229 idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0"); 230 idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1"); 231 } else { 232 for(i = 0; i < MAX_IDE_BUS; i++) { 233 ISADevice *dev; 234 char busname[] = "ide.0"; 235 dev = isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i], 236 ide_irq[i], 237 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]); 238 /* 239 * The ide bus name is ide.0 for the first bus and ide.1 for the 240 * second one. 241 */ 242 busname[4] = '0' + i; 243 idebus[i] = qdev_get_child_bus(DEVICE(dev), busname); 244 } 245 } 246 247 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state); 248 249 if (pcmc->pci_enabled && usb_enabled()) { 250 pci_create_simple(pci_bus, piix3_devfn + 2, "piix3-usb-uhci"); 251 } 252 253 if (pcmc->pci_enabled && acpi_enabled) { 254 DeviceState *piix4_pm; 255 I2CBus *smbus; 256 257 smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0); 258 /* TODO: Populate SPD eeprom data. */ 259 smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, 260 gsi[9], smi_irq, 261 pc_machine_is_smm_enabled(pcms), 262 &piix4_pm); 263 smbus_eeprom_init(smbus, 8, NULL, 0); 264 265 object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP, 266 TYPE_HOTPLUG_HANDLER, 267 (Object **)&pcms->acpi_dev, 268 object_property_allow_set_link, 269 OBJ_PROP_LINK_UNREF_ON_RELEASE, &error_abort); 270 object_property_set_link(OBJECT(machine), OBJECT(piix4_pm), 271 PC_MACHINE_ACPI_DEVICE_PROP, &error_abort); 272 } 273 274 if (pcmc->pci_enabled) { 275 pc_pci_device_init(pci_bus); 276 } 277 278 if (pcms->acpi_nvdimm_state.is_enabled) { 279 nvdimm_init_acpi_state(&pcms->acpi_nvdimm_state, system_io, 280 pcms->fw_cfg, OBJECT(pcms)); 281 } 282 } 283 284 /* Looking for a pc_compat_2_4() function? It doesn't exist. 285 * pc_compat_*() functions that run on machine-init time and 286 * change global QEMU state are deprecated. Please don't create 287 * one, and implement any pc-*-2.4 (and newer) compat code in 288 * HW_COMPAT_*, PC_COMPAT_*, or * pc_*_machine_options(). 289 */ 290 291 static void pc_compat_2_3(MachineState *machine) 292 { 293 PCMachineState *pcms = PC_MACHINE(machine); 294 savevm_skip_section_footers(); 295 if (kvm_enabled()) { 296 pcms->smm = ON_OFF_AUTO_OFF; 297 } 298 global_state_set_optional(); 299 savevm_skip_configuration(); 300 } 301 302 static void pc_compat_2_2(MachineState *machine) 303 { 304 pc_compat_2_3(machine); 305 machine->suppress_vmdesc = true; 306 } 307 308 static void pc_compat_2_1(MachineState *machine) 309 { 310 pc_compat_2_2(machine); 311 x86_cpu_change_kvm_default("svm", NULL); 312 } 313 314 static void pc_compat_2_0(MachineState *machine) 315 { 316 pc_compat_2_1(machine); 317 } 318 319 static void pc_compat_1_7(MachineState *machine) 320 { 321 pc_compat_2_0(machine); 322 x86_cpu_change_kvm_default("x2apic", NULL); 323 } 324 325 static void pc_compat_1_6(MachineState *machine) 326 { 327 pc_compat_1_7(machine); 328 } 329 330 static void pc_compat_1_5(MachineState *machine) 331 { 332 pc_compat_1_6(machine); 333 } 334 335 static void pc_compat_1_4(MachineState *machine) 336 { 337 pc_compat_1_5(machine); 338 } 339 340 static void pc_compat_1_3(MachineState *machine) 341 { 342 pc_compat_1_4(machine); 343 enable_compat_apic_id_mode(); 344 } 345 346 /* PC compat function for pc-0.14 to pc-1.2 */ 347 static void pc_compat_1_2(MachineState *machine) 348 { 349 pc_compat_1_3(machine); 350 x86_cpu_change_kvm_default("kvm-pv-eoi", NULL); 351 } 352 353 /* PC compat function for pc-0.10 to pc-0.13 */ 354 static void pc_compat_0_13(MachineState *machine) 355 { 356 pc_compat_1_2(machine); 357 } 358 359 static void pc_init_isa(MachineState *machine) 360 { 361 if (!machine->cpu_model) { 362 machine->cpu_model = "486"; 363 } 364 x86_cpu_change_kvm_default("kvm-pv-eoi", NULL); 365 enable_compat_apic_id_mode(); 366 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, TYPE_I440FX_PCI_DEVICE); 367 } 368 369 #ifdef CONFIG_XEN 370 static void pc_xen_hvm_init_pci(MachineState *machine) 371 { 372 const char *pci_type = has_igd_gfx_passthru ? 373 TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE : TYPE_I440FX_PCI_DEVICE; 374 375 pc_init1(machine, 376 TYPE_I440FX_PCI_HOST_BRIDGE, 377 pci_type); 378 } 379 380 static void pc_xen_hvm_init(MachineState *machine) 381 { 382 PCIBus *bus; 383 384 if (!xen_enabled()) { 385 error_report("xenfv machine requires the xen accelerator"); 386 exit(1); 387 } 388 389 pc_xen_hvm_init_pci(machine); 390 391 bus = pci_find_primary_bus(); 392 if (bus != NULL) { 393 pci_create_simple(bus, -1, "xen-platform"); 394 } 395 } 396 #endif 397 398 #define DEFINE_I440FX_MACHINE(suffix, name, compatfn, optionfn) \ 399 static void pc_init_##suffix(MachineState *machine) \ 400 { \ 401 void (*compat)(MachineState *m) = (compatfn); \ 402 if (compat) { \ 403 compat(machine); \ 404 } \ 405 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, \ 406 TYPE_I440FX_PCI_DEVICE); \ 407 } \ 408 DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn) 409 410 static void pc_i440fx_machine_options(MachineClass *m) 411 { 412 m->family = "pc_piix"; 413 m->desc = "Standard PC (i440FX + PIIX, 1996)"; 414 m->hot_add_cpu = pc_hot_add_cpu; 415 m->default_machine_opts = "firmware=bios-256k.bin"; 416 m->default_display = "std"; 417 } 418 419 static void pc_i440fx_2_6_machine_options(MachineClass *m) 420 { 421 pc_i440fx_machine_options(m); 422 m->alias = "pc"; 423 m->is_default = 1; 424 } 425 426 DEFINE_I440FX_MACHINE(v2_6, "pc-i440fx-2.6", NULL, 427 pc_i440fx_2_6_machine_options); 428 429 430 static void pc_i440fx_2_5_machine_options(MachineClass *m) 431 { 432 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 433 pc_i440fx_2_6_machine_options(m); 434 m->alias = NULL; 435 m->is_default = 0; 436 pcmc->save_tsc_khz = false; 437 m->legacy_fw_cfg_order = 1; 438 SET_MACHINE_COMPAT(m, PC_COMPAT_2_5); 439 } 440 441 DEFINE_I440FX_MACHINE(v2_5, "pc-i440fx-2.5", NULL, 442 pc_i440fx_2_5_machine_options); 443 444 445 static void pc_i440fx_2_4_machine_options(MachineClass *m) 446 { 447 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 448 pc_i440fx_2_5_machine_options(m); 449 m->hw_version = "2.4.0"; 450 pcmc->broken_reserved_end = true; 451 SET_MACHINE_COMPAT(m, PC_COMPAT_2_4); 452 } 453 454 DEFINE_I440FX_MACHINE(v2_4, "pc-i440fx-2.4", NULL, 455 pc_i440fx_2_4_machine_options) 456 457 458 static void pc_i440fx_2_3_machine_options(MachineClass *m) 459 { 460 pc_i440fx_2_4_machine_options(m); 461 m->hw_version = "2.3.0"; 462 SET_MACHINE_COMPAT(m, PC_COMPAT_2_3); 463 } 464 465 DEFINE_I440FX_MACHINE(v2_3, "pc-i440fx-2.3", pc_compat_2_3, 466 pc_i440fx_2_3_machine_options); 467 468 469 static void pc_i440fx_2_2_machine_options(MachineClass *m) 470 { 471 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 472 pc_i440fx_2_3_machine_options(m); 473 m->hw_version = "2.2.0"; 474 SET_MACHINE_COMPAT(m, PC_COMPAT_2_2); 475 pcmc->rsdp_in_ram = false; 476 } 477 478 DEFINE_I440FX_MACHINE(v2_2, "pc-i440fx-2.2", pc_compat_2_2, 479 pc_i440fx_2_2_machine_options); 480 481 482 static void pc_i440fx_2_1_machine_options(MachineClass *m) 483 { 484 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 485 pc_i440fx_2_2_machine_options(m); 486 m->hw_version = "2.1.0"; 487 m->default_display = NULL; 488 SET_MACHINE_COMPAT(m, PC_COMPAT_2_1); 489 pcmc->smbios_uuid_encoded = false; 490 pcmc->enforce_aligned_dimm = false; 491 } 492 493 DEFINE_I440FX_MACHINE(v2_1, "pc-i440fx-2.1", pc_compat_2_1, 494 pc_i440fx_2_1_machine_options); 495 496 497 498 static void pc_i440fx_2_0_machine_options(MachineClass *m) 499 { 500 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 501 pc_i440fx_2_1_machine_options(m); 502 m->hw_version = "2.0.0"; 503 SET_MACHINE_COMPAT(m, PC_COMPAT_2_0); 504 pcmc->smbios_legacy_mode = true; 505 pcmc->has_reserved_memory = false; 506 /* This value depends on the actual DSDT and SSDT compiled into 507 * the source QEMU; unfortunately it depends on the binary and 508 * not on the machine type, so we cannot make pc-i440fx-1.7 work on 509 * both QEMU 1.7 and QEMU 2.0. 510 * 511 * Large variations cause migration to fail for more than one 512 * consecutive value of the "-smp" maxcpus option. 513 * 514 * For small variations of the kind caused by different iasl versions, 515 * the 4k rounding usually leaves slack. However, there could be still 516 * one or two values that break. For QEMU 1.7 and QEMU 2.0 the 517 * slack is only ~10 bytes before one "-smp maxcpus" value breaks! 518 * 519 * 6652 is valid for QEMU 2.0, the right value for pc-i440fx-1.7 on 520 * QEMU 1.7 it is 6414. For RHEL/CentOS 7.0 it is 6418. 521 */ 522 pcmc->legacy_acpi_table_size = 6652; 523 pcmc->acpi_data_size = 0x10000; 524 } 525 526 DEFINE_I440FX_MACHINE(v2_0, "pc-i440fx-2.0", pc_compat_2_0, 527 pc_i440fx_2_0_machine_options); 528 529 530 static void pc_i440fx_1_7_machine_options(MachineClass *m) 531 { 532 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 533 pc_i440fx_2_0_machine_options(m); 534 m->hw_version = "1.7.0"; 535 m->default_machine_opts = NULL; 536 m->option_rom_has_mr = true; 537 SET_MACHINE_COMPAT(m, PC_COMPAT_1_7); 538 pcmc->smbios_defaults = false; 539 pcmc->gigabyte_align = false; 540 pcmc->legacy_acpi_table_size = 6414; 541 } 542 543 DEFINE_I440FX_MACHINE(v1_7, "pc-i440fx-1.7", pc_compat_1_7, 544 pc_i440fx_1_7_machine_options); 545 546 547 static void pc_i440fx_1_6_machine_options(MachineClass *m) 548 { 549 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 550 pc_i440fx_1_7_machine_options(m); 551 m->hw_version = "1.6.0"; 552 m->rom_file_has_mr = false; 553 SET_MACHINE_COMPAT(m, PC_COMPAT_1_6); 554 pcmc->has_acpi_build = false; 555 } 556 557 DEFINE_I440FX_MACHINE(v1_6, "pc-i440fx-1.6", pc_compat_1_6, 558 pc_i440fx_1_6_machine_options); 559 560 561 static void pc_i440fx_1_5_machine_options(MachineClass *m) 562 { 563 pc_i440fx_1_6_machine_options(m); 564 m->hw_version = "1.5.0"; 565 SET_MACHINE_COMPAT(m, PC_COMPAT_1_5); 566 } 567 568 DEFINE_I440FX_MACHINE(v1_5, "pc-i440fx-1.5", pc_compat_1_5, 569 pc_i440fx_1_5_machine_options); 570 571 572 static void pc_i440fx_1_4_machine_options(MachineClass *m) 573 { 574 pc_i440fx_1_5_machine_options(m); 575 m->hw_version = "1.4.0"; 576 m->hot_add_cpu = NULL; 577 SET_MACHINE_COMPAT(m, PC_COMPAT_1_4); 578 } 579 580 DEFINE_I440FX_MACHINE(v1_4, "pc-i440fx-1.4", pc_compat_1_4, 581 pc_i440fx_1_4_machine_options); 582 583 584 #define PC_COMPAT_1_3 \ 585 {\ 586 .driver = "usb-tablet",\ 587 .property = "usb_version",\ 588 .value = stringify(1),\ 589 },{\ 590 .driver = "virtio-net-pci",\ 591 .property = "ctrl_mac_addr",\ 592 .value = "off", \ 593 },{ \ 594 .driver = "virtio-net-pci", \ 595 .property = "mq", \ 596 .value = "off", \ 597 }, {\ 598 .driver = "e1000",\ 599 .property = "autonegotiation",\ 600 .value = "off",\ 601 }, 602 603 604 static void pc_i440fx_1_3_machine_options(MachineClass *m) 605 { 606 pc_i440fx_1_4_machine_options(m); 607 m->hw_version = "1.3.0"; 608 SET_MACHINE_COMPAT(m, PC_COMPAT_1_3); 609 } 610 611 DEFINE_I440FX_MACHINE(v1_3, "pc-1.3", pc_compat_1_3, 612 pc_i440fx_1_3_machine_options); 613 614 615 #define PC_COMPAT_1_2 \ 616 {\ 617 .driver = "nec-usb-xhci",\ 618 .property = "msi",\ 619 .value = "off",\ 620 },{\ 621 .driver = "nec-usb-xhci",\ 622 .property = "msix",\ 623 .value = "off",\ 624 },{\ 625 .driver = "ivshmem",\ 626 .property = "use64",\ 627 .value = "0",\ 628 },{\ 629 .driver = "qxl",\ 630 .property = "revision",\ 631 .value = stringify(3),\ 632 },{\ 633 .driver = "qxl-vga",\ 634 .property = "revision",\ 635 .value = stringify(3),\ 636 },{\ 637 .driver = "VGA",\ 638 .property = "mmio",\ 639 .value = "off",\ 640 }, 641 642 static void pc_i440fx_1_2_machine_options(MachineClass *m) 643 { 644 pc_i440fx_1_3_machine_options(m); 645 m->hw_version = "1.2.0"; 646 SET_MACHINE_COMPAT(m, PC_COMPAT_1_2); 647 } 648 649 DEFINE_I440FX_MACHINE(v1_2, "pc-1.2", pc_compat_1_2, 650 pc_i440fx_1_2_machine_options); 651 652 653 #define PC_COMPAT_1_1 \ 654 {\ 655 .driver = "virtio-scsi-pci",\ 656 .property = "hotplug",\ 657 .value = "off",\ 658 },{\ 659 .driver = "virtio-scsi-pci",\ 660 .property = "param_change",\ 661 .value = "off",\ 662 },{\ 663 .driver = "VGA",\ 664 .property = "vgamem_mb",\ 665 .value = stringify(8),\ 666 },{\ 667 .driver = "vmware-svga",\ 668 .property = "vgamem_mb",\ 669 .value = stringify(8),\ 670 },{\ 671 .driver = "qxl-vga",\ 672 .property = "vgamem_mb",\ 673 .value = stringify(8),\ 674 },{\ 675 .driver = "qxl",\ 676 .property = "vgamem_mb",\ 677 .value = stringify(8),\ 678 },{\ 679 .driver = "virtio-blk-pci",\ 680 .property = "config-wce",\ 681 .value = "off",\ 682 }, 683 684 static void pc_i440fx_1_1_machine_options(MachineClass *m) 685 { 686 pc_i440fx_1_2_machine_options(m); 687 m->hw_version = "1.1.0"; 688 SET_MACHINE_COMPAT(m, PC_COMPAT_1_1); 689 } 690 691 DEFINE_I440FX_MACHINE(v1_1, "pc-1.1", pc_compat_1_2, 692 pc_i440fx_1_1_machine_options); 693 694 695 #define PC_COMPAT_1_0 \ 696 {\ 697 .driver = TYPE_ISA_FDC,\ 698 .property = "check_media_rate",\ 699 .value = "off",\ 700 }, {\ 701 .driver = "virtio-balloon-pci",\ 702 .property = "class",\ 703 .value = stringify(PCI_CLASS_MEMORY_RAM),\ 704 },{\ 705 .driver = "apic-common",\ 706 .property = "vapic",\ 707 .value = "off",\ 708 },{\ 709 .driver = TYPE_USB_DEVICE,\ 710 .property = "full-path",\ 711 .value = "no",\ 712 }, 713 714 static void pc_i440fx_1_0_machine_options(MachineClass *m) 715 { 716 pc_i440fx_1_1_machine_options(m); 717 m->hw_version = "1.0"; 718 SET_MACHINE_COMPAT(m, PC_COMPAT_1_0); 719 } 720 721 DEFINE_I440FX_MACHINE(v1_0, "pc-1.0", pc_compat_1_2, 722 pc_i440fx_1_0_machine_options); 723 724 725 static void pc_i440fx_0_15_machine_options(MachineClass *m) 726 { 727 pc_i440fx_1_0_machine_options(m); 728 m->hw_version = "0.15"; 729 } 730 731 DEFINE_I440FX_MACHINE(v0_15, "pc-0.15", pc_compat_1_2, 732 pc_i440fx_0_15_machine_options); 733 734 735 #define PC_COMPAT_0_14 \ 736 {\ 737 .driver = "virtio-blk-pci",\ 738 .property = "event_idx",\ 739 .value = "off",\ 740 },{\ 741 .driver = "virtio-serial-pci",\ 742 .property = "event_idx",\ 743 .value = "off",\ 744 },{\ 745 .driver = "virtio-net-pci",\ 746 .property = "event_idx",\ 747 .value = "off",\ 748 },{\ 749 .driver = "virtio-balloon-pci",\ 750 .property = "event_idx",\ 751 .value = "off",\ 752 },{\ 753 .driver = "qxl",\ 754 .property = "revision",\ 755 .value = stringify(2),\ 756 },{\ 757 .driver = "qxl-vga",\ 758 .property = "revision",\ 759 .value = stringify(2),\ 760 }, 761 762 static void pc_i440fx_0_14_machine_options(MachineClass *m) 763 { 764 pc_i440fx_0_15_machine_options(m); 765 m->hw_version = "0.14"; 766 SET_MACHINE_COMPAT(m, PC_COMPAT_0_14); 767 } 768 769 DEFINE_I440FX_MACHINE(v0_14, "pc-0.14", pc_compat_1_2, 770 pc_i440fx_0_14_machine_options); 771 772 773 #define PC_COMPAT_0_13 \ 774 {\ 775 .driver = TYPE_PCI_DEVICE,\ 776 .property = "command_serr_enable",\ 777 .value = "off",\ 778 },{\ 779 .driver = "AC97",\ 780 .property = "use_broken_id",\ 781 .value = stringify(1),\ 782 },{\ 783 .driver = "virtio-9p-pci",\ 784 .property = "vectors",\ 785 .value = stringify(0),\ 786 },{\ 787 .driver = "VGA",\ 788 .property = "rombar",\ 789 .value = stringify(0),\ 790 },{\ 791 .driver = "vmware-svga",\ 792 .property = "rombar",\ 793 .value = stringify(0),\ 794 }, 795 796 static void pc_i440fx_0_13_machine_options(MachineClass *m) 797 { 798 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 799 pc_i440fx_0_14_machine_options(m); 800 m->hw_version = "0.13"; 801 SET_MACHINE_COMPAT(m, PC_COMPAT_0_13); 802 pcmc->kvmclock_enabled = false; 803 } 804 805 DEFINE_I440FX_MACHINE(v0_13, "pc-0.13", pc_compat_0_13, 806 pc_i440fx_0_13_machine_options); 807 808 809 #define PC_COMPAT_0_12 \ 810 {\ 811 .driver = "virtio-serial-pci",\ 812 .property = "max_ports",\ 813 .value = stringify(1),\ 814 },{\ 815 .driver = "virtio-serial-pci",\ 816 .property = "vectors",\ 817 .value = stringify(0),\ 818 },{\ 819 .driver = "usb-mouse",\ 820 .property = "serial",\ 821 .value = "1",\ 822 },{\ 823 .driver = "usb-tablet",\ 824 .property = "serial",\ 825 .value = "1",\ 826 },{\ 827 .driver = "usb-kbd",\ 828 .property = "serial",\ 829 .value = "1",\ 830 }, 831 832 static void pc_i440fx_0_12_machine_options(MachineClass *m) 833 { 834 pc_i440fx_0_13_machine_options(m); 835 m->hw_version = "0.12"; 836 SET_MACHINE_COMPAT(m, PC_COMPAT_0_12); 837 } 838 839 DEFINE_I440FX_MACHINE(v0_12, "pc-0.12", pc_compat_0_13, 840 pc_i440fx_0_12_machine_options); 841 842 843 #define PC_COMPAT_0_11 \ 844 {\ 845 .driver = "virtio-blk-pci",\ 846 .property = "vectors",\ 847 .value = stringify(0),\ 848 },{\ 849 .driver = TYPE_PCI_DEVICE,\ 850 .property = "rombar",\ 851 .value = stringify(0),\ 852 },{\ 853 .driver = "ide-drive",\ 854 .property = "ver",\ 855 .value = "0.11",\ 856 },{\ 857 .driver = "scsi-disk",\ 858 .property = "ver",\ 859 .value = "0.11",\ 860 }, 861 862 static void pc_i440fx_0_11_machine_options(MachineClass *m) 863 { 864 pc_i440fx_0_12_machine_options(m); 865 m->hw_version = "0.11"; 866 SET_MACHINE_COMPAT(m, PC_COMPAT_0_11); 867 } 868 869 DEFINE_I440FX_MACHINE(v0_11, "pc-0.11", pc_compat_0_13, 870 pc_i440fx_0_11_machine_options); 871 872 873 #define PC_COMPAT_0_10 \ 874 {\ 875 .driver = "virtio-blk-pci",\ 876 .property = "class",\ 877 .value = stringify(PCI_CLASS_STORAGE_OTHER),\ 878 },{\ 879 .driver = "virtio-serial-pci",\ 880 .property = "class",\ 881 .value = stringify(PCI_CLASS_DISPLAY_OTHER),\ 882 },{\ 883 .driver = "virtio-net-pci",\ 884 .property = "vectors",\ 885 .value = stringify(0),\ 886 },{\ 887 .driver = "ide-drive",\ 888 .property = "ver",\ 889 .value = "0.10",\ 890 },{\ 891 .driver = "scsi-disk",\ 892 .property = "ver",\ 893 .value = "0.10",\ 894 }, 895 896 static void pc_i440fx_0_10_machine_options(MachineClass *m) 897 { 898 pc_i440fx_0_11_machine_options(m); 899 m->hw_version = "0.10"; 900 SET_MACHINE_COMPAT(m, PC_COMPAT_0_10); 901 } 902 903 DEFINE_I440FX_MACHINE(v0_10, "pc-0.10", pc_compat_0_13, 904 pc_i440fx_0_10_machine_options); 905 906 typedef struct { 907 uint16_t gpu_device_id; 908 uint16_t pch_device_id; 909 uint8_t pch_revision_id; 910 } IGDDeviceIDInfo; 911 912 /* In real world different GPU should have different PCH. But actually 913 * the different PCH DIDs likely map to different PCH SKUs. We do the 914 * same thing for the GPU. For PCH, the different SKUs are going to be 915 * all the same silicon design and implementation, just different 916 * features turn on and off with fuses. The SW interfaces should be 917 * consistent across all SKUs in a given family (eg LPT). But just same 918 * features may not be supported. 919 * 920 * Most of these different PCH features probably don't matter to the 921 * Gfx driver, but obviously any difference in display port connections 922 * will so it should be fine with any PCH in case of passthrough. 923 * 924 * So currently use one PCH version, 0x8c4e, to cover all HSW(Haswell) 925 * scenarios, 0x9cc3 for BDW(Broadwell). 926 */ 927 static const IGDDeviceIDInfo igd_combo_id_infos[] = { 928 /* HSW Classic */ 929 {0x0402, 0x8c4e, 0x04}, /* HSWGT1D, HSWD_w7 */ 930 {0x0406, 0x8c4e, 0x04}, /* HSWGT1M, HSWM_w7 */ 931 {0x0412, 0x8c4e, 0x04}, /* HSWGT2D, HSWD_w7 */ 932 {0x0416, 0x8c4e, 0x04}, /* HSWGT2M, HSWM_w7 */ 933 {0x041E, 0x8c4e, 0x04}, /* HSWGT15D, HSWD_w7 */ 934 /* HSW ULT */ 935 {0x0A06, 0x8c4e, 0x04}, /* HSWGT1UT, HSWM_w7 */ 936 {0x0A16, 0x8c4e, 0x04}, /* HSWGT2UT, HSWM_w7 */ 937 {0x0A26, 0x8c4e, 0x06}, /* HSWGT3UT, HSWM_w7 */ 938 {0x0A2E, 0x8c4e, 0x04}, /* HSWGT3UT28W, HSWM_w7 */ 939 {0x0A1E, 0x8c4e, 0x04}, /* HSWGT2UX, HSWM_w7 */ 940 {0x0A0E, 0x8c4e, 0x04}, /* HSWGT1ULX, HSWM_w7 */ 941 /* HSW CRW */ 942 {0x0D26, 0x8c4e, 0x04}, /* HSWGT3CW, HSWM_w7 */ 943 {0x0D22, 0x8c4e, 0x04}, /* HSWGT3CWDT, HSWD_w7 */ 944 /* HSW Server */ 945 {0x041A, 0x8c4e, 0x04}, /* HSWSVGT2, HSWD_w7 */ 946 /* HSW SRVR */ 947 {0x040A, 0x8c4e, 0x04}, /* HSWSVGT1, HSWD_w7 */ 948 /* BSW */ 949 {0x1606, 0x9cc3, 0x03}, /* BDWULTGT1, BDWM_w7 */ 950 {0x1616, 0x9cc3, 0x03}, /* BDWULTGT2, BDWM_w7 */ 951 {0x1626, 0x9cc3, 0x03}, /* BDWULTGT3, BDWM_w7 */ 952 {0x160E, 0x9cc3, 0x03}, /* BDWULXGT1, BDWM_w7 */ 953 {0x161E, 0x9cc3, 0x03}, /* BDWULXGT2, BDWM_w7 */ 954 {0x1602, 0x9cc3, 0x03}, /* BDWHALOGT1, BDWM_w7 */ 955 {0x1612, 0x9cc3, 0x03}, /* BDWHALOGT2, BDWM_w7 */ 956 {0x1622, 0x9cc3, 0x03}, /* BDWHALOGT3, BDWM_w7 */ 957 {0x162B, 0x9cc3, 0x03}, /* BDWHALO28W, BDWM_w7 */ 958 {0x162A, 0x9cc3, 0x03}, /* BDWGT3WRKS, BDWM_w7 */ 959 {0x162D, 0x9cc3, 0x03}, /* BDWGT3SRVR, BDWM_w7 */ 960 }; 961 962 static void isa_bridge_class_init(ObjectClass *klass, void *data) 963 { 964 DeviceClass *dc = DEVICE_CLASS(klass); 965 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 966 967 dc->desc = "ISA bridge faked to support IGD PT"; 968 k->vendor_id = PCI_VENDOR_ID_INTEL; 969 k->class_id = PCI_CLASS_BRIDGE_ISA; 970 }; 971 972 static TypeInfo isa_bridge_info = { 973 .name = "igd-passthrough-isa-bridge", 974 .parent = TYPE_PCI_DEVICE, 975 .instance_size = sizeof(PCIDevice), 976 .class_init = isa_bridge_class_init, 977 }; 978 979 static void pt_graphics_register_types(void) 980 { 981 type_register_static(&isa_bridge_info); 982 } 983 type_init(pt_graphics_register_types) 984 985 void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id) 986 { 987 struct PCIDevice *bridge_dev; 988 int i, num; 989 uint16_t pch_dev_id = 0xffff; 990 uint8_t pch_rev_id; 991 992 num = ARRAY_SIZE(igd_combo_id_infos); 993 for (i = 0; i < num; i++) { 994 if (gpu_dev_id == igd_combo_id_infos[i].gpu_device_id) { 995 pch_dev_id = igd_combo_id_infos[i].pch_device_id; 996 pch_rev_id = igd_combo_id_infos[i].pch_revision_id; 997 } 998 } 999 1000 if (pch_dev_id == 0xffff) { 1001 return; 1002 } 1003 1004 /* Currently IGD drivers always need to access PCH by 1f.0. */ 1005 bridge_dev = pci_create_simple(bus, PCI_DEVFN(0x1f, 0), 1006 "igd-passthrough-isa-bridge"); 1007 1008 /* 1009 * Note that vendor id is always PCI_VENDOR_ID_INTEL. 1010 */ 1011 if (!bridge_dev) { 1012 fprintf(stderr, "set igd-passthrough-isa-bridge failed!\n"); 1013 return; 1014 } 1015 pci_config_set_device_id(bridge_dev->config, pch_dev_id); 1016 pci_config_set_revision(bridge_dev->config, pch_rev_id); 1017 } 1018 1019 static void isapc_machine_options(MachineClass *m) 1020 { 1021 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 1022 m->desc = "ISA-only PC"; 1023 m->max_cpus = 1; 1024 m->option_rom_has_mr = true; 1025 m->rom_file_has_mr = false; 1026 pcmc->pci_enabled = false; 1027 pcmc->has_acpi_build = false; 1028 pcmc->smbios_defaults = false; 1029 pcmc->gigabyte_align = false; 1030 pcmc->smbios_legacy_mode = true; 1031 pcmc->has_reserved_memory = false; 1032 } 1033 1034 DEFINE_PC_MACHINE(isapc, "isapc", pc_init_isa, 1035 isapc_machine_options); 1036 1037 1038 #ifdef CONFIG_XEN 1039 static void xenfv_machine_options(MachineClass *m) 1040 { 1041 m->desc = "Xen Fully-virtualized PC"; 1042 m->max_cpus = HVM_MAX_VCPUS; 1043 m->default_machine_opts = "accel=xen"; 1044 m->hot_add_cpu = pc_hot_add_cpu; 1045 } 1046 1047 DEFINE_PC_MACHINE(xenfv, "xenfv", pc_xen_hvm_init, 1048 xenfv_machine_options); 1049 #endif 1050