1 /* 2 * QEMU PC System Emulator 3 * 4 * Copyright (c) 2003-2004 Fabrice Bellard 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 #include "qemu/osdep.h" 26 27 #include "qemu/units.h" 28 #include "hw/hw.h" 29 #include "hw/loader.h" 30 #include "hw/i386/pc.h" 31 #include "hw/i386/apic.h" 32 #include "hw/display/ramfb.h" 33 #include "hw/firmware/smbios.h" 34 #include "hw/pci/pci.h" 35 #include "hw/pci/pci_ids.h" 36 #include "hw/usb.h" 37 #include "net/net.h" 38 #include "hw/boards.h" 39 #include "hw/ide.h" 40 #include "sysemu/kvm.h" 41 #include "hw/kvm/clock.h" 42 #include "sysemu/sysemu.h" 43 #include "hw/sysbus.h" 44 #include "sysemu/arch_init.h" 45 #include "hw/i2c/smbus.h" 46 #include "hw/xen/xen.h" 47 #include "exec/memory.h" 48 #include "exec/address-spaces.h" 49 #include "hw/acpi/acpi.h" 50 #include "cpu.h" 51 #include "qapi/error.h" 52 #include "qemu/error-report.h" 53 #ifdef CONFIG_XEN 54 #include <xen/hvm/hvm_info_table.h> 55 #include "hw/xen/xen_pt.h" 56 #endif 57 #include "migration/global_state.h" 58 #include "migration/misc.h" 59 #include "kvm_i386.h" 60 #include "sysemu/numa.h" 61 62 #define MAX_IDE_BUS 2 63 64 static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 }; 65 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 }; 66 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 }; 67 68 /* PC hardware initialisation */ 69 static void pc_init1(MachineState *machine, 70 const char *host_type, const char *pci_type) 71 { 72 PCMachineState *pcms = PC_MACHINE(machine); 73 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); 74 MemoryRegion *system_memory = get_system_memory(); 75 MemoryRegion *system_io = get_system_io(); 76 int i; 77 PCIBus *pci_bus; 78 ISABus *isa_bus; 79 PCII440FXState *i440fx_state; 80 int piix3_devfn = -1; 81 qemu_irq *i8259; 82 qemu_irq smi_irq; 83 GSIState *gsi_state; 84 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; 85 BusState *idebus[MAX_IDE_BUS]; 86 ISADevice *rtc_state; 87 MemoryRegion *ram_memory; 88 MemoryRegion *pci_memory; 89 MemoryRegion *rom_memory; 90 ram_addr_t lowmem; 91 92 /* 93 * Calculate ram split, for memory below and above 4G. It's a bit 94 * complicated for backward compatibility reasons ... 95 * 96 * - Traditional split is 3.5G (lowmem = 0xe0000000). This is the 97 * default value for max_ram_below_4g now. 98 * 99 * - Then, to gigabyte align the memory, we move the split to 3G 100 * (lowmem = 0xc0000000). But only in case we have to split in 101 * the first place, i.e. ram_size is larger than (traditional) 102 * lowmem. And for new machine types (gigabyte_align = true) 103 * only, for live migration compatibility reasons. 104 * 105 * - Next the max-ram-below-4g option was added, which allowed to 106 * reduce lowmem to a smaller value, to allow a larger PCI I/O 107 * window below 4G. qemu doesn't enforce gigabyte alignment here, 108 * but prints a warning. 109 * 110 * - Finally max-ram-below-4g got updated to also allow raising lowmem, 111 * so legacy non-PAE guests can get as much memory as possible in 112 * the 32bit address space below 4G. 113 * 114 * - Note that Xen has its own ram setp code in xen_ram_init(), 115 * called via xen_hvm_init(). 116 * 117 * Examples: 118 * qemu -M pc-1.7 -m 4G (old default) -> 3584M low, 512M high 119 * qemu -M pc -m 4G (new default) -> 3072M low, 1024M high 120 * qemu -M pc,max-ram-below-4g=2G -m 4G -> 2048M low, 2048M high 121 * qemu -M pc,max-ram-below-4g=4G -m 3968M -> 3968M low (=4G-128M) 122 */ 123 if (xen_enabled()) { 124 xen_hvm_init(pcms, &ram_memory); 125 } else { 126 if (!pcms->max_ram_below_4g) { 127 pcms->max_ram_below_4g = 0xe0000000; /* default: 3.5G */ 128 } 129 lowmem = pcms->max_ram_below_4g; 130 if (machine->ram_size >= pcms->max_ram_below_4g) { 131 if (pcmc->gigabyte_align) { 132 if (lowmem > 0xc0000000) { 133 lowmem = 0xc0000000; 134 } 135 if (lowmem & (1 * GiB - 1)) { 136 warn_report("Large machine and max_ram_below_4g " 137 "(%" PRIu64 ") not a multiple of 1G; " 138 "possible bad performance.", 139 pcms->max_ram_below_4g); 140 } 141 } 142 } 143 144 if (machine->ram_size >= lowmem) { 145 pcms->above_4g_mem_size = machine->ram_size - lowmem; 146 pcms->below_4g_mem_size = lowmem; 147 } else { 148 pcms->above_4g_mem_size = 0; 149 pcms->below_4g_mem_size = machine->ram_size; 150 } 151 } 152 153 pc_cpus_init(pcms); 154 155 if (kvm_enabled() && pcmc->kvmclock_enabled) { 156 kvmclock_create(); 157 } 158 159 if (pcmc->pci_enabled) { 160 pci_memory = g_new(MemoryRegion, 1); 161 memory_region_init(pci_memory, NULL, "pci", UINT64_MAX); 162 rom_memory = pci_memory; 163 } else { 164 pci_memory = NULL; 165 rom_memory = system_memory; 166 } 167 168 pc_guest_info_init(pcms); 169 170 if (pcmc->smbios_defaults) { 171 MachineClass *mc = MACHINE_GET_CLASS(machine); 172 /* These values are guest ABI, do not change */ 173 smbios_set_defaults("QEMU", "Standard PC (i440FX + PIIX, 1996)", 174 mc->name, pcmc->smbios_legacy_mode, 175 pcmc->smbios_uuid_encoded, 176 SMBIOS_ENTRY_POINT_21); 177 } 178 179 /* allocate ram and load rom/bios */ 180 if (!xen_enabled()) { 181 pc_memory_init(pcms, system_memory, 182 rom_memory, &ram_memory); 183 } else if (machine->kernel_filename != NULL) { 184 /* For xen HVM direct kernel boot, load linux here */ 185 xen_load_linux(pcms); 186 } 187 188 gsi_state = g_malloc0(sizeof(*gsi_state)); 189 if (kvm_ioapic_in_kernel()) { 190 kvm_pc_setup_irq_routing(pcmc->pci_enabled); 191 pcms->gsi = qemu_allocate_irqs(kvm_pc_gsi_handler, gsi_state, 192 GSI_NUM_PINS); 193 } else { 194 pcms->gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS); 195 } 196 197 if (pcmc->pci_enabled) { 198 pci_bus = i440fx_init(host_type, 199 pci_type, 200 &i440fx_state, &piix3_devfn, &isa_bus, pcms->gsi, 201 system_memory, system_io, machine->ram_size, 202 pcms->below_4g_mem_size, 203 pcms->above_4g_mem_size, 204 pci_memory, ram_memory); 205 pcms->bus = pci_bus; 206 } else { 207 pci_bus = NULL; 208 i440fx_state = NULL; 209 isa_bus = isa_bus_new(NULL, get_system_memory(), system_io, 210 &error_abort); 211 no_hpet = 1; 212 } 213 isa_bus_irqs(isa_bus, pcms->gsi); 214 215 if (kvm_pic_in_kernel()) { 216 i8259 = kvm_i8259_init(isa_bus); 217 } else if (xen_enabled()) { 218 i8259 = xen_interrupt_controller_init(); 219 } else { 220 i8259 = i8259_init(isa_bus, pc_allocate_cpu_irq()); 221 } 222 223 for (i = 0; i < ISA_NUM_IRQS; i++) { 224 gsi_state->i8259_irq[i] = i8259[i]; 225 } 226 g_free(i8259); 227 if (pcmc->pci_enabled) { 228 ioapic_init_gsi(gsi_state, "i440fx"); 229 } 230 231 pc_register_ferr_irq(pcms->gsi[13]); 232 233 pc_vga_init(isa_bus, pcmc->pci_enabled ? pci_bus : NULL); 234 235 assert(pcms->vmport != ON_OFF_AUTO__MAX); 236 if (pcms->vmport == ON_OFF_AUTO_AUTO) { 237 pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON; 238 } 239 240 /* init basic PC hardware */ 241 pc_basic_device_init(isa_bus, pcms->gsi, &rtc_state, true, 242 (pcms->vmport != ON_OFF_AUTO_ON), pcms->pit_enabled, 243 0x4); 244 245 pc_nic_init(pcmc, isa_bus, pci_bus); 246 247 ide_drive_get(hd, ARRAY_SIZE(hd)); 248 if (pcmc->pci_enabled) { 249 PCIDevice *dev; 250 if (xen_enabled()) { 251 dev = pci_piix3_xen_ide_init(pci_bus, hd, piix3_devfn + 1); 252 } else { 253 dev = pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1); 254 } 255 idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0"); 256 idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1"); 257 } else { 258 for(i = 0; i < MAX_IDE_BUS; i++) { 259 ISADevice *dev; 260 char busname[] = "ide.0"; 261 dev = isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i], 262 ide_irq[i], 263 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]); 264 /* 265 * The ide bus name is ide.0 for the first bus and ide.1 for the 266 * second one. 267 */ 268 busname[4] = '0' + i; 269 idebus[i] = qdev_get_child_bus(DEVICE(dev), busname); 270 } 271 } 272 273 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state); 274 275 if (pcmc->pci_enabled && machine_usb(machine)) { 276 pci_create_simple(pci_bus, piix3_devfn + 2, "piix3-usb-uhci"); 277 } 278 279 if (pcmc->pci_enabled && acpi_enabled) { 280 DeviceState *piix4_pm; 281 I2CBus *smbus; 282 283 smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0); 284 /* TODO: Populate SPD eeprom data. */ 285 smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, 286 pcms->gsi[9], smi_irq, 287 pc_machine_is_smm_enabled(pcms), 288 &piix4_pm); 289 smbus_eeprom_init(smbus, 8, NULL, 0); 290 291 object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP, 292 TYPE_HOTPLUG_HANDLER, 293 (Object **)&pcms->acpi_dev, 294 object_property_allow_set_link, 295 OBJ_PROP_LINK_STRONG, &error_abort); 296 object_property_set_link(OBJECT(machine), OBJECT(piix4_pm), 297 PC_MACHINE_ACPI_DEVICE_PROP, &error_abort); 298 } 299 300 if (pcms->acpi_nvdimm_state.is_enabled) { 301 nvdimm_init_acpi_state(&pcms->acpi_nvdimm_state, system_io, 302 pcms->fw_cfg, OBJECT(pcms)); 303 } 304 } 305 306 /* Looking for a pc_compat_2_4() function? It doesn't exist. 307 * pc_compat_*() functions that run on machine-init time and 308 * change global QEMU state are deprecated. Please don't create 309 * one, and implement any pc-*-2.4 (and newer) compat code in 310 * HW_COMPAT_*, PC_COMPAT_*, or * pc_*_machine_options(). 311 */ 312 313 static void pc_compat_2_3(MachineState *machine) 314 { 315 PCMachineState *pcms = PC_MACHINE(machine); 316 if (kvm_enabled()) { 317 pcms->smm = ON_OFF_AUTO_OFF; 318 } 319 } 320 321 static void pc_compat_2_2(MachineState *machine) 322 { 323 pc_compat_2_3(machine); 324 } 325 326 static void pc_compat_2_1(MachineState *machine) 327 { 328 pc_compat_2_2(machine); 329 x86_cpu_change_kvm_default("svm", NULL); 330 } 331 332 static void pc_compat_2_0(MachineState *machine) 333 { 334 pc_compat_2_1(machine); 335 } 336 337 static void pc_compat_1_7(MachineState *machine) 338 { 339 pc_compat_2_0(machine); 340 x86_cpu_change_kvm_default("x2apic", NULL); 341 } 342 343 static void pc_compat_1_6(MachineState *machine) 344 { 345 pc_compat_1_7(machine); 346 } 347 348 static void pc_compat_1_5(MachineState *machine) 349 { 350 pc_compat_1_6(machine); 351 } 352 353 static void pc_compat_1_4(MachineState *machine) 354 { 355 pc_compat_1_5(machine); 356 } 357 358 static void pc_compat_1_3(MachineState *machine) 359 { 360 pc_compat_1_4(machine); 361 enable_compat_apic_id_mode(); 362 } 363 364 /* PC compat function for pc-0.14 to pc-1.2 */ 365 static void pc_compat_1_2(MachineState *machine) 366 { 367 pc_compat_1_3(machine); 368 x86_cpu_change_kvm_default("kvm-pv-eoi", NULL); 369 } 370 371 /* PC compat function for pc-0.12 and pc-0.13 */ 372 static void pc_compat_0_13(MachineState *machine) 373 { 374 pc_compat_1_2(machine); 375 } 376 377 static void pc_init_isa(MachineState *machine) 378 { 379 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, TYPE_I440FX_PCI_DEVICE); 380 } 381 382 #ifdef CONFIG_XEN 383 static void pc_xen_hvm_init_pci(MachineState *machine) 384 { 385 const char *pci_type = has_igd_gfx_passthru ? 386 TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE : TYPE_I440FX_PCI_DEVICE; 387 388 pc_init1(machine, 389 TYPE_I440FX_PCI_HOST_BRIDGE, 390 pci_type); 391 } 392 393 static void pc_xen_hvm_init(MachineState *machine) 394 { 395 PCMachineState *pcms = PC_MACHINE(machine); 396 397 if (!xen_enabled()) { 398 error_report("xenfv machine requires the xen accelerator"); 399 exit(1); 400 } 401 402 pc_xen_hvm_init_pci(machine); 403 pci_create_simple(pcms->bus, -1, "xen-platform"); 404 } 405 #endif 406 407 #define DEFINE_I440FX_MACHINE(suffix, name, compatfn, optionfn) \ 408 static void pc_init_##suffix(MachineState *machine) \ 409 { \ 410 void (*compat)(MachineState *m) = (compatfn); \ 411 if (compat) { \ 412 compat(machine); \ 413 } \ 414 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, \ 415 TYPE_I440FX_PCI_DEVICE); \ 416 } \ 417 DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn) 418 419 static void pc_i440fx_machine_options(MachineClass *m) 420 { 421 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 422 pcmc->default_nic_model = "e1000"; 423 424 m->family = "pc_piix"; 425 m->desc = "Standard PC (i440FX + PIIX, 1996)"; 426 m->default_machine_opts = "firmware=bios-256k.bin"; 427 m->default_display = "std"; 428 machine_class_allow_dynamic_sysbus_dev(m, TYPE_RAMFB_DEVICE); 429 } 430 431 static void pc_i440fx_4_0_machine_options(MachineClass *m) 432 { 433 pc_i440fx_machine_options(m); 434 m->alias = "pc"; 435 m->is_default = 1; 436 } 437 438 DEFINE_I440FX_MACHINE(v4_0, "pc-i440fx-4.0", NULL, 439 pc_i440fx_4_0_machine_options); 440 441 static void pc_i440fx_3_1_machine_options(MachineClass *m) 442 { 443 pc_i440fx_4_0_machine_options(m); 444 m->is_default = 0; 445 m->alias = NULL; 446 SET_MACHINE_COMPAT(m, PC_COMPAT_3_1); 447 } 448 449 DEFINE_I440FX_MACHINE(v3_1, "pc-i440fx-3.1", NULL, 450 pc_i440fx_3_1_machine_options); 451 452 static void pc_i440fx_3_0_machine_options(MachineClass *m) 453 { 454 pc_i440fx_3_1_machine_options(m); 455 SET_MACHINE_COMPAT(m, PC_COMPAT_3_0); 456 } 457 458 DEFINE_I440FX_MACHINE(v3_0, "pc-i440fx-3.0", NULL, 459 pc_i440fx_3_0_machine_options); 460 461 static void pc_i440fx_2_12_machine_options(MachineClass *m) 462 { 463 pc_i440fx_3_0_machine_options(m); 464 SET_MACHINE_COMPAT(m, PC_COMPAT_2_12); 465 } 466 467 DEFINE_I440FX_MACHINE(v2_12, "pc-i440fx-2.12", NULL, 468 pc_i440fx_2_12_machine_options); 469 470 static void pc_i440fx_2_11_machine_options(MachineClass *m) 471 { 472 pc_i440fx_2_12_machine_options(m); 473 SET_MACHINE_COMPAT(m, PC_COMPAT_2_11); 474 } 475 476 DEFINE_I440FX_MACHINE(v2_11, "pc-i440fx-2.11", NULL, 477 pc_i440fx_2_11_machine_options); 478 479 static void pc_i440fx_2_10_machine_options(MachineClass *m) 480 { 481 pc_i440fx_2_11_machine_options(m); 482 SET_MACHINE_COMPAT(m, PC_COMPAT_2_10); 483 m->auto_enable_numa_with_memhp = false; 484 } 485 486 DEFINE_I440FX_MACHINE(v2_10, "pc-i440fx-2.10", NULL, 487 pc_i440fx_2_10_machine_options); 488 489 static void pc_i440fx_2_9_machine_options(MachineClass *m) 490 { 491 pc_i440fx_2_10_machine_options(m); 492 SET_MACHINE_COMPAT(m, PC_COMPAT_2_9); 493 m->numa_auto_assign_ram = numa_legacy_auto_assign_ram; 494 } 495 496 DEFINE_I440FX_MACHINE(v2_9, "pc-i440fx-2.9", NULL, 497 pc_i440fx_2_9_machine_options); 498 499 static void pc_i440fx_2_8_machine_options(MachineClass *m) 500 { 501 pc_i440fx_2_9_machine_options(m); 502 SET_MACHINE_COMPAT(m, PC_COMPAT_2_8); 503 } 504 505 DEFINE_I440FX_MACHINE(v2_8, "pc-i440fx-2.8", NULL, 506 pc_i440fx_2_8_machine_options); 507 508 509 static void pc_i440fx_2_7_machine_options(MachineClass *m) 510 { 511 pc_i440fx_2_8_machine_options(m); 512 SET_MACHINE_COMPAT(m, PC_COMPAT_2_7); 513 } 514 515 DEFINE_I440FX_MACHINE(v2_7, "pc-i440fx-2.7", NULL, 516 pc_i440fx_2_7_machine_options); 517 518 519 static void pc_i440fx_2_6_machine_options(MachineClass *m) 520 { 521 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 522 pc_i440fx_2_7_machine_options(m); 523 pcmc->legacy_cpu_hotplug = true; 524 pcmc->linuxboot_dma_enabled = false; 525 SET_MACHINE_COMPAT(m, PC_COMPAT_2_6); 526 } 527 528 DEFINE_I440FX_MACHINE(v2_6, "pc-i440fx-2.6", NULL, 529 pc_i440fx_2_6_machine_options); 530 531 532 static void pc_i440fx_2_5_machine_options(MachineClass *m) 533 { 534 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 535 pc_i440fx_2_6_machine_options(m); 536 pcmc->save_tsc_khz = false; 537 m->legacy_fw_cfg_order = 1; 538 SET_MACHINE_COMPAT(m, PC_COMPAT_2_5); 539 } 540 541 DEFINE_I440FX_MACHINE(v2_5, "pc-i440fx-2.5", NULL, 542 pc_i440fx_2_5_machine_options); 543 544 545 static void pc_i440fx_2_4_machine_options(MachineClass *m) 546 { 547 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 548 pc_i440fx_2_5_machine_options(m); 549 m->hw_version = "2.4.0"; 550 pcmc->broken_reserved_end = true; 551 SET_MACHINE_COMPAT(m, PC_COMPAT_2_4); 552 } 553 554 DEFINE_I440FX_MACHINE(v2_4, "pc-i440fx-2.4", NULL, 555 pc_i440fx_2_4_machine_options) 556 557 558 static void pc_i440fx_2_3_machine_options(MachineClass *m) 559 { 560 pc_i440fx_2_4_machine_options(m); 561 m->hw_version = "2.3.0"; 562 SET_MACHINE_COMPAT(m, PC_COMPAT_2_3); 563 } 564 565 DEFINE_I440FX_MACHINE(v2_3, "pc-i440fx-2.3", pc_compat_2_3, 566 pc_i440fx_2_3_machine_options); 567 568 569 static void pc_i440fx_2_2_machine_options(MachineClass *m) 570 { 571 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 572 pc_i440fx_2_3_machine_options(m); 573 m->hw_version = "2.2.0"; 574 m->default_machine_opts = "firmware=bios-256k.bin,suppress-vmdesc=on"; 575 SET_MACHINE_COMPAT(m, PC_COMPAT_2_2); 576 pcmc->rsdp_in_ram = false; 577 } 578 579 DEFINE_I440FX_MACHINE(v2_2, "pc-i440fx-2.2", pc_compat_2_2, 580 pc_i440fx_2_2_machine_options); 581 582 583 static void pc_i440fx_2_1_machine_options(MachineClass *m) 584 { 585 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 586 pc_i440fx_2_2_machine_options(m); 587 m->hw_version = "2.1.0"; 588 m->default_display = NULL; 589 SET_MACHINE_COMPAT(m, PC_COMPAT_2_1); 590 pcmc->smbios_uuid_encoded = false; 591 pcmc->enforce_aligned_dimm = false; 592 } 593 594 DEFINE_I440FX_MACHINE(v2_1, "pc-i440fx-2.1", pc_compat_2_1, 595 pc_i440fx_2_1_machine_options); 596 597 598 599 static void pc_i440fx_2_0_machine_options(MachineClass *m) 600 { 601 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 602 pc_i440fx_2_1_machine_options(m); 603 m->hw_version = "2.0.0"; 604 SET_MACHINE_COMPAT(m, PC_COMPAT_2_0); 605 pcmc->smbios_legacy_mode = true; 606 pcmc->has_reserved_memory = false; 607 /* This value depends on the actual DSDT and SSDT compiled into 608 * the source QEMU; unfortunately it depends on the binary and 609 * not on the machine type, so we cannot make pc-i440fx-1.7 work on 610 * both QEMU 1.7 and QEMU 2.0. 611 * 612 * Large variations cause migration to fail for more than one 613 * consecutive value of the "-smp" maxcpus option. 614 * 615 * For small variations of the kind caused by different iasl versions, 616 * the 4k rounding usually leaves slack. However, there could be still 617 * one or two values that break. For QEMU 1.7 and QEMU 2.0 the 618 * slack is only ~10 bytes before one "-smp maxcpus" value breaks! 619 * 620 * 6652 is valid for QEMU 2.0, the right value for pc-i440fx-1.7 on 621 * QEMU 1.7 it is 6414. For RHEL/CentOS 7.0 it is 6418. 622 */ 623 pcmc->legacy_acpi_table_size = 6652; 624 pcmc->acpi_data_size = 0x10000; 625 } 626 627 DEFINE_I440FX_MACHINE(v2_0, "pc-i440fx-2.0", pc_compat_2_0, 628 pc_i440fx_2_0_machine_options); 629 630 631 static void pc_i440fx_1_7_machine_options(MachineClass *m) 632 { 633 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 634 pc_i440fx_2_0_machine_options(m); 635 m->hw_version = "1.7.0"; 636 m->default_machine_opts = NULL; 637 m->option_rom_has_mr = true; 638 SET_MACHINE_COMPAT(m, PC_COMPAT_1_7); 639 pcmc->smbios_defaults = false; 640 pcmc->gigabyte_align = false; 641 pcmc->legacy_acpi_table_size = 6414; 642 } 643 644 DEFINE_I440FX_MACHINE(v1_7, "pc-i440fx-1.7", pc_compat_1_7, 645 pc_i440fx_1_7_machine_options); 646 647 648 static void pc_i440fx_1_6_machine_options(MachineClass *m) 649 { 650 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 651 pc_i440fx_1_7_machine_options(m); 652 m->hw_version = "1.6.0"; 653 m->rom_file_has_mr = false; 654 SET_MACHINE_COMPAT(m, PC_COMPAT_1_6); 655 pcmc->has_acpi_build = false; 656 } 657 658 DEFINE_I440FX_MACHINE(v1_6, "pc-i440fx-1.6", pc_compat_1_6, 659 pc_i440fx_1_6_machine_options); 660 661 662 static void pc_i440fx_1_5_machine_options(MachineClass *m) 663 { 664 pc_i440fx_1_6_machine_options(m); 665 m->hw_version = "1.5.0"; 666 SET_MACHINE_COMPAT(m, PC_COMPAT_1_5); 667 } 668 669 DEFINE_I440FX_MACHINE(v1_5, "pc-i440fx-1.5", pc_compat_1_5, 670 pc_i440fx_1_5_machine_options); 671 672 673 static void pc_i440fx_1_4_machine_options(MachineClass *m) 674 { 675 pc_i440fx_1_5_machine_options(m); 676 m->hw_version = "1.4.0"; 677 m->hot_add_cpu = NULL; 678 SET_MACHINE_COMPAT(m, PC_COMPAT_1_4); 679 } 680 681 DEFINE_I440FX_MACHINE(v1_4, "pc-i440fx-1.4", pc_compat_1_4, 682 pc_i440fx_1_4_machine_options); 683 684 685 #define PC_COMPAT_1_3 \ 686 PC_CPU_MODEL_IDS("1.3.0") \ 687 {\ 688 .driver = "usb-tablet",\ 689 .property = "usb_version",\ 690 .value = stringify(1),\ 691 },{\ 692 .driver = "virtio-net-pci",\ 693 .property = "ctrl_mac_addr",\ 694 .value = "off", \ 695 },{ \ 696 .driver = "virtio-net-pci", \ 697 .property = "mq", \ 698 .value = "off", \ 699 }, {\ 700 .driver = "e1000",\ 701 .property = "autonegotiation",\ 702 .value = "off",\ 703 }, 704 705 706 static void pc_i440fx_1_3_machine_options(MachineClass *m) 707 { 708 pc_i440fx_1_4_machine_options(m); 709 m->hw_version = "1.3.0"; 710 SET_MACHINE_COMPAT(m, PC_COMPAT_1_3); 711 } 712 713 DEFINE_I440FX_MACHINE(v1_3, "pc-1.3", pc_compat_1_3, 714 pc_i440fx_1_3_machine_options); 715 716 717 #define PC_COMPAT_1_2 \ 718 PC_CPU_MODEL_IDS("1.2.0") \ 719 {\ 720 .driver = "nec-usb-xhci",\ 721 .property = "msi",\ 722 .value = "off",\ 723 },{\ 724 .driver = "nec-usb-xhci",\ 725 .property = "msix",\ 726 .value = "off",\ 727 },{\ 728 .driver = "ivshmem",\ 729 .property = "use64",\ 730 .value = "0",\ 731 },{\ 732 .driver = "qxl",\ 733 .property = "revision",\ 734 .value = stringify(3),\ 735 },{\ 736 .driver = "qxl-vga",\ 737 .property = "revision",\ 738 .value = stringify(3),\ 739 },{\ 740 .driver = "VGA",\ 741 .property = "mmio",\ 742 .value = "off",\ 743 }, 744 745 static void pc_i440fx_1_2_machine_options(MachineClass *m) 746 { 747 pc_i440fx_1_3_machine_options(m); 748 m->hw_version = "1.2.0"; 749 SET_MACHINE_COMPAT(m, PC_COMPAT_1_2); 750 } 751 752 DEFINE_I440FX_MACHINE(v1_2, "pc-1.2", pc_compat_1_2, 753 pc_i440fx_1_2_machine_options); 754 755 756 #define PC_COMPAT_1_1 \ 757 PC_CPU_MODEL_IDS("1.1.0") \ 758 {\ 759 .driver = "virtio-scsi-pci",\ 760 .property = "hotplug",\ 761 .value = "off",\ 762 },{\ 763 .driver = "virtio-scsi-pci",\ 764 .property = "param_change",\ 765 .value = "off",\ 766 },{\ 767 .driver = "VGA",\ 768 .property = "vgamem_mb",\ 769 .value = stringify(8),\ 770 },{\ 771 .driver = "vmware-svga",\ 772 .property = "vgamem_mb",\ 773 .value = stringify(8),\ 774 },{\ 775 .driver = "qxl-vga",\ 776 .property = "vgamem_mb",\ 777 .value = stringify(8),\ 778 },{\ 779 .driver = "qxl",\ 780 .property = "vgamem_mb",\ 781 .value = stringify(8),\ 782 },{\ 783 .driver = "virtio-blk-pci",\ 784 .property = "config-wce",\ 785 .value = "off",\ 786 }, 787 788 static void pc_i440fx_1_1_machine_options(MachineClass *m) 789 { 790 pc_i440fx_1_2_machine_options(m); 791 m->hw_version = "1.1.0"; 792 SET_MACHINE_COMPAT(m, PC_COMPAT_1_1); 793 } 794 795 DEFINE_I440FX_MACHINE(v1_1, "pc-1.1", pc_compat_1_2, 796 pc_i440fx_1_1_machine_options); 797 798 799 #define PC_COMPAT_1_0 \ 800 PC_CPU_MODEL_IDS("1.0") \ 801 {\ 802 .driver = TYPE_ISA_FDC,\ 803 .property = "check_media_rate",\ 804 .value = "off",\ 805 }, {\ 806 .driver = "virtio-balloon-pci",\ 807 .property = "class",\ 808 .value = stringify(PCI_CLASS_MEMORY_RAM),\ 809 },{\ 810 .driver = "apic-common",\ 811 .property = "vapic",\ 812 .value = "off",\ 813 },{\ 814 .driver = TYPE_USB_DEVICE,\ 815 .property = "full-path",\ 816 .value = "no",\ 817 }, 818 819 static void pc_i440fx_1_0_machine_options(MachineClass *m) 820 { 821 pc_i440fx_1_1_machine_options(m); 822 m->hw_version = "1.0"; 823 SET_MACHINE_COMPAT(m, PC_COMPAT_1_0); 824 } 825 826 DEFINE_I440FX_MACHINE(v1_0, "pc-1.0", pc_compat_1_2, 827 pc_i440fx_1_0_machine_options); 828 829 830 #define PC_COMPAT_0_15 \ 831 PC_CPU_MODEL_IDS("0.15") 832 833 static void pc_i440fx_0_15_machine_options(MachineClass *m) 834 { 835 pc_i440fx_1_0_machine_options(m); 836 m->hw_version = "0.15"; 837 m->deprecation_reason = "use a newer machine type instead"; 838 SET_MACHINE_COMPAT(m, PC_COMPAT_0_15); 839 } 840 841 DEFINE_I440FX_MACHINE(v0_15, "pc-0.15", pc_compat_1_2, 842 pc_i440fx_0_15_machine_options); 843 844 845 #define PC_COMPAT_0_14 \ 846 PC_CPU_MODEL_IDS("0.14") \ 847 {\ 848 .driver = "virtio-blk-pci",\ 849 .property = "event_idx",\ 850 .value = "off",\ 851 },{\ 852 .driver = "virtio-serial-pci",\ 853 .property = "event_idx",\ 854 .value = "off",\ 855 },{\ 856 .driver = "virtio-net-pci",\ 857 .property = "event_idx",\ 858 .value = "off",\ 859 },{\ 860 .driver = "virtio-balloon-pci",\ 861 .property = "event_idx",\ 862 .value = "off",\ 863 },{\ 864 .driver = "qxl",\ 865 .property = "revision",\ 866 .value = stringify(2),\ 867 },{\ 868 .driver = "qxl-vga",\ 869 .property = "revision",\ 870 .value = stringify(2),\ 871 }, 872 873 static void pc_i440fx_0_14_machine_options(MachineClass *m) 874 { 875 pc_i440fx_0_15_machine_options(m); 876 m->hw_version = "0.14"; 877 SET_MACHINE_COMPAT(m, PC_COMPAT_0_14); 878 } 879 880 DEFINE_I440FX_MACHINE(v0_14, "pc-0.14", pc_compat_1_2, 881 pc_i440fx_0_14_machine_options); 882 883 884 #define PC_COMPAT_0_13 \ 885 PC_CPU_MODEL_IDS("0.13") \ 886 {\ 887 .driver = TYPE_PCI_DEVICE,\ 888 .property = "command_serr_enable",\ 889 .value = "off",\ 890 },{\ 891 .driver = "AC97",\ 892 .property = "use_broken_id",\ 893 .value = stringify(1),\ 894 },{\ 895 .driver = "virtio-9p-pci",\ 896 .property = "vectors",\ 897 .value = stringify(0),\ 898 },{\ 899 .driver = "VGA",\ 900 .property = "rombar",\ 901 .value = stringify(0),\ 902 },{\ 903 .driver = "vmware-svga",\ 904 .property = "rombar",\ 905 .value = stringify(0),\ 906 }, 907 908 static void pc_i440fx_0_13_machine_options(MachineClass *m) 909 { 910 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 911 pc_i440fx_0_14_machine_options(m); 912 m->hw_version = "0.13"; 913 SET_MACHINE_COMPAT(m, PC_COMPAT_0_13); 914 pcmc->kvmclock_enabled = false; 915 } 916 917 DEFINE_I440FX_MACHINE(v0_13, "pc-0.13", pc_compat_0_13, 918 pc_i440fx_0_13_machine_options); 919 920 921 #define PC_COMPAT_0_12 \ 922 PC_CPU_MODEL_IDS("0.12") \ 923 {\ 924 .driver = "virtio-serial-pci",\ 925 .property = "max_ports",\ 926 .value = stringify(1),\ 927 },{\ 928 .driver = "virtio-serial-pci",\ 929 .property = "vectors",\ 930 .value = stringify(0),\ 931 },{\ 932 .driver = "usb-mouse",\ 933 .property = "serial",\ 934 .value = "1",\ 935 },{\ 936 .driver = "usb-tablet",\ 937 .property = "serial",\ 938 .value = "1",\ 939 },{\ 940 .driver = "usb-kbd",\ 941 .property = "serial",\ 942 .value = "1",\ 943 }, 944 945 static void pc_i440fx_0_12_machine_options(MachineClass *m) 946 { 947 pc_i440fx_0_13_machine_options(m); 948 m->hw_version = "0.12"; 949 SET_MACHINE_COMPAT(m, PC_COMPAT_0_12); 950 } 951 952 DEFINE_I440FX_MACHINE(v0_12, "pc-0.12", pc_compat_0_13, 953 pc_i440fx_0_12_machine_options); 954 955 typedef struct { 956 uint16_t gpu_device_id; 957 uint16_t pch_device_id; 958 uint8_t pch_revision_id; 959 } IGDDeviceIDInfo; 960 961 /* In real world different GPU should have different PCH. But actually 962 * the different PCH DIDs likely map to different PCH SKUs. We do the 963 * same thing for the GPU. For PCH, the different SKUs are going to be 964 * all the same silicon design and implementation, just different 965 * features turn on and off with fuses. The SW interfaces should be 966 * consistent across all SKUs in a given family (eg LPT). But just same 967 * features may not be supported. 968 * 969 * Most of these different PCH features probably don't matter to the 970 * Gfx driver, but obviously any difference in display port connections 971 * will so it should be fine with any PCH in case of passthrough. 972 * 973 * So currently use one PCH version, 0x8c4e, to cover all HSW(Haswell) 974 * scenarios, 0x9cc3 for BDW(Broadwell). 975 */ 976 static const IGDDeviceIDInfo igd_combo_id_infos[] = { 977 /* HSW Classic */ 978 {0x0402, 0x8c4e, 0x04}, /* HSWGT1D, HSWD_w7 */ 979 {0x0406, 0x8c4e, 0x04}, /* HSWGT1M, HSWM_w7 */ 980 {0x0412, 0x8c4e, 0x04}, /* HSWGT2D, HSWD_w7 */ 981 {0x0416, 0x8c4e, 0x04}, /* HSWGT2M, HSWM_w7 */ 982 {0x041E, 0x8c4e, 0x04}, /* HSWGT15D, HSWD_w7 */ 983 /* HSW ULT */ 984 {0x0A06, 0x8c4e, 0x04}, /* HSWGT1UT, HSWM_w7 */ 985 {0x0A16, 0x8c4e, 0x04}, /* HSWGT2UT, HSWM_w7 */ 986 {0x0A26, 0x8c4e, 0x06}, /* HSWGT3UT, HSWM_w7 */ 987 {0x0A2E, 0x8c4e, 0x04}, /* HSWGT3UT28W, HSWM_w7 */ 988 {0x0A1E, 0x8c4e, 0x04}, /* HSWGT2UX, HSWM_w7 */ 989 {0x0A0E, 0x8c4e, 0x04}, /* HSWGT1ULX, HSWM_w7 */ 990 /* HSW CRW */ 991 {0x0D26, 0x8c4e, 0x04}, /* HSWGT3CW, HSWM_w7 */ 992 {0x0D22, 0x8c4e, 0x04}, /* HSWGT3CWDT, HSWD_w7 */ 993 /* HSW Server */ 994 {0x041A, 0x8c4e, 0x04}, /* HSWSVGT2, HSWD_w7 */ 995 /* HSW SRVR */ 996 {0x040A, 0x8c4e, 0x04}, /* HSWSVGT1, HSWD_w7 */ 997 /* BSW */ 998 {0x1606, 0x9cc3, 0x03}, /* BDWULTGT1, BDWM_w7 */ 999 {0x1616, 0x9cc3, 0x03}, /* BDWULTGT2, BDWM_w7 */ 1000 {0x1626, 0x9cc3, 0x03}, /* BDWULTGT3, BDWM_w7 */ 1001 {0x160E, 0x9cc3, 0x03}, /* BDWULXGT1, BDWM_w7 */ 1002 {0x161E, 0x9cc3, 0x03}, /* BDWULXGT2, BDWM_w7 */ 1003 {0x1602, 0x9cc3, 0x03}, /* BDWHALOGT1, BDWM_w7 */ 1004 {0x1612, 0x9cc3, 0x03}, /* BDWHALOGT2, BDWM_w7 */ 1005 {0x1622, 0x9cc3, 0x03}, /* BDWHALOGT3, BDWM_w7 */ 1006 {0x162B, 0x9cc3, 0x03}, /* BDWHALO28W, BDWM_w7 */ 1007 {0x162A, 0x9cc3, 0x03}, /* BDWGT3WRKS, BDWM_w7 */ 1008 {0x162D, 0x9cc3, 0x03}, /* BDWGT3SRVR, BDWM_w7 */ 1009 }; 1010 1011 static void isa_bridge_class_init(ObjectClass *klass, void *data) 1012 { 1013 DeviceClass *dc = DEVICE_CLASS(klass); 1014 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 1015 1016 dc->desc = "ISA bridge faked to support IGD PT"; 1017 k->vendor_id = PCI_VENDOR_ID_INTEL; 1018 k->class_id = PCI_CLASS_BRIDGE_ISA; 1019 }; 1020 1021 static TypeInfo isa_bridge_info = { 1022 .name = "igd-passthrough-isa-bridge", 1023 .parent = TYPE_PCI_DEVICE, 1024 .instance_size = sizeof(PCIDevice), 1025 .class_init = isa_bridge_class_init, 1026 .interfaces = (InterfaceInfo[]) { 1027 { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 1028 { }, 1029 }, 1030 }; 1031 1032 static void pt_graphics_register_types(void) 1033 { 1034 type_register_static(&isa_bridge_info); 1035 } 1036 type_init(pt_graphics_register_types) 1037 1038 void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id) 1039 { 1040 struct PCIDevice *bridge_dev; 1041 int i, num; 1042 uint16_t pch_dev_id = 0xffff; 1043 uint8_t pch_rev_id; 1044 1045 num = ARRAY_SIZE(igd_combo_id_infos); 1046 for (i = 0; i < num; i++) { 1047 if (gpu_dev_id == igd_combo_id_infos[i].gpu_device_id) { 1048 pch_dev_id = igd_combo_id_infos[i].pch_device_id; 1049 pch_rev_id = igd_combo_id_infos[i].pch_revision_id; 1050 } 1051 } 1052 1053 if (pch_dev_id == 0xffff) { 1054 return; 1055 } 1056 1057 /* Currently IGD drivers always need to access PCH by 1f.0. */ 1058 bridge_dev = pci_create_simple(bus, PCI_DEVFN(0x1f, 0), 1059 "igd-passthrough-isa-bridge"); 1060 1061 /* 1062 * Note that vendor id is always PCI_VENDOR_ID_INTEL. 1063 */ 1064 if (!bridge_dev) { 1065 fprintf(stderr, "set igd-passthrough-isa-bridge failed!\n"); 1066 return; 1067 } 1068 pci_config_set_device_id(bridge_dev->config, pch_dev_id); 1069 pci_config_set_revision(bridge_dev->config, pch_rev_id); 1070 } 1071 1072 static void isapc_machine_options(MachineClass *m) 1073 { 1074 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 1075 m->desc = "ISA-only PC"; 1076 m->max_cpus = 1; 1077 m->option_rom_has_mr = true; 1078 m->rom_file_has_mr = false; 1079 pcmc->pci_enabled = false; 1080 pcmc->has_acpi_build = false; 1081 pcmc->smbios_defaults = false; 1082 pcmc->gigabyte_align = false; 1083 pcmc->smbios_legacy_mode = true; 1084 pcmc->has_reserved_memory = false; 1085 pcmc->default_nic_model = "ne2k_isa"; 1086 m->default_cpu_type = X86_CPU_TYPE_NAME("486"); 1087 } 1088 1089 DEFINE_PC_MACHINE(isapc, "isapc", pc_init_isa, 1090 isapc_machine_options); 1091 1092 1093 #ifdef CONFIG_XEN 1094 static void xenfv_machine_options(MachineClass *m) 1095 { 1096 m->desc = "Xen Fully-virtualized PC"; 1097 m->max_cpus = HVM_MAX_VCPUS; 1098 m->default_machine_opts = "accel=xen"; 1099 } 1100 1101 DEFINE_PC_MACHINE(xenfv, "xenfv", pc_xen_hvm_init, 1102 xenfv_machine_options); 1103 #endif 1104