xref: /openbmc/qemu/hw/i386/pc_piix.c (revision 38472890)
1 /*
2  * QEMU PC System Emulator
3  *
4  * Copyright (c) 2003-2004 Fabrice Bellard
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to deal
8  * in the Software without restriction, including without limitation the rights
9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10  * copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22  * THE SOFTWARE.
23  */
24 
25 #include "qemu/osdep.h"
26 #include "config-devices.h"
27 
28 #include "qemu/units.h"
29 #include "hw/loader.h"
30 #include "hw/i386/x86.h"
31 #include "hw/i386/pc.h"
32 #include "hw/i386/apic.h"
33 #include "hw/pci-host/i440fx.h"
34 #include "hw/southbridge/piix.h"
35 #include "hw/display/ramfb.h"
36 #include "hw/firmware/smbios.h"
37 #include "hw/pci/pci.h"
38 #include "hw/pci/pci_ids.h"
39 #include "hw/usb.h"
40 #include "net/net.h"
41 #include "hw/ide/pci.h"
42 #include "hw/irq.h"
43 #include "sysemu/kvm.h"
44 #include "hw/kvm/clock.h"
45 #include "sysemu/sysemu.h"
46 #include "hw/sysbus.h"
47 #include "sysemu/arch_init.h"
48 #include "hw/i2c/smbus_eeprom.h"
49 #include "hw/xen/xen.h"
50 #include "exec/memory.h"
51 #include "exec/address-spaces.h"
52 #include "hw/acpi/acpi.h"
53 #include "cpu.h"
54 #include "qapi/error.h"
55 #include "qemu/error-report.h"
56 #ifdef CONFIG_XEN
57 #include <xen/hvm/hvm_info_table.h>
58 #include "hw/xen/xen_pt.h"
59 #endif
60 #include "migration/global_state.h"
61 #include "migration/misc.h"
62 #include "sysemu/numa.h"
63 #include "hw/mem/nvdimm.h"
64 
65 #define MAX_IDE_BUS 2
66 
67 #ifdef CONFIG_IDE_ISA
68 static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 };
69 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 };
70 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
71 #endif
72 
73 /* PC hardware initialisation */
74 static void pc_init1(MachineState *machine,
75                      const char *host_type, const char *pci_type)
76 {
77     PCMachineState *pcms = PC_MACHINE(machine);
78     PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
79     X86MachineState *x86ms = X86_MACHINE(machine);
80     MemoryRegion *system_memory = get_system_memory();
81     MemoryRegion *system_io = get_system_io();
82     PCIBus *pci_bus;
83     ISABus *isa_bus;
84     PCII440FXState *i440fx_state;
85     int piix3_devfn = -1;
86     qemu_irq smi_irq;
87     GSIState *gsi_state;
88     BusState *idebus[MAX_IDE_BUS];
89     ISADevice *rtc_state;
90     MemoryRegion *ram_memory;
91     MemoryRegion *pci_memory;
92     MemoryRegion *rom_memory;
93     ram_addr_t lowmem;
94 
95     /*
96      * Calculate ram split, for memory below and above 4G.  It's a bit
97      * complicated for backward compatibility reasons ...
98      *
99      *  - Traditional split is 3.5G (lowmem = 0xe0000000).  This is the
100      *    default value for max_ram_below_4g now.
101      *
102      *  - Then, to gigabyte align the memory, we move the split to 3G
103      *    (lowmem = 0xc0000000).  But only in case we have to split in
104      *    the first place, i.e. ram_size is larger than (traditional)
105      *    lowmem.  And for new machine types (gigabyte_align = true)
106      *    only, for live migration compatibility reasons.
107      *
108      *  - Next the max-ram-below-4g option was added, which allowed to
109      *    reduce lowmem to a smaller value, to allow a larger PCI I/O
110      *    window below 4G.  qemu doesn't enforce gigabyte alignment here,
111      *    but prints a warning.
112      *
113      *  - Finally max-ram-below-4g got updated to also allow raising lowmem,
114      *    so legacy non-PAE guests can get as much memory as possible in
115      *    the 32bit address space below 4G.
116      *
117      *  - Note that Xen has its own ram setp code in xen_ram_init(),
118      *    called via xen_hvm_init().
119      *
120      * Examples:
121      *    qemu -M pc-1.7 -m 4G    (old default)    -> 3584M low,  512M high
122      *    qemu -M pc -m 4G        (new default)    -> 3072M low, 1024M high
123      *    qemu -M pc,max-ram-below-4g=2G -m 4G     -> 2048M low, 2048M high
124      *    qemu -M pc,max-ram-below-4g=4G -m 3968M  -> 3968M low (=4G-128M)
125      */
126     if (xen_enabled()) {
127         xen_hvm_init(pcms, &ram_memory);
128     } else {
129         if (!x86ms->max_ram_below_4g) {
130             x86ms->max_ram_below_4g = 0xe0000000; /* default: 3.5G */
131         }
132         lowmem = x86ms->max_ram_below_4g;
133         if (machine->ram_size >= x86ms->max_ram_below_4g) {
134             if (pcmc->gigabyte_align) {
135                 if (lowmem > 0xc0000000) {
136                     lowmem = 0xc0000000;
137                 }
138                 if (lowmem & (1 * GiB - 1)) {
139                     warn_report("Large machine and max_ram_below_4g "
140                                 "(%" PRIu64 ") not a multiple of 1G; "
141                                 "possible bad performance.",
142                                 x86ms->max_ram_below_4g);
143                 }
144             }
145         }
146 
147         if (machine->ram_size >= lowmem) {
148             x86ms->above_4g_mem_size = machine->ram_size - lowmem;
149             x86ms->below_4g_mem_size = lowmem;
150         } else {
151             x86ms->above_4g_mem_size = 0;
152             x86ms->below_4g_mem_size = machine->ram_size;
153         }
154     }
155 
156     x86_cpus_init(x86ms, pcmc->default_cpu_version);
157 
158     if (kvm_enabled() && pcmc->kvmclock_enabled) {
159         kvmclock_create();
160     }
161 
162     if (pcmc->pci_enabled) {
163         pci_memory = g_new(MemoryRegion, 1);
164         memory_region_init(pci_memory, NULL, "pci", UINT64_MAX);
165         rom_memory = pci_memory;
166     } else {
167         pci_memory = NULL;
168         rom_memory = system_memory;
169     }
170 
171     pc_guest_info_init(pcms);
172 
173     if (pcmc->smbios_defaults) {
174         MachineClass *mc = MACHINE_GET_CLASS(machine);
175         /* These values are guest ABI, do not change */
176         smbios_set_defaults("QEMU", "Standard PC (i440FX + PIIX, 1996)",
177                             mc->name, pcmc->smbios_legacy_mode,
178                             pcmc->smbios_uuid_encoded,
179                             SMBIOS_ENTRY_POINT_21);
180     }
181 
182     /* allocate ram and load rom/bios */
183     if (!xen_enabled()) {
184         pc_memory_init(pcms, system_memory,
185                        rom_memory, &ram_memory);
186     } else if (machine->kernel_filename != NULL) {
187         /* For xen HVM direct kernel boot, load linux here */
188         xen_load_linux(pcms);
189     }
190 
191     gsi_state = pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled);
192 
193     if (pcmc->pci_enabled) {
194         PIIX3State *piix3;
195 
196         pci_bus = i440fx_init(host_type,
197                               pci_type,
198                               &i440fx_state,
199                               system_memory, system_io, machine->ram_size,
200                               x86ms->below_4g_mem_size,
201                               x86ms->above_4g_mem_size,
202                               pci_memory, ram_memory);
203         pcms->bus = pci_bus;
204 
205         piix3 = piix3_create(pci_bus, &isa_bus);
206         piix3->pic = x86ms->gsi;
207         piix3_devfn = piix3->dev.devfn;
208     } else {
209         pci_bus = NULL;
210         i440fx_state = NULL;
211         isa_bus = isa_bus_new(NULL, get_system_memory(), system_io,
212                               &error_abort);
213         no_hpet = 1;
214     }
215     isa_bus_irqs(isa_bus, x86ms->gsi);
216 
217     pc_i8259_create(isa_bus, gsi_state->i8259_irq);
218 
219     if (pcmc->pci_enabled) {
220         ioapic_init_gsi(gsi_state, "i440fx");
221     }
222 
223     if (tcg_enabled()) {
224         x86_register_ferr_irq(x86ms->gsi[13]);
225     }
226 
227     pc_vga_init(isa_bus, pcmc->pci_enabled ? pci_bus : NULL);
228 
229     assert(pcms->vmport != ON_OFF_AUTO__MAX);
230     if (pcms->vmport == ON_OFF_AUTO_AUTO) {
231         pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON;
232     }
233 
234     /* init basic PC hardware */
235     pc_basic_device_init(isa_bus, x86ms->gsi, &rtc_state, true,
236                          (pcms->vmport != ON_OFF_AUTO_ON), pcms->pit_enabled,
237                          0x4);
238 
239     pc_nic_init(pcmc, isa_bus, pci_bus);
240 
241     if (pcmc->pci_enabled) {
242         PCIDevice *dev;
243 
244         dev = pci_create_simple(pci_bus, piix3_devfn + 1,
245                                 xen_enabled() ? "piix3-ide-xen" : "piix3-ide");
246         pci_ide_create_devs(dev);
247         idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0");
248         idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1");
249         pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
250     }
251 #ifdef CONFIG_IDE_ISA
252     else {
253         DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
254         int i;
255 
256         ide_drive_get(hd, ARRAY_SIZE(hd));
257         for (i = 0; i < MAX_IDE_BUS; i++) {
258             ISADevice *dev;
259             char busname[] = "ide.0";
260             dev = isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i],
261                                ide_irq[i],
262                                hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
263             /*
264              * The ide bus name is ide.0 for the first bus and ide.1 for the
265              * second one.
266              */
267             busname[4] = '0' + i;
268             idebus[i] = qdev_get_child_bus(DEVICE(dev), busname);
269         }
270         pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
271     }
272 #endif
273 
274     if (pcmc->pci_enabled && machine_usb(machine)) {
275         pci_create_simple(pci_bus, piix3_devfn + 2, "piix3-usb-uhci");
276     }
277 
278     if (pcmc->pci_enabled && x86_machine_is_acpi_enabled(X86_MACHINE(pcms))) {
279         DeviceState *piix4_pm;
280 
281         smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0);
282         /* TODO: Populate SPD eeprom data.  */
283         pcms->smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
284                                     x86ms->gsi[9], smi_irq,
285                                     x86_machine_is_smm_enabled(x86ms),
286                                     &piix4_pm);
287         smbus_eeprom_init(pcms->smbus, 8, NULL, 0);
288 
289         object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
290                                  TYPE_HOTPLUG_HANDLER,
291                                  (Object **)&pcms->acpi_dev,
292                                  object_property_allow_set_link,
293                                  OBJ_PROP_LINK_STRONG, &error_abort);
294         object_property_set_link(OBJECT(machine), OBJECT(piix4_pm),
295                                  PC_MACHINE_ACPI_DEVICE_PROP, &error_abort);
296     }
297 
298     if (machine->nvdimms_state->is_enabled) {
299         nvdimm_init_acpi_state(machine->nvdimms_state, system_io,
300                                x86ms->fw_cfg, OBJECT(pcms));
301     }
302 }
303 
304 /* Looking for a pc_compat_2_4() function? It doesn't exist.
305  * pc_compat_*() functions that run on machine-init time and
306  * change global QEMU state are deprecated. Please don't create
307  * one, and implement any pc-*-2.4 (and newer) compat code in
308  * hw_compat_*, pc_compat_*, or * pc_*_machine_options().
309  */
310 
311 static void pc_compat_2_3_fn(MachineState *machine)
312 {
313     X86MachineState *x86ms = X86_MACHINE(machine);
314     if (kvm_enabled()) {
315         x86ms->smm = ON_OFF_AUTO_OFF;
316     }
317 }
318 
319 static void pc_compat_2_2_fn(MachineState *machine)
320 {
321     pc_compat_2_3_fn(machine);
322 }
323 
324 static void pc_compat_2_1_fn(MachineState *machine)
325 {
326     pc_compat_2_2_fn(machine);
327     x86_cpu_change_kvm_default("svm", NULL);
328 }
329 
330 static void pc_compat_2_0_fn(MachineState *machine)
331 {
332     pc_compat_2_1_fn(machine);
333 }
334 
335 static void pc_compat_1_7_fn(MachineState *machine)
336 {
337     pc_compat_2_0_fn(machine);
338     x86_cpu_change_kvm_default("x2apic", NULL);
339 }
340 
341 static void pc_compat_1_6_fn(MachineState *machine)
342 {
343     pc_compat_1_7_fn(machine);
344 }
345 
346 static void pc_compat_1_5_fn(MachineState *machine)
347 {
348     pc_compat_1_6_fn(machine);
349 }
350 
351 static void pc_compat_1_4_fn(MachineState *machine)
352 {
353     pc_compat_1_5_fn(machine);
354 }
355 
356 static void pc_compat_1_3(MachineState *machine)
357 {
358     pc_compat_1_4_fn(machine);
359 }
360 
361 /* PC compat function for pc-1.0 to pc-1.2 */
362 static void pc_compat_1_2(MachineState *machine)
363 {
364     pc_compat_1_3(machine);
365     x86_cpu_change_kvm_default("kvm-pv-eoi", NULL);
366 }
367 
368 static void pc_init_isa(MachineState *machine)
369 {
370     pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, TYPE_I440FX_PCI_DEVICE);
371 }
372 
373 #ifdef CONFIG_XEN
374 static void pc_xen_hvm_init_pci(MachineState *machine)
375 {
376     const char *pci_type = has_igd_gfx_passthru ?
377                 TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE : TYPE_I440FX_PCI_DEVICE;
378 
379     pc_init1(machine,
380              TYPE_I440FX_PCI_HOST_BRIDGE,
381              pci_type);
382 }
383 
384 static void pc_xen_hvm_init(MachineState *machine)
385 {
386     PCMachineState *pcms = PC_MACHINE(machine);
387 
388     if (!xen_enabled()) {
389         error_report("xenfv machine requires the xen accelerator");
390         exit(1);
391     }
392 
393     pc_xen_hvm_init_pci(machine);
394     pci_create_simple(pcms->bus, -1, "xen-platform");
395 }
396 #endif
397 
398 #define DEFINE_I440FX_MACHINE(suffix, name, compatfn, optionfn) \
399     static void pc_init_##suffix(MachineState *machine) \
400     { \
401         void (*compat)(MachineState *m) = (compatfn); \
402         if (compat) { \
403             compat(machine); \
404         } \
405         pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, \
406                  TYPE_I440FX_PCI_DEVICE); \
407     } \
408     DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn)
409 
410 static void pc_i440fx_machine_options(MachineClass *m)
411 {
412     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
413     pcmc->default_nic_model = "e1000";
414 
415     m->family = "pc_piix";
416     m->desc = "Standard PC (i440FX + PIIX, 1996)";
417     m->default_machine_opts = "firmware=bios-256k.bin";
418     m->default_display = "std";
419     machine_class_allow_dynamic_sysbus_dev(m, TYPE_RAMFB_DEVICE);
420 }
421 
422 static void pc_i440fx_5_0_machine_options(MachineClass *m)
423 {
424     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
425     pc_i440fx_machine_options(m);
426     m->alias = "pc";
427     m->is_default = true;
428     pcmc->default_cpu_version = 1;
429 }
430 
431 DEFINE_I440FX_MACHINE(v5_0, "pc-i440fx-5.0", NULL,
432                       pc_i440fx_5_0_machine_options);
433 
434 static void pc_i440fx_4_2_machine_options(MachineClass *m)
435 {
436     pc_i440fx_5_0_machine_options(m);
437     m->alias = NULL;
438     m->is_default = false;
439     compat_props_add(m->compat_props, hw_compat_4_2, hw_compat_4_2_len);
440     compat_props_add(m->compat_props, pc_compat_4_2, pc_compat_4_2_len);
441 }
442 
443 DEFINE_I440FX_MACHINE(v4_2, "pc-i440fx-4.2", NULL,
444                       pc_i440fx_4_2_machine_options);
445 
446 static void pc_i440fx_4_1_machine_options(MachineClass *m)
447 {
448     pc_i440fx_4_2_machine_options(m);
449     m->alias = NULL;
450     m->is_default = false;
451     compat_props_add(m->compat_props, hw_compat_4_1, hw_compat_4_1_len);
452     compat_props_add(m->compat_props, pc_compat_4_1, pc_compat_4_1_len);
453 }
454 
455 DEFINE_I440FX_MACHINE(v4_1, "pc-i440fx-4.1", NULL,
456                       pc_i440fx_4_1_machine_options);
457 
458 static void pc_i440fx_4_0_machine_options(MachineClass *m)
459 {
460     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
461     pc_i440fx_4_1_machine_options(m);
462     m->alias = NULL;
463     m->is_default = false;
464     pcmc->default_cpu_version = CPU_VERSION_LEGACY;
465     compat_props_add(m->compat_props, hw_compat_4_0, hw_compat_4_0_len);
466     compat_props_add(m->compat_props, pc_compat_4_0, pc_compat_4_0_len);
467 }
468 
469 DEFINE_I440FX_MACHINE(v4_0, "pc-i440fx-4.0", NULL,
470                       pc_i440fx_4_0_machine_options);
471 
472 static void pc_i440fx_3_1_machine_options(MachineClass *m)
473 {
474     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
475 
476     pc_i440fx_4_0_machine_options(m);
477     m->is_default = false;
478     pcmc->do_not_add_smb_acpi = true;
479     m->smbus_no_migration_support = true;
480     m->alias = NULL;
481     pcmc->pvh_enabled = false;
482     compat_props_add(m->compat_props, hw_compat_3_1, hw_compat_3_1_len);
483     compat_props_add(m->compat_props, pc_compat_3_1, pc_compat_3_1_len);
484 }
485 
486 DEFINE_I440FX_MACHINE(v3_1, "pc-i440fx-3.1", NULL,
487                       pc_i440fx_3_1_machine_options);
488 
489 static void pc_i440fx_3_0_machine_options(MachineClass *m)
490 {
491     pc_i440fx_3_1_machine_options(m);
492     compat_props_add(m->compat_props, hw_compat_3_0, hw_compat_3_0_len);
493     compat_props_add(m->compat_props, pc_compat_3_0, pc_compat_3_0_len);
494 }
495 
496 DEFINE_I440FX_MACHINE(v3_0, "pc-i440fx-3.0", NULL,
497                       pc_i440fx_3_0_machine_options);
498 
499 static void pc_i440fx_2_12_machine_options(MachineClass *m)
500 {
501     pc_i440fx_3_0_machine_options(m);
502     compat_props_add(m->compat_props, hw_compat_2_12, hw_compat_2_12_len);
503     compat_props_add(m->compat_props, pc_compat_2_12, pc_compat_2_12_len);
504 }
505 
506 DEFINE_I440FX_MACHINE(v2_12, "pc-i440fx-2.12", NULL,
507                       pc_i440fx_2_12_machine_options);
508 
509 static void pc_i440fx_2_11_machine_options(MachineClass *m)
510 {
511     pc_i440fx_2_12_machine_options(m);
512     compat_props_add(m->compat_props, hw_compat_2_11, hw_compat_2_11_len);
513     compat_props_add(m->compat_props, pc_compat_2_11, pc_compat_2_11_len);
514 }
515 
516 DEFINE_I440FX_MACHINE(v2_11, "pc-i440fx-2.11", NULL,
517                       pc_i440fx_2_11_machine_options);
518 
519 static void pc_i440fx_2_10_machine_options(MachineClass *m)
520 {
521     pc_i440fx_2_11_machine_options(m);
522     compat_props_add(m->compat_props, hw_compat_2_10, hw_compat_2_10_len);
523     compat_props_add(m->compat_props, pc_compat_2_10, pc_compat_2_10_len);
524     m->auto_enable_numa_with_memhp = false;
525 }
526 
527 DEFINE_I440FX_MACHINE(v2_10, "pc-i440fx-2.10", NULL,
528                       pc_i440fx_2_10_machine_options);
529 
530 static void pc_i440fx_2_9_machine_options(MachineClass *m)
531 {
532     pc_i440fx_2_10_machine_options(m);
533     compat_props_add(m->compat_props, hw_compat_2_9, hw_compat_2_9_len);
534     compat_props_add(m->compat_props, pc_compat_2_9, pc_compat_2_9_len);
535     m->numa_auto_assign_ram = numa_legacy_auto_assign_ram;
536 }
537 
538 DEFINE_I440FX_MACHINE(v2_9, "pc-i440fx-2.9", NULL,
539                       pc_i440fx_2_9_machine_options);
540 
541 static void pc_i440fx_2_8_machine_options(MachineClass *m)
542 {
543     pc_i440fx_2_9_machine_options(m);
544     compat_props_add(m->compat_props, hw_compat_2_8, hw_compat_2_8_len);
545     compat_props_add(m->compat_props, pc_compat_2_8, pc_compat_2_8_len);
546 }
547 
548 DEFINE_I440FX_MACHINE(v2_8, "pc-i440fx-2.8", NULL,
549                       pc_i440fx_2_8_machine_options);
550 
551 static void pc_i440fx_2_7_machine_options(MachineClass *m)
552 {
553     pc_i440fx_2_8_machine_options(m);
554     compat_props_add(m->compat_props, hw_compat_2_7, hw_compat_2_7_len);
555     compat_props_add(m->compat_props, pc_compat_2_7, pc_compat_2_7_len);
556 }
557 
558 DEFINE_I440FX_MACHINE(v2_7, "pc-i440fx-2.7", NULL,
559                       pc_i440fx_2_7_machine_options);
560 
561 static void pc_i440fx_2_6_machine_options(MachineClass *m)
562 {
563     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
564 
565     pc_i440fx_2_7_machine_options(m);
566     pcmc->legacy_cpu_hotplug = true;
567     pcmc->linuxboot_dma_enabled = false;
568     compat_props_add(m->compat_props, hw_compat_2_6, hw_compat_2_6_len);
569     compat_props_add(m->compat_props, pc_compat_2_6, pc_compat_2_6_len);
570 }
571 
572 DEFINE_I440FX_MACHINE(v2_6, "pc-i440fx-2.6", NULL,
573                       pc_i440fx_2_6_machine_options);
574 
575 static void pc_i440fx_2_5_machine_options(MachineClass *m)
576 {
577     X86MachineClass *x86mc = X86_MACHINE_CLASS(m);
578 
579     pc_i440fx_2_6_machine_options(m);
580     x86mc->save_tsc_khz = false;
581     m->legacy_fw_cfg_order = 1;
582     compat_props_add(m->compat_props, hw_compat_2_5, hw_compat_2_5_len);
583     compat_props_add(m->compat_props, pc_compat_2_5, pc_compat_2_5_len);
584 }
585 
586 DEFINE_I440FX_MACHINE(v2_5, "pc-i440fx-2.5", NULL,
587                       pc_i440fx_2_5_machine_options);
588 
589 static void pc_i440fx_2_4_machine_options(MachineClass *m)
590 {
591     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
592 
593     pc_i440fx_2_5_machine_options(m);
594     m->hw_version = "2.4.0";
595     pcmc->broken_reserved_end = true;
596     compat_props_add(m->compat_props, hw_compat_2_4, hw_compat_2_4_len);
597     compat_props_add(m->compat_props, pc_compat_2_4, pc_compat_2_4_len);
598 }
599 
600 DEFINE_I440FX_MACHINE(v2_4, "pc-i440fx-2.4", NULL,
601                       pc_i440fx_2_4_machine_options)
602 
603 static void pc_i440fx_2_3_machine_options(MachineClass *m)
604 {
605     pc_i440fx_2_4_machine_options(m);
606     m->hw_version = "2.3.0";
607     compat_props_add(m->compat_props, hw_compat_2_3, hw_compat_2_3_len);
608     compat_props_add(m->compat_props, pc_compat_2_3, pc_compat_2_3_len);
609 }
610 
611 DEFINE_I440FX_MACHINE(v2_3, "pc-i440fx-2.3", pc_compat_2_3_fn,
612                       pc_i440fx_2_3_machine_options);
613 
614 static void pc_i440fx_2_2_machine_options(MachineClass *m)
615 {
616     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
617 
618     pc_i440fx_2_3_machine_options(m);
619     m->hw_version = "2.2.0";
620     m->default_machine_opts = "firmware=bios-256k.bin,suppress-vmdesc=on";
621     compat_props_add(m->compat_props, hw_compat_2_2, hw_compat_2_2_len);
622     compat_props_add(m->compat_props, pc_compat_2_2, pc_compat_2_2_len);
623     pcmc->rsdp_in_ram = false;
624 }
625 
626 DEFINE_I440FX_MACHINE(v2_2, "pc-i440fx-2.2", pc_compat_2_2_fn,
627                       pc_i440fx_2_2_machine_options);
628 
629 static void pc_i440fx_2_1_machine_options(MachineClass *m)
630 {
631     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
632 
633     pc_i440fx_2_2_machine_options(m);
634     m->hw_version = "2.1.0";
635     m->default_display = NULL;
636     compat_props_add(m->compat_props, hw_compat_2_1, hw_compat_2_1_len);
637     compat_props_add(m->compat_props, pc_compat_2_1, pc_compat_2_1_len);
638     pcmc->smbios_uuid_encoded = false;
639     pcmc->enforce_aligned_dimm = false;
640 }
641 
642 DEFINE_I440FX_MACHINE(v2_1, "pc-i440fx-2.1", pc_compat_2_1_fn,
643                       pc_i440fx_2_1_machine_options);
644 
645 static void pc_i440fx_2_0_machine_options(MachineClass *m)
646 {
647     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
648 
649     pc_i440fx_2_1_machine_options(m);
650     m->hw_version = "2.0.0";
651     compat_props_add(m->compat_props, pc_compat_2_0, pc_compat_2_0_len);
652     pcmc->smbios_legacy_mode = true;
653     pcmc->has_reserved_memory = false;
654     /* This value depends on the actual DSDT and SSDT compiled into
655      * the source QEMU; unfortunately it depends on the binary and
656      * not on the machine type, so we cannot make pc-i440fx-1.7 work on
657      * both QEMU 1.7 and QEMU 2.0.
658      *
659      * Large variations cause migration to fail for more than one
660      * consecutive value of the "-smp" maxcpus option.
661      *
662      * For small variations of the kind caused by different iasl versions,
663      * the 4k rounding usually leaves slack.  However, there could be still
664      * one or two values that break.  For QEMU 1.7 and QEMU 2.0 the
665      * slack is only ~10 bytes before one "-smp maxcpus" value breaks!
666      *
667      * 6652 is valid for QEMU 2.0, the right value for pc-i440fx-1.7 on
668      * QEMU 1.7 it is 6414.  For RHEL/CentOS 7.0 it is 6418.
669      */
670     pcmc->legacy_acpi_table_size = 6652;
671     pcmc->acpi_data_size = 0x10000;
672 }
673 
674 DEFINE_I440FX_MACHINE(v2_0, "pc-i440fx-2.0", pc_compat_2_0_fn,
675                       pc_i440fx_2_0_machine_options);
676 
677 static void pc_i440fx_1_7_machine_options(MachineClass *m)
678 {
679     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
680 
681     pc_i440fx_2_0_machine_options(m);
682     m->hw_version = "1.7.0";
683     m->default_machine_opts = NULL;
684     m->option_rom_has_mr = true;
685     compat_props_add(m->compat_props, pc_compat_1_7, pc_compat_1_7_len);
686     pcmc->smbios_defaults = false;
687     pcmc->gigabyte_align = false;
688     pcmc->legacy_acpi_table_size = 6414;
689 }
690 
691 DEFINE_I440FX_MACHINE(v1_7, "pc-i440fx-1.7", pc_compat_1_7_fn,
692                       pc_i440fx_1_7_machine_options);
693 
694 static void pc_i440fx_1_6_machine_options(MachineClass *m)
695 {
696     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
697 
698     pc_i440fx_1_7_machine_options(m);
699     m->hw_version = "1.6.0";
700     m->rom_file_has_mr = false;
701     compat_props_add(m->compat_props, pc_compat_1_6, pc_compat_1_6_len);
702     pcmc->has_acpi_build = false;
703 }
704 
705 DEFINE_I440FX_MACHINE(v1_6, "pc-i440fx-1.6", pc_compat_1_6_fn,
706                       pc_i440fx_1_6_machine_options);
707 
708 static void pc_i440fx_1_5_machine_options(MachineClass *m)
709 {
710     pc_i440fx_1_6_machine_options(m);
711     m->hw_version = "1.5.0";
712     compat_props_add(m->compat_props, pc_compat_1_5, pc_compat_1_5_len);
713 }
714 
715 DEFINE_I440FX_MACHINE(v1_5, "pc-i440fx-1.5", pc_compat_1_5_fn,
716                       pc_i440fx_1_5_machine_options);
717 
718 static void pc_i440fx_1_4_machine_options(MachineClass *m)
719 {
720     pc_i440fx_1_5_machine_options(m);
721     m->hw_version = "1.4.0";
722     m->hot_add_cpu = NULL;
723     compat_props_add(m->compat_props, pc_compat_1_4, pc_compat_1_4_len);
724 }
725 
726 DEFINE_I440FX_MACHINE(v1_4, "pc-i440fx-1.4", pc_compat_1_4_fn,
727                       pc_i440fx_1_4_machine_options);
728 
729 static void pc_i440fx_1_3_machine_options(MachineClass *m)
730 {
731     X86MachineClass *x86mc = X86_MACHINE_CLASS(m);
732     static GlobalProperty compat[] = {
733         PC_CPU_MODEL_IDS("1.3.0")
734         { "usb-tablet", "usb_version", "1" },
735         { "virtio-net-pci", "ctrl_mac_addr", "off" },
736         { "virtio-net-pci", "mq", "off" },
737         { "e1000", "autonegotiation", "off" },
738     };
739 
740     pc_i440fx_1_4_machine_options(m);
741     m->hw_version = "1.3.0";
742     m->deprecation_reason = "use a newer machine type instead";
743     x86mc->compat_apic_id_mode = true;
744     compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
745 }
746 
747 DEFINE_I440FX_MACHINE(v1_3, "pc-1.3", pc_compat_1_3,
748                       pc_i440fx_1_3_machine_options);
749 
750 
751 static void pc_i440fx_1_2_machine_options(MachineClass *m)
752 {
753     static GlobalProperty compat[] = {
754         PC_CPU_MODEL_IDS("1.2.0")
755         { "nec-usb-xhci", "msi", "off" },
756         { "nec-usb-xhci", "msix", "off" },
757         { "qxl", "revision", "3" },
758         { "qxl-vga", "revision", "3" },
759         { "VGA", "mmio", "off" },
760     };
761 
762     pc_i440fx_1_3_machine_options(m);
763     m->hw_version = "1.2.0";
764     compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
765 }
766 
767 DEFINE_I440FX_MACHINE(v1_2, "pc-1.2", pc_compat_1_2,
768                       pc_i440fx_1_2_machine_options);
769 
770 
771 static void pc_i440fx_1_1_machine_options(MachineClass *m)
772 {
773     static GlobalProperty compat[] = {
774         PC_CPU_MODEL_IDS("1.1.0")
775         { "virtio-scsi-pci", "hotplug", "off" },
776         { "virtio-scsi-pci", "param_change", "off" },
777         { "VGA", "vgamem_mb", "8" },
778         { "vmware-svga", "vgamem_mb", "8" },
779         { "qxl-vga", "vgamem_mb", "8" },
780         { "qxl", "vgamem_mb", "8" },
781         { "virtio-blk-pci", "config-wce", "off" },
782     };
783 
784     pc_i440fx_1_2_machine_options(m);
785     m->hw_version = "1.1.0";
786     compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
787 }
788 
789 DEFINE_I440FX_MACHINE(v1_1, "pc-1.1", pc_compat_1_2,
790                       pc_i440fx_1_1_machine_options);
791 
792 static void pc_i440fx_1_0_machine_options(MachineClass *m)
793 {
794     static GlobalProperty compat[] = {
795         PC_CPU_MODEL_IDS("1.0")
796         { TYPE_ISA_FDC, "check_media_rate", "off" },
797         { "virtio-balloon-pci", "class", stringify(PCI_CLASS_MEMORY_RAM) },
798         { "apic-common", "vapic", "off" },
799         { TYPE_USB_DEVICE, "full-path", "no" },
800     };
801 
802     pc_i440fx_1_1_machine_options(m);
803     m->hw_version = "1.0";
804     compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
805 }
806 
807 DEFINE_I440FX_MACHINE(v1_0, "pc-1.0", pc_compat_1_2,
808                       pc_i440fx_1_0_machine_options);
809 
810 
811 typedef struct {
812     uint16_t gpu_device_id;
813     uint16_t pch_device_id;
814     uint8_t pch_revision_id;
815 } IGDDeviceIDInfo;
816 
817 /* In real world different GPU should have different PCH. But actually
818  * the different PCH DIDs likely map to different PCH SKUs. We do the
819  * same thing for the GPU. For PCH, the different SKUs are going to be
820  * all the same silicon design and implementation, just different
821  * features turn on and off with fuses. The SW interfaces should be
822  * consistent across all SKUs in a given family (eg LPT). But just same
823  * features may not be supported.
824  *
825  * Most of these different PCH features probably don't matter to the
826  * Gfx driver, but obviously any difference in display port connections
827  * will so it should be fine with any PCH in case of passthrough.
828  *
829  * So currently use one PCH version, 0x8c4e, to cover all HSW(Haswell)
830  * scenarios, 0x9cc3 for BDW(Broadwell).
831  */
832 static const IGDDeviceIDInfo igd_combo_id_infos[] = {
833     /* HSW Classic */
834     {0x0402, 0x8c4e, 0x04}, /* HSWGT1D, HSWD_w7 */
835     {0x0406, 0x8c4e, 0x04}, /* HSWGT1M, HSWM_w7 */
836     {0x0412, 0x8c4e, 0x04}, /* HSWGT2D, HSWD_w7 */
837     {0x0416, 0x8c4e, 0x04}, /* HSWGT2M, HSWM_w7 */
838     {0x041E, 0x8c4e, 0x04}, /* HSWGT15D, HSWD_w7 */
839     /* HSW ULT */
840     {0x0A06, 0x8c4e, 0x04}, /* HSWGT1UT, HSWM_w7 */
841     {0x0A16, 0x8c4e, 0x04}, /* HSWGT2UT, HSWM_w7 */
842     {0x0A26, 0x8c4e, 0x06}, /* HSWGT3UT, HSWM_w7 */
843     {0x0A2E, 0x8c4e, 0x04}, /* HSWGT3UT28W, HSWM_w7 */
844     {0x0A1E, 0x8c4e, 0x04}, /* HSWGT2UX, HSWM_w7 */
845     {0x0A0E, 0x8c4e, 0x04}, /* HSWGT1ULX, HSWM_w7 */
846     /* HSW CRW */
847     {0x0D26, 0x8c4e, 0x04}, /* HSWGT3CW, HSWM_w7 */
848     {0x0D22, 0x8c4e, 0x04}, /* HSWGT3CWDT, HSWD_w7 */
849     /* HSW Server */
850     {0x041A, 0x8c4e, 0x04}, /* HSWSVGT2, HSWD_w7 */
851     /* HSW SRVR */
852     {0x040A, 0x8c4e, 0x04}, /* HSWSVGT1, HSWD_w7 */
853     /* BSW */
854     {0x1606, 0x9cc3, 0x03}, /* BDWULTGT1, BDWM_w7 */
855     {0x1616, 0x9cc3, 0x03}, /* BDWULTGT2, BDWM_w7 */
856     {0x1626, 0x9cc3, 0x03}, /* BDWULTGT3, BDWM_w7 */
857     {0x160E, 0x9cc3, 0x03}, /* BDWULXGT1, BDWM_w7 */
858     {0x161E, 0x9cc3, 0x03}, /* BDWULXGT2, BDWM_w7 */
859     {0x1602, 0x9cc3, 0x03}, /* BDWHALOGT1, BDWM_w7 */
860     {0x1612, 0x9cc3, 0x03}, /* BDWHALOGT2, BDWM_w7 */
861     {0x1622, 0x9cc3, 0x03}, /* BDWHALOGT3, BDWM_w7 */
862     {0x162B, 0x9cc3, 0x03}, /* BDWHALO28W, BDWM_w7 */
863     {0x162A, 0x9cc3, 0x03}, /* BDWGT3WRKS, BDWM_w7 */
864     {0x162D, 0x9cc3, 0x03}, /* BDWGT3SRVR, BDWM_w7 */
865 };
866 
867 static void isa_bridge_class_init(ObjectClass *klass, void *data)
868 {
869     DeviceClass *dc = DEVICE_CLASS(klass);
870     PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
871 
872     dc->desc        = "ISA bridge faked to support IGD PT";
873     set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
874     k->vendor_id    = PCI_VENDOR_ID_INTEL;
875     k->class_id     = PCI_CLASS_BRIDGE_ISA;
876 };
877 
878 static TypeInfo isa_bridge_info = {
879     .name          = "igd-passthrough-isa-bridge",
880     .parent        = TYPE_PCI_DEVICE,
881     .instance_size = sizeof(PCIDevice),
882     .class_init = isa_bridge_class_init,
883     .interfaces = (InterfaceInfo[]) {
884         { INTERFACE_CONVENTIONAL_PCI_DEVICE },
885         { },
886     },
887 };
888 
889 static void pt_graphics_register_types(void)
890 {
891     type_register_static(&isa_bridge_info);
892 }
893 type_init(pt_graphics_register_types)
894 
895 void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id)
896 {
897     struct PCIDevice *bridge_dev;
898     int i, num;
899     uint16_t pch_dev_id = 0xffff;
900     uint8_t pch_rev_id;
901 
902     num = ARRAY_SIZE(igd_combo_id_infos);
903     for (i = 0; i < num; i++) {
904         if (gpu_dev_id == igd_combo_id_infos[i].gpu_device_id) {
905             pch_dev_id = igd_combo_id_infos[i].pch_device_id;
906             pch_rev_id = igd_combo_id_infos[i].pch_revision_id;
907         }
908     }
909 
910     if (pch_dev_id == 0xffff) {
911         return;
912     }
913 
914     /* Currently IGD drivers always need to access PCH by 1f.0. */
915     bridge_dev = pci_create_simple(bus, PCI_DEVFN(0x1f, 0),
916                                    "igd-passthrough-isa-bridge");
917 
918     /*
919      * Note that vendor id is always PCI_VENDOR_ID_INTEL.
920      */
921     if (!bridge_dev) {
922         fprintf(stderr, "set igd-passthrough-isa-bridge failed!\n");
923         return;
924     }
925     pci_config_set_device_id(bridge_dev->config, pch_dev_id);
926     pci_config_set_revision(bridge_dev->config, pch_rev_id);
927 }
928 
929 static void isapc_machine_options(MachineClass *m)
930 {
931     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
932     m->desc = "ISA-only PC";
933     m->max_cpus = 1;
934     m->option_rom_has_mr = true;
935     m->rom_file_has_mr = false;
936     pcmc->pci_enabled = false;
937     pcmc->has_acpi_build = false;
938     pcmc->smbios_defaults = false;
939     pcmc->gigabyte_align = false;
940     pcmc->smbios_legacy_mode = true;
941     pcmc->has_reserved_memory = false;
942     pcmc->default_nic_model = "ne2k_isa";
943     m->default_cpu_type = X86_CPU_TYPE_NAME("486");
944 }
945 
946 DEFINE_PC_MACHINE(isapc, "isapc", pc_init_isa,
947                   isapc_machine_options);
948 
949 
950 #ifdef CONFIG_XEN
951 static void xenfv_4_2_machine_options(MachineClass *m)
952 {
953     pc_i440fx_4_2_machine_options(m);
954     m->desc = "Xen Fully-virtualized PC";
955     m->max_cpus = HVM_MAX_VCPUS;
956     m->default_machine_opts = "accel=xen";
957 }
958 
959 DEFINE_PC_MACHINE(xenfv_4_2, "xenfv-4.2", pc_xen_hvm_init,
960                   xenfv_4_2_machine_options);
961 
962 static void xenfv_3_1_machine_options(MachineClass *m)
963 {
964     pc_i440fx_3_1_machine_options(m);
965     m->desc = "Xen Fully-virtualized PC";
966     m->alias = "xenfv";
967     m->max_cpus = HVM_MAX_VCPUS;
968     m->default_machine_opts = "accel=xen";
969 }
970 
971 DEFINE_PC_MACHINE(xenfv, "xenfv-3.1", pc_xen_hvm_init,
972                   xenfv_3_1_machine_options);
973 #endif
974