xref: /openbmc/qemu/hw/i386/pc_piix.c (revision 122752d2)
1 /*
2  * QEMU PC System Emulator
3  *
4  * Copyright (c) 2003-2004 Fabrice Bellard
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to deal
8  * in the Software without restriction, including without limitation the rights
9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10  * copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22  * THE SOFTWARE.
23  */
24 
25 #include "qemu/osdep.h"
26 #include "config-devices.h"
27 
28 #include "qemu/units.h"
29 #include "hw/loader.h"
30 #include "hw/i386/x86.h"
31 #include "hw/i386/pc.h"
32 #include "hw/i386/apic.h"
33 #include "hw/pci-host/i440fx.h"
34 #include "hw/southbridge/piix.h"
35 #include "hw/display/ramfb.h"
36 #include "hw/firmware/smbios.h"
37 #include "hw/pci/pci.h"
38 #include "hw/pci/pci_ids.h"
39 #include "hw/usb.h"
40 #include "net/net.h"
41 #include "hw/ide/pci.h"
42 #include "hw/irq.h"
43 #include "sysemu/kvm.h"
44 #include "hw/kvm/clock.h"
45 #include "sysemu/sysemu.h"
46 #include "hw/sysbus.h"
47 #include "sysemu/arch_init.h"
48 #include "hw/i2c/smbus_eeprom.h"
49 #include "hw/xen/xen.h"
50 #include "exec/memory.h"
51 #include "exec/address-spaces.h"
52 #include "hw/acpi/acpi.h"
53 #include "cpu.h"
54 #include "qapi/error.h"
55 #include "qemu/error-report.h"
56 #ifdef CONFIG_XEN
57 #include <xen/hvm/hvm_info_table.h>
58 #include "hw/xen/xen_pt.h"
59 #endif
60 #include "migration/global_state.h"
61 #include "migration/misc.h"
62 #include "sysemu/numa.h"
63 #include "hw/mem/nvdimm.h"
64 #include "hw/i386/acpi-build.h"
65 
66 #define MAX_IDE_BUS 2
67 
68 #ifdef CONFIG_IDE_ISA
69 static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 };
70 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 };
71 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
72 #endif
73 
74 /* PC hardware initialisation */
75 static void pc_init1(MachineState *machine,
76                      const char *host_type, const char *pci_type)
77 {
78     PCMachineState *pcms = PC_MACHINE(machine);
79     PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
80     X86MachineState *x86ms = X86_MACHINE(machine);
81     MemoryRegion *system_memory = get_system_memory();
82     MemoryRegion *system_io = get_system_io();
83     PCIBus *pci_bus;
84     ISABus *isa_bus;
85     PCII440FXState *i440fx_state;
86     int piix3_devfn = -1;
87     qemu_irq smi_irq;
88     GSIState *gsi_state;
89     BusState *idebus[MAX_IDE_BUS];
90     ISADevice *rtc_state;
91     MemoryRegion *ram_memory;
92     MemoryRegion *pci_memory;
93     MemoryRegion *rom_memory;
94     ram_addr_t lowmem;
95 
96     /*
97      * Calculate ram split, for memory below and above 4G.  It's a bit
98      * complicated for backward compatibility reasons ...
99      *
100      *  - Traditional split is 3.5G (lowmem = 0xe0000000).  This is the
101      *    default value for max_ram_below_4g now.
102      *
103      *  - Then, to gigabyte align the memory, we move the split to 3G
104      *    (lowmem = 0xc0000000).  But only in case we have to split in
105      *    the first place, i.e. ram_size is larger than (traditional)
106      *    lowmem.  And for new machine types (gigabyte_align = true)
107      *    only, for live migration compatibility reasons.
108      *
109      *  - Next the max-ram-below-4g option was added, which allowed to
110      *    reduce lowmem to a smaller value, to allow a larger PCI I/O
111      *    window below 4G.  qemu doesn't enforce gigabyte alignment here,
112      *    but prints a warning.
113      *
114      *  - Finally max-ram-below-4g got updated to also allow raising lowmem,
115      *    so legacy non-PAE guests can get as much memory as possible in
116      *    the 32bit address space below 4G.
117      *
118      *  - Note that Xen has its own ram setp code in xen_ram_init(),
119      *    called via xen_hvm_init().
120      *
121      * Examples:
122      *    qemu -M pc-1.7 -m 4G    (old default)    -> 3584M low,  512M high
123      *    qemu -M pc -m 4G        (new default)    -> 3072M low, 1024M high
124      *    qemu -M pc,max-ram-below-4g=2G -m 4G     -> 2048M low, 2048M high
125      *    qemu -M pc,max-ram-below-4g=4G -m 3968M  -> 3968M low (=4G-128M)
126      */
127     if (xen_enabled()) {
128         xen_hvm_init(pcms, &ram_memory);
129     } else {
130         if (!x86ms->max_ram_below_4g) {
131             x86ms->max_ram_below_4g = 0xe0000000; /* default: 3.5G */
132         }
133         lowmem = x86ms->max_ram_below_4g;
134         if (machine->ram_size >= x86ms->max_ram_below_4g) {
135             if (pcmc->gigabyte_align) {
136                 if (lowmem > 0xc0000000) {
137                     lowmem = 0xc0000000;
138                 }
139                 if (lowmem & (1 * GiB - 1)) {
140                     warn_report("Large machine and max_ram_below_4g "
141                                 "(%" PRIu64 ") not a multiple of 1G; "
142                                 "possible bad performance.",
143                                 x86ms->max_ram_below_4g);
144                 }
145             }
146         }
147 
148         if (machine->ram_size >= lowmem) {
149             x86ms->above_4g_mem_size = machine->ram_size - lowmem;
150             x86ms->below_4g_mem_size = lowmem;
151         } else {
152             x86ms->above_4g_mem_size = 0;
153             x86ms->below_4g_mem_size = machine->ram_size;
154         }
155     }
156 
157     x86_cpus_init(x86ms, pcmc->default_cpu_version);
158 
159     if (kvm_enabled() && pcmc->kvmclock_enabled) {
160         kvmclock_create();
161     }
162 
163     if (pcmc->pci_enabled) {
164         pci_memory = g_new(MemoryRegion, 1);
165         memory_region_init(pci_memory, NULL, "pci", UINT64_MAX);
166         rom_memory = pci_memory;
167     } else {
168         pci_memory = NULL;
169         rom_memory = system_memory;
170     }
171 
172     pc_guest_info_init(pcms);
173 
174     if (pcmc->smbios_defaults) {
175         MachineClass *mc = MACHINE_GET_CLASS(machine);
176         /* These values are guest ABI, do not change */
177         smbios_set_defaults("QEMU", "Standard PC (i440FX + PIIX, 1996)",
178                             mc->name, pcmc->smbios_legacy_mode,
179                             pcmc->smbios_uuid_encoded,
180                             SMBIOS_ENTRY_POINT_21);
181     }
182 
183     /* allocate ram and load rom/bios */
184     if (!xen_enabled()) {
185         pc_memory_init(pcms, system_memory,
186                        rom_memory, &ram_memory);
187     } else if (machine->kernel_filename != NULL) {
188         /* For xen HVM direct kernel boot, load linux here */
189         xen_load_linux(pcms);
190     }
191 
192     gsi_state = pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled);
193 
194     if (pcmc->pci_enabled) {
195         PIIX3State *piix3;
196 
197         pci_bus = i440fx_init(host_type,
198                               pci_type,
199                               &i440fx_state,
200                               system_memory, system_io, machine->ram_size,
201                               x86ms->below_4g_mem_size,
202                               x86ms->above_4g_mem_size,
203                               pci_memory, ram_memory);
204         pcms->bus = pci_bus;
205 
206         piix3 = piix3_create(pci_bus, &isa_bus);
207         piix3->pic = x86ms->gsi;
208         piix3_devfn = piix3->dev.devfn;
209     } else {
210         pci_bus = NULL;
211         i440fx_state = NULL;
212         isa_bus = isa_bus_new(NULL, get_system_memory(), system_io,
213                               &error_abort);
214         no_hpet = 1;
215     }
216     isa_bus_irqs(isa_bus, x86ms->gsi);
217 
218     pc_i8259_create(isa_bus, gsi_state->i8259_irq);
219 
220     if (pcmc->pci_enabled) {
221         ioapic_init_gsi(gsi_state, "i440fx");
222     }
223 
224     if (tcg_enabled()) {
225         x86_register_ferr_irq(x86ms->gsi[13]);
226     }
227 
228     pc_vga_init(isa_bus, pcmc->pci_enabled ? pci_bus : NULL);
229 
230     assert(pcms->vmport != ON_OFF_AUTO__MAX);
231     if (pcms->vmport == ON_OFF_AUTO_AUTO) {
232         pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON;
233     }
234 
235     /* init basic PC hardware */
236     pc_basic_device_init(isa_bus, x86ms->gsi, &rtc_state, true,
237                          (pcms->vmport != ON_OFF_AUTO_ON), pcms->pit_enabled,
238                          0x4);
239 
240     pc_nic_init(pcmc, isa_bus, pci_bus);
241 
242     if (pcmc->pci_enabled) {
243         PCIDevice *dev;
244 
245         dev = pci_create_simple(pci_bus, piix3_devfn + 1,
246                                 xen_enabled() ? "piix3-ide-xen" : "piix3-ide");
247         pci_ide_create_devs(dev);
248         idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0");
249         idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1");
250         pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
251     }
252 #ifdef CONFIG_IDE_ISA
253     else {
254         DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
255         int i;
256 
257         ide_drive_get(hd, ARRAY_SIZE(hd));
258         for (i = 0; i < MAX_IDE_BUS; i++) {
259             ISADevice *dev;
260             char busname[] = "ide.0";
261             dev = isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i],
262                                ide_irq[i],
263                                hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
264             /*
265              * The ide bus name is ide.0 for the first bus and ide.1 for the
266              * second one.
267              */
268             busname[4] = '0' + i;
269             idebus[i] = qdev_get_child_bus(DEVICE(dev), busname);
270         }
271         pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
272     }
273 #endif
274 
275     if (pcmc->pci_enabled && machine_usb(machine)) {
276         pci_create_simple(pci_bus, piix3_devfn + 2, "piix3-usb-uhci");
277     }
278 
279     if (pcmc->pci_enabled && x86_machine_is_acpi_enabled(X86_MACHINE(pcms))) {
280         DeviceState *piix4_pm;
281 
282         smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0);
283         /* TODO: Populate SPD eeprom data.  */
284         pcms->smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
285                                     x86ms->gsi[9], smi_irq,
286                                     x86_machine_is_smm_enabled(x86ms),
287                                     &piix4_pm);
288         smbus_eeprom_init(pcms->smbus, 8, NULL, 0);
289 
290         object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
291                                  TYPE_HOTPLUG_HANDLER,
292                                  (Object **)&pcms->acpi_dev,
293                                  object_property_allow_set_link,
294                                  OBJ_PROP_LINK_STRONG, &error_abort);
295         object_property_set_link(OBJECT(machine), OBJECT(piix4_pm),
296                                  PC_MACHINE_ACPI_DEVICE_PROP, &error_abort);
297     }
298 
299     if (machine->nvdimms_state->is_enabled) {
300         nvdimm_init_acpi_state(machine->nvdimms_state, system_io,
301                                x86_nvdimm_acpi_dsmio,
302                                x86ms->fw_cfg, OBJECT(pcms));
303     }
304 }
305 
306 /* Looking for a pc_compat_2_4() function? It doesn't exist.
307  * pc_compat_*() functions that run on machine-init time and
308  * change global QEMU state are deprecated. Please don't create
309  * one, and implement any pc-*-2.4 (and newer) compat code in
310  * hw_compat_*, pc_compat_*, or * pc_*_machine_options().
311  */
312 
313 static void pc_compat_2_3_fn(MachineState *machine)
314 {
315     X86MachineState *x86ms = X86_MACHINE(machine);
316     if (kvm_enabled()) {
317         x86ms->smm = ON_OFF_AUTO_OFF;
318     }
319 }
320 
321 static void pc_compat_2_2_fn(MachineState *machine)
322 {
323     pc_compat_2_3_fn(machine);
324 }
325 
326 static void pc_compat_2_1_fn(MachineState *machine)
327 {
328     pc_compat_2_2_fn(machine);
329     x86_cpu_change_kvm_default("svm", NULL);
330 }
331 
332 static void pc_compat_2_0_fn(MachineState *machine)
333 {
334     pc_compat_2_1_fn(machine);
335 }
336 
337 static void pc_compat_1_7_fn(MachineState *machine)
338 {
339     pc_compat_2_0_fn(machine);
340     x86_cpu_change_kvm_default("x2apic", NULL);
341 }
342 
343 static void pc_compat_1_6_fn(MachineState *machine)
344 {
345     pc_compat_1_7_fn(machine);
346 }
347 
348 static void pc_compat_1_5_fn(MachineState *machine)
349 {
350     pc_compat_1_6_fn(machine);
351 }
352 
353 static void pc_compat_1_4_fn(MachineState *machine)
354 {
355     pc_compat_1_5_fn(machine);
356 }
357 
358 static void pc_compat_1_3(MachineState *machine)
359 {
360     pc_compat_1_4_fn(machine);
361 }
362 
363 /* PC compat function for pc-1.0 to pc-1.2 */
364 static void pc_compat_1_2(MachineState *machine)
365 {
366     pc_compat_1_3(machine);
367     x86_cpu_change_kvm_default("kvm-pv-eoi", NULL);
368 }
369 
370 static void pc_init_isa(MachineState *machine)
371 {
372     pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, TYPE_I440FX_PCI_DEVICE);
373 }
374 
375 #ifdef CONFIG_XEN
376 static void pc_xen_hvm_init_pci(MachineState *machine)
377 {
378     const char *pci_type = has_igd_gfx_passthru ?
379                 TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE : TYPE_I440FX_PCI_DEVICE;
380 
381     pc_init1(machine,
382              TYPE_I440FX_PCI_HOST_BRIDGE,
383              pci_type);
384 }
385 
386 static void pc_xen_hvm_init(MachineState *machine)
387 {
388     PCMachineState *pcms = PC_MACHINE(machine);
389 
390     if (!xen_enabled()) {
391         error_report("xenfv machine requires the xen accelerator");
392         exit(1);
393     }
394 
395     pc_xen_hvm_init_pci(machine);
396     pci_create_simple(pcms->bus, -1, "xen-platform");
397 }
398 #endif
399 
400 #define DEFINE_I440FX_MACHINE(suffix, name, compatfn, optionfn) \
401     static void pc_init_##suffix(MachineState *machine) \
402     { \
403         void (*compat)(MachineState *m) = (compatfn); \
404         if (compat) { \
405             compat(machine); \
406         } \
407         pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, \
408                  TYPE_I440FX_PCI_DEVICE); \
409     } \
410     DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn)
411 
412 static void pc_i440fx_machine_options(MachineClass *m)
413 {
414     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
415     pcmc->default_nic_model = "e1000";
416 
417     m->family = "pc_piix";
418     m->desc = "Standard PC (i440FX + PIIX, 1996)";
419     m->default_machine_opts = "firmware=bios-256k.bin";
420     m->default_display = "std";
421     machine_class_allow_dynamic_sysbus_dev(m, TYPE_RAMFB_DEVICE);
422 }
423 
424 static void pc_i440fx_5_0_machine_options(MachineClass *m)
425 {
426     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
427     pc_i440fx_machine_options(m);
428     m->alias = "pc";
429     m->is_default = true;
430     pcmc->default_cpu_version = 1;
431 }
432 
433 DEFINE_I440FX_MACHINE(v5_0, "pc-i440fx-5.0", NULL,
434                       pc_i440fx_5_0_machine_options);
435 
436 static void pc_i440fx_4_2_machine_options(MachineClass *m)
437 {
438     pc_i440fx_5_0_machine_options(m);
439     m->alias = NULL;
440     m->is_default = false;
441     compat_props_add(m->compat_props, hw_compat_4_2, hw_compat_4_2_len);
442     compat_props_add(m->compat_props, pc_compat_4_2, pc_compat_4_2_len);
443 }
444 
445 DEFINE_I440FX_MACHINE(v4_2, "pc-i440fx-4.2", NULL,
446                       pc_i440fx_4_2_machine_options);
447 
448 static void pc_i440fx_4_1_machine_options(MachineClass *m)
449 {
450     pc_i440fx_4_2_machine_options(m);
451     m->alias = NULL;
452     m->is_default = false;
453     compat_props_add(m->compat_props, hw_compat_4_1, hw_compat_4_1_len);
454     compat_props_add(m->compat_props, pc_compat_4_1, pc_compat_4_1_len);
455 }
456 
457 DEFINE_I440FX_MACHINE(v4_1, "pc-i440fx-4.1", NULL,
458                       pc_i440fx_4_1_machine_options);
459 
460 static void pc_i440fx_4_0_machine_options(MachineClass *m)
461 {
462     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
463     pc_i440fx_4_1_machine_options(m);
464     m->alias = NULL;
465     m->is_default = false;
466     pcmc->default_cpu_version = CPU_VERSION_LEGACY;
467     compat_props_add(m->compat_props, hw_compat_4_0, hw_compat_4_0_len);
468     compat_props_add(m->compat_props, pc_compat_4_0, pc_compat_4_0_len);
469 }
470 
471 DEFINE_I440FX_MACHINE(v4_0, "pc-i440fx-4.0", NULL,
472                       pc_i440fx_4_0_machine_options);
473 
474 static void pc_i440fx_3_1_machine_options(MachineClass *m)
475 {
476     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
477 
478     pc_i440fx_4_0_machine_options(m);
479     m->is_default = false;
480     pcmc->do_not_add_smb_acpi = true;
481     m->smbus_no_migration_support = true;
482     m->alias = NULL;
483     pcmc->pvh_enabled = false;
484     compat_props_add(m->compat_props, hw_compat_3_1, hw_compat_3_1_len);
485     compat_props_add(m->compat_props, pc_compat_3_1, pc_compat_3_1_len);
486 }
487 
488 DEFINE_I440FX_MACHINE(v3_1, "pc-i440fx-3.1", NULL,
489                       pc_i440fx_3_1_machine_options);
490 
491 static void pc_i440fx_3_0_machine_options(MachineClass *m)
492 {
493     pc_i440fx_3_1_machine_options(m);
494     compat_props_add(m->compat_props, hw_compat_3_0, hw_compat_3_0_len);
495     compat_props_add(m->compat_props, pc_compat_3_0, pc_compat_3_0_len);
496 }
497 
498 DEFINE_I440FX_MACHINE(v3_0, "pc-i440fx-3.0", NULL,
499                       pc_i440fx_3_0_machine_options);
500 
501 static void pc_i440fx_2_12_machine_options(MachineClass *m)
502 {
503     pc_i440fx_3_0_machine_options(m);
504     compat_props_add(m->compat_props, hw_compat_2_12, hw_compat_2_12_len);
505     compat_props_add(m->compat_props, pc_compat_2_12, pc_compat_2_12_len);
506 }
507 
508 DEFINE_I440FX_MACHINE(v2_12, "pc-i440fx-2.12", NULL,
509                       pc_i440fx_2_12_machine_options);
510 
511 static void pc_i440fx_2_11_machine_options(MachineClass *m)
512 {
513     pc_i440fx_2_12_machine_options(m);
514     compat_props_add(m->compat_props, hw_compat_2_11, hw_compat_2_11_len);
515     compat_props_add(m->compat_props, pc_compat_2_11, pc_compat_2_11_len);
516 }
517 
518 DEFINE_I440FX_MACHINE(v2_11, "pc-i440fx-2.11", NULL,
519                       pc_i440fx_2_11_machine_options);
520 
521 static void pc_i440fx_2_10_machine_options(MachineClass *m)
522 {
523     pc_i440fx_2_11_machine_options(m);
524     compat_props_add(m->compat_props, hw_compat_2_10, hw_compat_2_10_len);
525     compat_props_add(m->compat_props, pc_compat_2_10, pc_compat_2_10_len);
526     m->auto_enable_numa_with_memhp = false;
527 }
528 
529 DEFINE_I440FX_MACHINE(v2_10, "pc-i440fx-2.10", NULL,
530                       pc_i440fx_2_10_machine_options);
531 
532 static void pc_i440fx_2_9_machine_options(MachineClass *m)
533 {
534     pc_i440fx_2_10_machine_options(m);
535     compat_props_add(m->compat_props, hw_compat_2_9, hw_compat_2_9_len);
536     compat_props_add(m->compat_props, pc_compat_2_9, pc_compat_2_9_len);
537     m->numa_auto_assign_ram = numa_legacy_auto_assign_ram;
538 }
539 
540 DEFINE_I440FX_MACHINE(v2_9, "pc-i440fx-2.9", NULL,
541                       pc_i440fx_2_9_machine_options);
542 
543 static void pc_i440fx_2_8_machine_options(MachineClass *m)
544 {
545     pc_i440fx_2_9_machine_options(m);
546     compat_props_add(m->compat_props, hw_compat_2_8, hw_compat_2_8_len);
547     compat_props_add(m->compat_props, pc_compat_2_8, pc_compat_2_8_len);
548 }
549 
550 DEFINE_I440FX_MACHINE(v2_8, "pc-i440fx-2.8", NULL,
551                       pc_i440fx_2_8_machine_options);
552 
553 static void pc_i440fx_2_7_machine_options(MachineClass *m)
554 {
555     pc_i440fx_2_8_machine_options(m);
556     compat_props_add(m->compat_props, hw_compat_2_7, hw_compat_2_7_len);
557     compat_props_add(m->compat_props, pc_compat_2_7, pc_compat_2_7_len);
558 }
559 
560 DEFINE_I440FX_MACHINE(v2_7, "pc-i440fx-2.7", NULL,
561                       pc_i440fx_2_7_machine_options);
562 
563 static void pc_i440fx_2_6_machine_options(MachineClass *m)
564 {
565     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
566 
567     pc_i440fx_2_7_machine_options(m);
568     pcmc->legacy_cpu_hotplug = true;
569     pcmc->linuxboot_dma_enabled = false;
570     compat_props_add(m->compat_props, hw_compat_2_6, hw_compat_2_6_len);
571     compat_props_add(m->compat_props, pc_compat_2_6, pc_compat_2_6_len);
572 }
573 
574 DEFINE_I440FX_MACHINE(v2_6, "pc-i440fx-2.6", NULL,
575                       pc_i440fx_2_6_machine_options);
576 
577 static void pc_i440fx_2_5_machine_options(MachineClass *m)
578 {
579     X86MachineClass *x86mc = X86_MACHINE_CLASS(m);
580 
581     pc_i440fx_2_6_machine_options(m);
582     x86mc->save_tsc_khz = false;
583     m->legacy_fw_cfg_order = 1;
584     compat_props_add(m->compat_props, hw_compat_2_5, hw_compat_2_5_len);
585     compat_props_add(m->compat_props, pc_compat_2_5, pc_compat_2_5_len);
586 }
587 
588 DEFINE_I440FX_MACHINE(v2_5, "pc-i440fx-2.5", NULL,
589                       pc_i440fx_2_5_machine_options);
590 
591 static void pc_i440fx_2_4_machine_options(MachineClass *m)
592 {
593     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
594 
595     pc_i440fx_2_5_machine_options(m);
596     m->hw_version = "2.4.0";
597     pcmc->broken_reserved_end = true;
598     compat_props_add(m->compat_props, hw_compat_2_4, hw_compat_2_4_len);
599     compat_props_add(m->compat_props, pc_compat_2_4, pc_compat_2_4_len);
600 }
601 
602 DEFINE_I440FX_MACHINE(v2_4, "pc-i440fx-2.4", NULL,
603                       pc_i440fx_2_4_machine_options)
604 
605 static void pc_i440fx_2_3_machine_options(MachineClass *m)
606 {
607     pc_i440fx_2_4_machine_options(m);
608     m->hw_version = "2.3.0";
609     compat_props_add(m->compat_props, hw_compat_2_3, hw_compat_2_3_len);
610     compat_props_add(m->compat_props, pc_compat_2_3, pc_compat_2_3_len);
611 }
612 
613 DEFINE_I440FX_MACHINE(v2_3, "pc-i440fx-2.3", pc_compat_2_3_fn,
614                       pc_i440fx_2_3_machine_options);
615 
616 static void pc_i440fx_2_2_machine_options(MachineClass *m)
617 {
618     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
619 
620     pc_i440fx_2_3_machine_options(m);
621     m->hw_version = "2.2.0";
622     m->default_machine_opts = "firmware=bios-256k.bin,suppress-vmdesc=on";
623     compat_props_add(m->compat_props, hw_compat_2_2, hw_compat_2_2_len);
624     compat_props_add(m->compat_props, pc_compat_2_2, pc_compat_2_2_len);
625     pcmc->rsdp_in_ram = false;
626 }
627 
628 DEFINE_I440FX_MACHINE(v2_2, "pc-i440fx-2.2", pc_compat_2_2_fn,
629                       pc_i440fx_2_2_machine_options);
630 
631 static void pc_i440fx_2_1_machine_options(MachineClass *m)
632 {
633     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
634 
635     pc_i440fx_2_2_machine_options(m);
636     m->hw_version = "2.1.0";
637     m->default_display = NULL;
638     compat_props_add(m->compat_props, hw_compat_2_1, hw_compat_2_1_len);
639     compat_props_add(m->compat_props, pc_compat_2_1, pc_compat_2_1_len);
640     pcmc->smbios_uuid_encoded = false;
641     pcmc->enforce_aligned_dimm = false;
642 }
643 
644 DEFINE_I440FX_MACHINE(v2_1, "pc-i440fx-2.1", pc_compat_2_1_fn,
645                       pc_i440fx_2_1_machine_options);
646 
647 static void pc_i440fx_2_0_machine_options(MachineClass *m)
648 {
649     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
650 
651     pc_i440fx_2_1_machine_options(m);
652     m->hw_version = "2.0.0";
653     compat_props_add(m->compat_props, pc_compat_2_0, pc_compat_2_0_len);
654     pcmc->smbios_legacy_mode = true;
655     pcmc->has_reserved_memory = false;
656     /* This value depends on the actual DSDT and SSDT compiled into
657      * the source QEMU; unfortunately it depends on the binary and
658      * not on the machine type, so we cannot make pc-i440fx-1.7 work on
659      * both QEMU 1.7 and QEMU 2.0.
660      *
661      * Large variations cause migration to fail for more than one
662      * consecutive value of the "-smp" maxcpus option.
663      *
664      * For small variations of the kind caused by different iasl versions,
665      * the 4k rounding usually leaves slack.  However, there could be still
666      * one or two values that break.  For QEMU 1.7 and QEMU 2.0 the
667      * slack is only ~10 bytes before one "-smp maxcpus" value breaks!
668      *
669      * 6652 is valid for QEMU 2.0, the right value for pc-i440fx-1.7 on
670      * QEMU 1.7 it is 6414.  For RHEL/CentOS 7.0 it is 6418.
671      */
672     pcmc->legacy_acpi_table_size = 6652;
673     pcmc->acpi_data_size = 0x10000;
674 }
675 
676 DEFINE_I440FX_MACHINE(v2_0, "pc-i440fx-2.0", pc_compat_2_0_fn,
677                       pc_i440fx_2_0_machine_options);
678 
679 static void pc_i440fx_1_7_machine_options(MachineClass *m)
680 {
681     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
682 
683     pc_i440fx_2_0_machine_options(m);
684     m->hw_version = "1.7.0";
685     m->default_machine_opts = NULL;
686     m->option_rom_has_mr = true;
687     compat_props_add(m->compat_props, pc_compat_1_7, pc_compat_1_7_len);
688     pcmc->smbios_defaults = false;
689     pcmc->gigabyte_align = false;
690     pcmc->legacy_acpi_table_size = 6414;
691 }
692 
693 DEFINE_I440FX_MACHINE(v1_7, "pc-i440fx-1.7", pc_compat_1_7_fn,
694                       pc_i440fx_1_7_machine_options);
695 
696 static void pc_i440fx_1_6_machine_options(MachineClass *m)
697 {
698     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
699 
700     pc_i440fx_1_7_machine_options(m);
701     m->hw_version = "1.6.0";
702     m->rom_file_has_mr = false;
703     compat_props_add(m->compat_props, pc_compat_1_6, pc_compat_1_6_len);
704     pcmc->has_acpi_build = false;
705 }
706 
707 DEFINE_I440FX_MACHINE(v1_6, "pc-i440fx-1.6", pc_compat_1_6_fn,
708                       pc_i440fx_1_6_machine_options);
709 
710 static void pc_i440fx_1_5_machine_options(MachineClass *m)
711 {
712     pc_i440fx_1_6_machine_options(m);
713     m->hw_version = "1.5.0";
714     compat_props_add(m->compat_props, pc_compat_1_5, pc_compat_1_5_len);
715 }
716 
717 DEFINE_I440FX_MACHINE(v1_5, "pc-i440fx-1.5", pc_compat_1_5_fn,
718                       pc_i440fx_1_5_machine_options);
719 
720 static void pc_i440fx_1_4_machine_options(MachineClass *m)
721 {
722     pc_i440fx_1_5_machine_options(m);
723     m->hw_version = "1.4.0";
724     m->hot_add_cpu = NULL;
725     compat_props_add(m->compat_props, pc_compat_1_4, pc_compat_1_4_len);
726 }
727 
728 DEFINE_I440FX_MACHINE(v1_4, "pc-i440fx-1.4", pc_compat_1_4_fn,
729                       pc_i440fx_1_4_machine_options);
730 
731 static void pc_i440fx_1_3_machine_options(MachineClass *m)
732 {
733     X86MachineClass *x86mc = X86_MACHINE_CLASS(m);
734     static GlobalProperty compat[] = {
735         PC_CPU_MODEL_IDS("1.3.0")
736         { "usb-tablet", "usb_version", "1" },
737         { "virtio-net-pci", "ctrl_mac_addr", "off" },
738         { "virtio-net-pci", "mq", "off" },
739         { "e1000", "autonegotiation", "off" },
740     };
741 
742     pc_i440fx_1_4_machine_options(m);
743     m->hw_version = "1.3.0";
744     m->deprecation_reason = "use a newer machine type instead";
745     x86mc->compat_apic_id_mode = true;
746     compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
747 }
748 
749 DEFINE_I440FX_MACHINE(v1_3, "pc-1.3", pc_compat_1_3,
750                       pc_i440fx_1_3_machine_options);
751 
752 
753 static void pc_i440fx_1_2_machine_options(MachineClass *m)
754 {
755     static GlobalProperty compat[] = {
756         PC_CPU_MODEL_IDS("1.2.0")
757         { "nec-usb-xhci", "msi", "off" },
758         { "nec-usb-xhci", "msix", "off" },
759         { "qxl", "revision", "3" },
760         { "qxl-vga", "revision", "3" },
761         { "VGA", "mmio", "off" },
762     };
763 
764     pc_i440fx_1_3_machine_options(m);
765     m->hw_version = "1.2.0";
766     compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
767 }
768 
769 DEFINE_I440FX_MACHINE(v1_2, "pc-1.2", pc_compat_1_2,
770                       pc_i440fx_1_2_machine_options);
771 
772 
773 static void pc_i440fx_1_1_machine_options(MachineClass *m)
774 {
775     static GlobalProperty compat[] = {
776         PC_CPU_MODEL_IDS("1.1.0")
777         { "virtio-scsi-pci", "hotplug", "off" },
778         { "virtio-scsi-pci", "param_change", "off" },
779         { "VGA", "vgamem_mb", "8" },
780         { "vmware-svga", "vgamem_mb", "8" },
781         { "qxl-vga", "vgamem_mb", "8" },
782         { "qxl", "vgamem_mb", "8" },
783         { "virtio-blk-pci", "config-wce", "off" },
784     };
785 
786     pc_i440fx_1_2_machine_options(m);
787     m->hw_version = "1.1.0";
788     compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
789 }
790 
791 DEFINE_I440FX_MACHINE(v1_1, "pc-1.1", pc_compat_1_2,
792                       pc_i440fx_1_1_machine_options);
793 
794 static void pc_i440fx_1_0_machine_options(MachineClass *m)
795 {
796     static GlobalProperty compat[] = {
797         PC_CPU_MODEL_IDS("1.0")
798         { TYPE_ISA_FDC, "check_media_rate", "off" },
799         { "virtio-balloon-pci", "class", stringify(PCI_CLASS_MEMORY_RAM) },
800         { "apic-common", "vapic", "off" },
801         { TYPE_USB_DEVICE, "full-path", "no" },
802     };
803 
804     pc_i440fx_1_1_machine_options(m);
805     m->hw_version = "1.0";
806     compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
807 }
808 
809 DEFINE_I440FX_MACHINE(v1_0, "pc-1.0", pc_compat_1_2,
810                       pc_i440fx_1_0_machine_options);
811 
812 
813 typedef struct {
814     uint16_t gpu_device_id;
815     uint16_t pch_device_id;
816     uint8_t pch_revision_id;
817 } IGDDeviceIDInfo;
818 
819 /* In real world different GPU should have different PCH. But actually
820  * the different PCH DIDs likely map to different PCH SKUs. We do the
821  * same thing for the GPU. For PCH, the different SKUs are going to be
822  * all the same silicon design and implementation, just different
823  * features turn on and off with fuses. The SW interfaces should be
824  * consistent across all SKUs in a given family (eg LPT). But just same
825  * features may not be supported.
826  *
827  * Most of these different PCH features probably don't matter to the
828  * Gfx driver, but obviously any difference in display port connections
829  * will so it should be fine with any PCH in case of passthrough.
830  *
831  * So currently use one PCH version, 0x8c4e, to cover all HSW(Haswell)
832  * scenarios, 0x9cc3 for BDW(Broadwell).
833  */
834 static const IGDDeviceIDInfo igd_combo_id_infos[] = {
835     /* HSW Classic */
836     {0x0402, 0x8c4e, 0x04}, /* HSWGT1D, HSWD_w7 */
837     {0x0406, 0x8c4e, 0x04}, /* HSWGT1M, HSWM_w7 */
838     {0x0412, 0x8c4e, 0x04}, /* HSWGT2D, HSWD_w7 */
839     {0x0416, 0x8c4e, 0x04}, /* HSWGT2M, HSWM_w7 */
840     {0x041E, 0x8c4e, 0x04}, /* HSWGT15D, HSWD_w7 */
841     /* HSW ULT */
842     {0x0A06, 0x8c4e, 0x04}, /* HSWGT1UT, HSWM_w7 */
843     {0x0A16, 0x8c4e, 0x04}, /* HSWGT2UT, HSWM_w7 */
844     {0x0A26, 0x8c4e, 0x06}, /* HSWGT3UT, HSWM_w7 */
845     {0x0A2E, 0x8c4e, 0x04}, /* HSWGT3UT28W, HSWM_w7 */
846     {0x0A1E, 0x8c4e, 0x04}, /* HSWGT2UX, HSWM_w7 */
847     {0x0A0E, 0x8c4e, 0x04}, /* HSWGT1ULX, HSWM_w7 */
848     /* HSW CRW */
849     {0x0D26, 0x8c4e, 0x04}, /* HSWGT3CW, HSWM_w7 */
850     {0x0D22, 0x8c4e, 0x04}, /* HSWGT3CWDT, HSWD_w7 */
851     /* HSW Server */
852     {0x041A, 0x8c4e, 0x04}, /* HSWSVGT2, HSWD_w7 */
853     /* HSW SRVR */
854     {0x040A, 0x8c4e, 0x04}, /* HSWSVGT1, HSWD_w7 */
855     /* BSW */
856     {0x1606, 0x9cc3, 0x03}, /* BDWULTGT1, BDWM_w7 */
857     {0x1616, 0x9cc3, 0x03}, /* BDWULTGT2, BDWM_w7 */
858     {0x1626, 0x9cc3, 0x03}, /* BDWULTGT3, BDWM_w7 */
859     {0x160E, 0x9cc3, 0x03}, /* BDWULXGT1, BDWM_w7 */
860     {0x161E, 0x9cc3, 0x03}, /* BDWULXGT2, BDWM_w7 */
861     {0x1602, 0x9cc3, 0x03}, /* BDWHALOGT1, BDWM_w7 */
862     {0x1612, 0x9cc3, 0x03}, /* BDWHALOGT2, BDWM_w7 */
863     {0x1622, 0x9cc3, 0x03}, /* BDWHALOGT3, BDWM_w7 */
864     {0x162B, 0x9cc3, 0x03}, /* BDWHALO28W, BDWM_w7 */
865     {0x162A, 0x9cc3, 0x03}, /* BDWGT3WRKS, BDWM_w7 */
866     {0x162D, 0x9cc3, 0x03}, /* BDWGT3SRVR, BDWM_w7 */
867 };
868 
869 static void isa_bridge_class_init(ObjectClass *klass, void *data)
870 {
871     DeviceClass *dc = DEVICE_CLASS(klass);
872     PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
873 
874     dc->desc        = "ISA bridge faked to support IGD PT";
875     set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
876     k->vendor_id    = PCI_VENDOR_ID_INTEL;
877     k->class_id     = PCI_CLASS_BRIDGE_ISA;
878 };
879 
880 static TypeInfo isa_bridge_info = {
881     .name          = "igd-passthrough-isa-bridge",
882     .parent        = TYPE_PCI_DEVICE,
883     .instance_size = sizeof(PCIDevice),
884     .class_init = isa_bridge_class_init,
885     .interfaces = (InterfaceInfo[]) {
886         { INTERFACE_CONVENTIONAL_PCI_DEVICE },
887         { },
888     },
889 };
890 
891 static void pt_graphics_register_types(void)
892 {
893     type_register_static(&isa_bridge_info);
894 }
895 type_init(pt_graphics_register_types)
896 
897 void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id)
898 {
899     struct PCIDevice *bridge_dev;
900     int i, num;
901     uint16_t pch_dev_id = 0xffff;
902     uint8_t pch_rev_id;
903 
904     num = ARRAY_SIZE(igd_combo_id_infos);
905     for (i = 0; i < num; i++) {
906         if (gpu_dev_id == igd_combo_id_infos[i].gpu_device_id) {
907             pch_dev_id = igd_combo_id_infos[i].pch_device_id;
908             pch_rev_id = igd_combo_id_infos[i].pch_revision_id;
909         }
910     }
911 
912     if (pch_dev_id == 0xffff) {
913         return;
914     }
915 
916     /* Currently IGD drivers always need to access PCH by 1f.0. */
917     bridge_dev = pci_create_simple(bus, PCI_DEVFN(0x1f, 0),
918                                    "igd-passthrough-isa-bridge");
919 
920     /*
921      * Note that vendor id is always PCI_VENDOR_ID_INTEL.
922      */
923     if (!bridge_dev) {
924         fprintf(stderr, "set igd-passthrough-isa-bridge failed!\n");
925         return;
926     }
927     pci_config_set_device_id(bridge_dev->config, pch_dev_id);
928     pci_config_set_revision(bridge_dev->config, pch_rev_id);
929 }
930 
931 static void isapc_machine_options(MachineClass *m)
932 {
933     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
934     m->desc = "ISA-only PC";
935     m->max_cpus = 1;
936     m->option_rom_has_mr = true;
937     m->rom_file_has_mr = false;
938     pcmc->pci_enabled = false;
939     pcmc->has_acpi_build = false;
940     pcmc->smbios_defaults = false;
941     pcmc->gigabyte_align = false;
942     pcmc->smbios_legacy_mode = true;
943     pcmc->has_reserved_memory = false;
944     pcmc->default_nic_model = "ne2k_isa";
945     m->default_cpu_type = X86_CPU_TYPE_NAME("486");
946 }
947 
948 DEFINE_PC_MACHINE(isapc, "isapc", pc_init_isa,
949                   isapc_machine_options);
950 
951 
952 #ifdef CONFIG_XEN
953 static void xenfv_4_2_machine_options(MachineClass *m)
954 {
955     pc_i440fx_4_2_machine_options(m);
956     m->desc = "Xen Fully-virtualized PC";
957     m->max_cpus = HVM_MAX_VCPUS;
958     m->default_machine_opts = "accel=xen";
959 }
960 
961 DEFINE_PC_MACHINE(xenfv_4_2, "xenfv-4.2", pc_xen_hvm_init,
962                   xenfv_4_2_machine_options);
963 
964 static void xenfv_3_1_machine_options(MachineClass *m)
965 {
966     pc_i440fx_3_1_machine_options(m);
967     m->desc = "Xen Fully-virtualized PC";
968     m->alias = "xenfv";
969     m->max_cpus = HVM_MAX_VCPUS;
970     m->default_machine_opts = "accel=xen";
971 }
972 
973 DEFINE_PC_MACHINE(xenfv, "xenfv-3.1", pc_xen_hvm_init,
974                   xenfv_3_1_machine_options);
975 #endif
976