1 /* 2 * QEMU PC System Emulator 3 * 4 * Copyright (c) 2003-2004 Fabrice Bellard 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 #include "qemu/osdep.h" 26 27 #include "hw/hw.h" 28 #include "hw/loader.h" 29 #include "hw/i386/pc.h" 30 #include "hw/i386/apic.h" 31 #include "hw/smbios/smbios.h" 32 #include "hw/pci/pci.h" 33 #include "hw/pci/pci_ids.h" 34 #include "hw/usb.h" 35 #include "net/net.h" 36 #include "hw/boards.h" 37 #include "hw/ide.h" 38 #include "sysemu/kvm.h" 39 #include "hw/kvm/clock.h" 40 #include "sysemu/sysemu.h" 41 #include "hw/sysbus.h" 42 #include "sysemu/arch_init.h" 43 #include "hw/i2c/smbus.h" 44 #include "hw/xen/xen.h" 45 #include "exec/memory.h" 46 #include "exec/address-spaces.h" 47 #include "hw/acpi/acpi.h" 48 #include "cpu.h" 49 #include "qapi/error.h" 50 #include "qemu/error-report.h" 51 #ifdef CONFIG_XEN 52 #include <xen/hvm/hvm_info_table.h> 53 #include "hw/xen/xen_pt.h" 54 #endif 55 #include "migration/global_state.h" 56 #include "migration/misc.h" 57 #include "kvm_i386.h" 58 #include "sysemu/numa.h" 59 60 #define MAX_IDE_BUS 2 61 62 static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 }; 63 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 }; 64 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 }; 65 66 /* PC hardware initialisation */ 67 static void pc_init1(MachineState *machine, 68 const char *host_type, const char *pci_type) 69 { 70 PCMachineState *pcms = PC_MACHINE(machine); 71 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); 72 MemoryRegion *system_memory = get_system_memory(); 73 MemoryRegion *system_io = get_system_io(); 74 int i; 75 PCIBus *pci_bus; 76 ISABus *isa_bus; 77 PCII440FXState *i440fx_state; 78 int piix3_devfn = -1; 79 qemu_irq *i8259; 80 qemu_irq smi_irq; 81 GSIState *gsi_state; 82 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; 83 BusState *idebus[MAX_IDE_BUS]; 84 ISADevice *rtc_state; 85 MemoryRegion *ram_memory; 86 MemoryRegion *pci_memory; 87 MemoryRegion *rom_memory; 88 ram_addr_t lowmem; 89 90 /* 91 * Calculate ram split, for memory below and above 4G. It's a bit 92 * complicated for backward compatibility reasons ... 93 * 94 * - Traditional split is 3.5G (lowmem = 0xe0000000). This is the 95 * default value for max_ram_below_4g now. 96 * 97 * - Then, to gigabyte align the memory, we move the split to 3G 98 * (lowmem = 0xc0000000). But only in case we have to split in 99 * the first place, i.e. ram_size is larger than (traditional) 100 * lowmem. And for new machine types (gigabyte_align = true) 101 * only, for live migration compatibility reasons. 102 * 103 * - Next the max-ram-below-4g option was added, which allowed to 104 * reduce lowmem to a smaller value, to allow a larger PCI I/O 105 * window below 4G. qemu doesn't enforce gigabyte alignment here, 106 * but prints a warning. 107 * 108 * - Finally max-ram-below-4g got updated to also allow raising lowmem, 109 * so legacy non-PAE guests can get as much memory as possible in 110 * the 32bit address space below 4G. 111 * 112 * - Note that Xen has its own ram setp code in xen_ram_init(), 113 * called via xen_hvm_init(). 114 * 115 * Examples: 116 * qemu -M pc-1.7 -m 4G (old default) -> 3584M low, 512M high 117 * qemu -M pc -m 4G (new default) -> 3072M low, 1024M high 118 * qemu -M pc,max-ram-below-4g=2G -m 4G -> 2048M low, 2048M high 119 * qemu -M pc,max-ram-below-4g=4G -m 3968M -> 3968M low (=4G-128M) 120 */ 121 if (xen_enabled()) { 122 xen_hvm_init(pcms, &ram_memory); 123 } else { 124 if (!pcms->max_ram_below_4g) { 125 pcms->max_ram_below_4g = 0xe0000000; /* default: 3.5G */ 126 } 127 lowmem = pcms->max_ram_below_4g; 128 if (machine->ram_size >= pcms->max_ram_below_4g) { 129 if (pcmc->gigabyte_align) { 130 if (lowmem > 0xc0000000) { 131 lowmem = 0xc0000000; 132 } 133 if (lowmem & ((1ULL << 30) - 1)) { 134 warn_report("Large machine and max_ram_below_4g " 135 "(%" PRIu64 ") not a multiple of 1G; " 136 "possible bad performance.", 137 pcms->max_ram_below_4g); 138 } 139 } 140 } 141 142 if (machine->ram_size >= lowmem) { 143 pcms->above_4g_mem_size = machine->ram_size - lowmem; 144 pcms->below_4g_mem_size = lowmem; 145 } else { 146 pcms->above_4g_mem_size = 0; 147 pcms->below_4g_mem_size = machine->ram_size; 148 } 149 } 150 151 pc_cpus_init(pcms); 152 153 if (kvm_enabled() && pcmc->kvmclock_enabled) { 154 kvmclock_create(); 155 } 156 157 if (pcmc->pci_enabled) { 158 pci_memory = g_new(MemoryRegion, 1); 159 memory_region_init(pci_memory, NULL, "pci", UINT64_MAX); 160 rom_memory = pci_memory; 161 } else { 162 pci_memory = NULL; 163 rom_memory = system_memory; 164 } 165 166 pc_guest_info_init(pcms); 167 168 if (pcmc->smbios_defaults) { 169 MachineClass *mc = MACHINE_GET_CLASS(machine); 170 /* These values are guest ABI, do not change */ 171 smbios_set_defaults("QEMU", "Standard PC (i440FX + PIIX, 1996)", 172 mc->name, pcmc->smbios_legacy_mode, 173 pcmc->smbios_uuid_encoded, 174 SMBIOS_ENTRY_POINT_21); 175 } 176 177 /* allocate ram and load rom/bios */ 178 if (!xen_enabled()) { 179 pc_memory_init(pcms, system_memory, 180 rom_memory, &ram_memory); 181 } else if (machine->kernel_filename != NULL) { 182 /* For xen HVM direct kernel boot, load linux here */ 183 xen_load_linux(pcms); 184 } 185 186 gsi_state = g_malloc0(sizeof(*gsi_state)); 187 if (kvm_ioapic_in_kernel()) { 188 kvm_pc_setup_irq_routing(pcmc->pci_enabled); 189 pcms->gsi = qemu_allocate_irqs(kvm_pc_gsi_handler, gsi_state, 190 GSI_NUM_PINS); 191 } else { 192 pcms->gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS); 193 } 194 195 if (pcmc->pci_enabled) { 196 pci_bus = i440fx_init(host_type, 197 pci_type, 198 &i440fx_state, &piix3_devfn, &isa_bus, pcms->gsi, 199 system_memory, system_io, machine->ram_size, 200 pcms->below_4g_mem_size, 201 pcms->above_4g_mem_size, 202 pci_memory, ram_memory); 203 pcms->bus = pci_bus; 204 } else { 205 pci_bus = NULL; 206 i440fx_state = NULL; 207 isa_bus = isa_bus_new(NULL, get_system_memory(), system_io, 208 &error_abort); 209 no_hpet = 1; 210 } 211 isa_bus_irqs(isa_bus, pcms->gsi); 212 213 if (kvm_pic_in_kernel()) { 214 i8259 = kvm_i8259_init(isa_bus); 215 } else if (xen_enabled()) { 216 i8259 = xen_interrupt_controller_init(); 217 } else { 218 i8259 = i8259_init(isa_bus, pc_allocate_cpu_irq()); 219 } 220 221 for (i = 0; i < ISA_NUM_IRQS; i++) { 222 gsi_state->i8259_irq[i] = i8259[i]; 223 } 224 g_free(i8259); 225 if (pcmc->pci_enabled) { 226 ioapic_init_gsi(gsi_state, "i440fx"); 227 } 228 229 pc_register_ferr_irq(pcms->gsi[13]); 230 231 pc_vga_init(isa_bus, pcmc->pci_enabled ? pci_bus : NULL); 232 233 assert(pcms->vmport != ON_OFF_AUTO__MAX); 234 if (pcms->vmport == ON_OFF_AUTO_AUTO) { 235 pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON; 236 } 237 238 /* init basic PC hardware */ 239 pc_basic_device_init(isa_bus, pcms->gsi, &rtc_state, true, 240 (pcms->vmport != ON_OFF_AUTO_ON), pcms->pit, 0x4); 241 242 pc_nic_init(pcmc, isa_bus, pci_bus); 243 244 ide_drive_get(hd, ARRAY_SIZE(hd)); 245 if (pcmc->pci_enabled) { 246 PCIDevice *dev; 247 if (xen_enabled()) { 248 dev = pci_piix3_xen_ide_init(pci_bus, hd, piix3_devfn + 1); 249 } else { 250 dev = pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1); 251 } 252 idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0"); 253 idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1"); 254 } else { 255 for(i = 0; i < MAX_IDE_BUS; i++) { 256 ISADevice *dev; 257 char busname[] = "ide.0"; 258 dev = isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i], 259 ide_irq[i], 260 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]); 261 /* 262 * The ide bus name is ide.0 for the first bus and ide.1 for the 263 * second one. 264 */ 265 busname[4] = '0' + i; 266 idebus[i] = qdev_get_child_bus(DEVICE(dev), busname); 267 } 268 } 269 270 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state); 271 272 if (pcmc->pci_enabled && machine_usb(machine)) { 273 pci_create_simple(pci_bus, piix3_devfn + 2, "piix3-usb-uhci"); 274 } 275 276 if (pcmc->pci_enabled && acpi_enabled) { 277 DeviceState *piix4_pm; 278 I2CBus *smbus; 279 280 smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0); 281 /* TODO: Populate SPD eeprom data. */ 282 smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, 283 pcms->gsi[9], smi_irq, 284 pc_machine_is_smm_enabled(pcms), 285 &piix4_pm); 286 smbus_eeprom_init(smbus, 8, NULL, 0); 287 288 object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP, 289 TYPE_HOTPLUG_HANDLER, 290 (Object **)&pcms->acpi_dev, 291 object_property_allow_set_link, 292 OBJ_PROP_LINK_UNREF_ON_RELEASE, &error_abort); 293 object_property_set_link(OBJECT(machine), OBJECT(piix4_pm), 294 PC_MACHINE_ACPI_DEVICE_PROP, &error_abort); 295 } 296 297 if (pcms->acpi_nvdimm_state.is_enabled) { 298 nvdimm_init_acpi_state(&pcms->acpi_nvdimm_state, system_io, 299 pcms->fw_cfg, OBJECT(pcms)); 300 } 301 } 302 303 /* Looking for a pc_compat_2_4() function? It doesn't exist. 304 * pc_compat_*() functions that run on machine-init time and 305 * change global QEMU state are deprecated. Please don't create 306 * one, and implement any pc-*-2.4 (and newer) compat code in 307 * HW_COMPAT_*, PC_COMPAT_*, or * pc_*_machine_options(). 308 */ 309 310 static void pc_compat_2_3(MachineState *machine) 311 { 312 PCMachineState *pcms = PC_MACHINE(machine); 313 if (kvm_enabled()) { 314 pcms->smm = ON_OFF_AUTO_OFF; 315 } 316 } 317 318 static void pc_compat_2_2(MachineState *machine) 319 { 320 pc_compat_2_3(machine); 321 machine->suppress_vmdesc = true; 322 } 323 324 static void pc_compat_2_1(MachineState *machine) 325 { 326 pc_compat_2_2(machine); 327 x86_cpu_change_kvm_default("svm", NULL); 328 } 329 330 static void pc_compat_2_0(MachineState *machine) 331 { 332 pc_compat_2_1(machine); 333 } 334 335 static void pc_compat_1_7(MachineState *machine) 336 { 337 pc_compat_2_0(machine); 338 x86_cpu_change_kvm_default("x2apic", NULL); 339 } 340 341 static void pc_compat_1_6(MachineState *machine) 342 { 343 pc_compat_1_7(machine); 344 } 345 346 static void pc_compat_1_5(MachineState *machine) 347 { 348 pc_compat_1_6(machine); 349 } 350 351 static void pc_compat_1_4(MachineState *machine) 352 { 353 pc_compat_1_5(machine); 354 } 355 356 static void pc_compat_1_3(MachineState *machine) 357 { 358 pc_compat_1_4(machine); 359 enable_compat_apic_id_mode(); 360 } 361 362 /* PC compat function for pc-0.14 to pc-1.2 */ 363 static void pc_compat_1_2(MachineState *machine) 364 { 365 pc_compat_1_3(machine); 366 x86_cpu_change_kvm_default("kvm-pv-eoi", NULL); 367 } 368 369 /* PC compat function for pc-0.10 to pc-0.13 */ 370 static void pc_compat_0_13(MachineState *machine) 371 { 372 pc_compat_1_2(machine); 373 } 374 375 static void pc_init_isa(MachineState *machine) 376 { 377 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, TYPE_I440FX_PCI_DEVICE); 378 } 379 380 #ifdef CONFIG_XEN 381 static void pc_xen_hvm_init_pci(MachineState *machine) 382 { 383 const char *pci_type = has_igd_gfx_passthru ? 384 TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE : TYPE_I440FX_PCI_DEVICE; 385 386 pc_init1(machine, 387 TYPE_I440FX_PCI_HOST_BRIDGE, 388 pci_type); 389 } 390 391 static void pc_xen_hvm_init(MachineState *machine) 392 { 393 PCMachineState *pcms = PC_MACHINE(machine); 394 395 if (!xen_enabled()) { 396 error_report("xenfv machine requires the xen accelerator"); 397 exit(1); 398 } 399 400 pc_xen_hvm_init_pci(machine); 401 pci_create_simple(pcms->bus, -1, "xen-platform"); 402 } 403 #endif 404 405 #define DEFINE_I440FX_MACHINE(suffix, name, compatfn, optionfn) \ 406 static void pc_init_##suffix(MachineState *machine) \ 407 { \ 408 void (*compat)(MachineState *m) = (compatfn); \ 409 if (compat) { \ 410 compat(machine); \ 411 } \ 412 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, \ 413 TYPE_I440FX_PCI_DEVICE); \ 414 } \ 415 DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn) 416 417 static void pc_i440fx_machine_options(MachineClass *m) 418 { 419 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 420 pcmc->default_nic_model = "e1000"; 421 422 m->family = "pc_piix"; 423 m->desc = "Standard PC (i440FX + PIIX, 1996)"; 424 m->default_machine_opts = "firmware=bios-256k.bin"; 425 m->default_display = "std"; 426 } 427 428 static void pc_i440fx_2_12_machine_options(MachineClass *m) 429 { 430 pc_i440fx_machine_options(m); 431 m->alias = "pc"; 432 m->is_default = 1; 433 } 434 435 DEFINE_I440FX_MACHINE(v2_12, "pc-i440fx-2.12", NULL, 436 pc_i440fx_2_12_machine_options); 437 438 static void pc_i440fx_2_11_machine_options(MachineClass *m) 439 { 440 pc_i440fx_2_12_machine_options(m); 441 m->is_default = 0; 442 m->alias = NULL; 443 SET_MACHINE_COMPAT(m, PC_COMPAT_2_11); 444 } 445 446 DEFINE_I440FX_MACHINE(v2_11, "pc-i440fx-2.11", NULL, 447 pc_i440fx_2_11_machine_options); 448 449 static void pc_i440fx_2_10_machine_options(MachineClass *m) 450 { 451 pc_i440fx_2_11_machine_options(m); 452 SET_MACHINE_COMPAT(m, PC_COMPAT_2_10); 453 m->auto_enable_numa_with_memhp = false; 454 } 455 456 DEFINE_I440FX_MACHINE(v2_10, "pc-i440fx-2.10", NULL, 457 pc_i440fx_2_10_machine_options); 458 459 static void pc_i440fx_2_9_machine_options(MachineClass *m) 460 { 461 pc_i440fx_2_10_machine_options(m); 462 SET_MACHINE_COMPAT(m, PC_COMPAT_2_9); 463 m->numa_auto_assign_ram = numa_legacy_auto_assign_ram; 464 } 465 466 DEFINE_I440FX_MACHINE(v2_9, "pc-i440fx-2.9", NULL, 467 pc_i440fx_2_9_machine_options); 468 469 static void pc_i440fx_2_8_machine_options(MachineClass *m) 470 { 471 pc_i440fx_2_9_machine_options(m); 472 SET_MACHINE_COMPAT(m, PC_COMPAT_2_8); 473 } 474 475 DEFINE_I440FX_MACHINE(v2_8, "pc-i440fx-2.8", NULL, 476 pc_i440fx_2_8_machine_options); 477 478 479 static void pc_i440fx_2_7_machine_options(MachineClass *m) 480 { 481 pc_i440fx_2_8_machine_options(m); 482 SET_MACHINE_COMPAT(m, PC_COMPAT_2_7); 483 } 484 485 DEFINE_I440FX_MACHINE(v2_7, "pc-i440fx-2.7", NULL, 486 pc_i440fx_2_7_machine_options); 487 488 489 static void pc_i440fx_2_6_machine_options(MachineClass *m) 490 { 491 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 492 pc_i440fx_2_7_machine_options(m); 493 pcmc->legacy_cpu_hotplug = true; 494 pcmc->linuxboot_dma_enabled = false; 495 SET_MACHINE_COMPAT(m, PC_COMPAT_2_6); 496 } 497 498 DEFINE_I440FX_MACHINE(v2_6, "pc-i440fx-2.6", NULL, 499 pc_i440fx_2_6_machine_options); 500 501 502 static void pc_i440fx_2_5_machine_options(MachineClass *m) 503 { 504 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 505 pc_i440fx_2_6_machine_options(m); 506 pcmc->save_tsc_khz = false; 507 m->legacy_fw_cfg_order = 1; 508 SET_MACHINE_COMPAT(m, PC_COMPAT_2_5); 509 } 510 511 DEFINE_I440FX_MACHINE(v2_5, "pc-i440fx-2.5", NULL, 512 pc_i440fx_2_5_machine_options); 513 514 515 static void pc_i440fx_2_4_machine_options(MachineClass *m) 516 { 517 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 518 pc_i440fx_2_5_machine_options(m); 519 m->hw_version = "2.4.0"; 520 pcmc->broken_reserved_end = true; 521 SET_MACHINE_COMPAT(m, PC_COMPAT_2_4); 522 } 523 524 DEFINE_I440FX_MACHINE(v2_4, "pc-i440fx-2.4", NULL, 525 pc_i440fx_2_4_machine_options) 526 527 528 static void pc_i440fx_2_3_machine_options(MachineClass *m) 529 { 530 pc_i440fx_2_4_machine_options(m); 531 m->hw_version = "2.3.0"; 532 SET_MACHINE_COMPAT(m, PC_COMPAT_2_3); 533 } 534 535 DEFINE_I440FX_MACHINE(v2_3, "pc-i440fx-2.3", pc_compat_2_3, 536 pc_i440fx_2_3_machine_options); 537 538 539 static void pc_i440fx_2_2_machine_options(MachineClass *m) 540 { 541 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 542 pc_i440fx_2_3_machine_options(m); 543 m->hw_version = "2.2.0"; 544 SET_MACHINE_COMPAT(m, PC_COMPAT_2_2); 545 pcmc->rsdp_in_ram = false; 546 } 547 548 DEFINE_I440FX_MACHINE(v2_2, "pc-i440fx-2.2", pc_compat_2_2, 549 pc_i440fx_2_2_machine_options); 550 551 552 static void pc_i440fx_2_1_machine_options(MachineClass *m) 553 { 554 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 555 pc_i440fx_2_2_machine_options(m); 556 m->hw_version = "2.1.0"; 557 m->default_display = NULL; 558 SET_MACHINE_COMPAT(m, PC_COMPAT_2_1); 559 pcmc->smbios_uuid_encoded = false; 560 pcmc->enforce_aligned_dimm = false; 561 } 562 563 DEFINE_I440FX_MACHINE(v2_1, "pc-i440fx-2.1", pc_compat_2_1, 564 pc_i440fx_2_1_machine_options); 565 566 567 568 static void pc_i440fx_2_0_machine_options(MachineClass *m) 569 { 570 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 571 pc_i440fx_2_1_machine_options(m); 572 m->hw_version = "2.0.0"; 573 SET_MACHINE_COMPAT(m, PC_COMPAT_2_0); 574 pcmc->smbios_legacy_mode = true; 575 pcmc->has_reserved_memory = false; 576 /* This value depends on the actual DSDT and SSDT compiled into 577 * the source QEMU; unfortunately it depends on the binary and 578 * not on the machine type, so we cannot make pc-i440fx-1.7 work on 579 * both QEMU 1.7 and QEMU 2.0. 580 * 581 * Large variations cause migration to fail for more than one 582 * consecutive value of the "-smp" maxcpus option. 583 * 584 * For small variations of the kind caused by different iasl versions, 585 * the 4k rounding usually leaves slack. However, there could be still 586 * one or two values that break. For QEMU 1.7 and QEMU 2.0 the 587 * slack is only ~10 bytes before one "-smp maxcpus" value breaks! 588 * 589 * 6652 is valid for QEMU 2.0, the right value for pc-i440fx-1.7 on 590 * QEMU 1.7 it is 6414. For RHEL/CentOS 7.0 it is 6418. 591 */ 592 pcmc->legacy_acpi_table_size = 6652; 593 pcmc->acpi_data_size = 0x10000; 594 } 595 596 DEFINE_I440FX_MACHINE(v2_0, "pc-i440fx-2.0", pc_compat_2_0, 597 pc_i440fx_2_0_machine_options); 598 599 600 static void pc_i440fx_1_7_machine_options(MachineClass *m) 601 { 602 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 603 pc_i440fx_2_0_machine_options(m); 604 m->hw_version = "1.7.0"; 605 m->default_machine_opts = NULL; 606 m->option_rom_has_mr = true; 607 SET_MACHINE_COMPAT(m, PC_COMPAT_1_7); 608 pcmc->smbios_defaults = false; 609 pcmc->gigabyte_align = false; 610 pcmc->legacy_acpi_table_size = 6414; 611 } 612 613 DEFINE_I440FX_MACHINE(v1_7, "pc-i440fx-1.7", pc_compat_1_7, 614 pc_i440fx_1_7_machine_options); 615 616 617 static void pc_i440fx_1_6_machine_options(MachineClass *m) 618 { 619 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 620 pc_i440fx_1_7_machine_options(m); 621 m->hw_version = "1.6.0"; 622 m->rom_file_has_mr = false; 623 SET_MACHINE_COMPAT(m, PC_COMPAT_1_6); 624 pcmc->has_acpi_build = false; 625 } 626 627 DEFINE_I440FX_MACHINE(v1_6, "pc-i440fx-1.6", pc_compat_1_6, 628 pc_i440fx_1_6_machine_options); 629 630 631 static void pc_i440fx_1_5_machine_options(MachineClass *m) 632 { 633 pc_i440fx_1_6_machine_options(m); 634 m->hw_version = "1.5.0"; 635 SET_MACHINE_COMPAT(m, PC_COMPAT_1_5); 636 } 637 638 DEFINE_I440FX_MACHINE(v1_5, "pc-i440fx-1.5", pc_compat_1_5, 639 pc_i440fx_1_5_machine_options); 640 641 642 static void pc_i440fx_1_4_machine_options(MachineClass *m) 643 { 644 pc_i440fx_1_5_machine_options(m); 645 m->hw_version = "1.4.0"; 646 m->hot_add_cpu = NULL; 647 SET_MACHINE_COMPAT(m, PC_COMPAT_1_4); 648 } 649 650 DEFINE_I440FX_MACHINE(v1_4, "pc-i440fx-1.4", pc_compat_1_4, 651 pc_i440fx_1_4_machine_options); 652 653 654 #define PC_COMPAT_1_3 \ 655 PC_CPU_MODEL_IDS("1.3.0") \ 656 {\ 657 .driver = "usb-tablet",\ 658 .property = "usb_version",\ 659 .value = stringify(1),\ 660 },{\ 661 .driver = "virtio-net-pci",\ 662 .property = "ctrl_mac_addr",\ 663 .value = "off", \ 664 },{ \ 665 .driver = "virtio-net-pci", \ 666 .property = "mq", \ 667 .value = "off", \ 668 }, {\ 669 .driver = "e1000",\ 670 .property = "autonegotiation",\ 671 .value = "off",\ 672 }, 673 674 675 static void pc_i440fx_1_3_machine_options(MachineClass *m) 676 { 677 pc_i440fx_1_4_machine_options(m); 678 m->hw_version = "1.3.0"; 679 SET_MACHINE_COMPAT(m, PC_COMPAT_1_3); 680 } 681 682 DEFINE_I440FX_MACHINE(v1_3, "pc-1.3", pc_compat_1_3, 683 pc_i440fx_1_3_machine_options); 684 685 686 #define PC_COMPAT_1_2 \ 687 PC_CPU_MODEL_IDS("1.2.0") \ 688 {\ 689 .driver = "nec-usb-xhci",\ 690 .property = "msi",\ 691 .value = "off",\ 692 },{\ 693 .driver = "nec-usb-xhci",\ 694 .property = "msix",\ 695 .value = "off",\ 696 },{\ 697 .driver = "ivshmem",\ 698 .property = "use64",\ 699 .value = "0",\ 700 },{\ 701 .driver = "qxl",\ 702 .property = "revision",\ 703 .value = stringify(3),\ 704 },{\ 705 .driver = "qxl-vga",\ 706 .property = "revision",\ 707 .value = stringify(3),\ 708 },{\ 709 .driver = "VGA",\ 710 .property = "mmio",\ 711 .value = "off",\ 712 }, 713 714 static void pc_i440fx_1_2_machine_options(MachineClass *m) 715 { 716 pc_i440fx_1_3_machine_options(m); 717 m->hw_version = "1.2.0"; 718 SET_MACHINE_COMPAT(m, PC_COMPAT_1_2); 719 } 720 721 DEFINE_I440FX_MACHINE(v1_2, "pc-1.2", pc_compat_1_2, 722 pc_i440fx_1_2_machine_options); 723 724 725 #define PC_COMPAT_1_1 \ 726 PC_CPU_MODEL_IDS("1.1.0") \ 727 {\ 728 .driver = "virtio-scsi-pci",\ 729 .property = "hotplug",\ 730 .value = "off",\ 731 },{\ 732 .driver = "virtio-scsi-pci",\ 733 .property = "param_change",\ 734 .value = "off",\ 735 },{\ 736 .driver = "VGA",\ 737 .property = "vgamem_mb",\ 738 .value = stringify(8),\ 739 },{\ 740 .driver = "vmware-svga",\ 741 .property = "vgamem_mb",\ 742 .value = stringify(8),\ 743 },{\ 744 .driver = "qxl-vga",\ 745 .property = "vgamem_mb",\ 746 .value = stringify(8),\ 747 },{\ 748 .driver = "qxl",\ 749 .property = "vgamem_mb",\ 750 .value = stringify(8),\ 751 },{\ 752 .driver = "virtio-blk-pci",\ 753 .property = "config-wce",\ 754 .value = "off",\ 755 }, 756 757 static void pc_i440fx_1_1_machine_options(MachineClass *m) 758 { 759 pc_i440fx_1_2_machine_options(m); 760 m->hw_version = "1.1.0"; 761 SET_MACHINE_COMPAT(m, PC_COMPAT_1_1); 762 } 763 764 DEFINE_I440FX_MACHINE(v1_1, "pc-1.1", pc_compat_1_2, 765 pc_i440fx_1_1_machine_options); 766 767 768 #define PC_COMPAT_1_0 \ 769 PC_CPU_MODEL_IDS("1.0") \ 770 {\ 771 .driver = TYPE_ISA_FDC,\ 772 .property = "check_media_rate",\ 773 .value = "off",\ 774 }, {\ 775 .driver = "virtio-balloon-pci",\ 776 .property = "class",\ 777 .value = stringify(PCI_CLASS_MEMORY_RAM),\ 778 },{\ 779 .driver = "apic-common",\ 780 .property = "vapic",\ 781 .value = "off",\ 782 },{\ 783 .driver = TYPE_USB_DEVICE,\ 784 .property = "full-path",\ 785 .value = "no",\ 786 }, 787 788 static void pc_i440fx_1_0_machine_options(MachineClass *m) 789 { 790 pc_i440fx_1_1_machine_options(m); 791 m->hw_version = "1.0"; 792 SET_MACHINE_COMPAT(m, PC_COMPAT_1_0); 793 } 794 795 DEFINE_I440FX_MACHINE(v1_0, "pc-1.0", pc_compat_1_2, 796 pc_i440fx_1_0_machine_options); 797 798 799 #define PC_COMPAT_0_15 \ 800 PC_CPU_MODEL_IDS("0.15") 801 802 static void pc_i440fx_0_15_machine_options(MachineClass *m) 803 { 804 pc_i440fx_1_0_machine_options(m); 805 m->hw_version = "0.15"; 806 SET_MACHINE_COMPAT(m, PC_COMPAT_0_15); 807 } 808 809 DEFINE_I440FX_MACHINE(v0_15, "pc-0.15", pc_compat_1_2, 810 pc_i440fx_0_15_machine_options); 811 812 813 #define PC_COMPAT_0_14 \ 814 PC_CPU_MODEL_IDS("0.14") \ 815 {\ 816 .driver = "virtio-blk-pci",\ 817 .property = "event_idx",\ 818 .value = "off",\ 819 },{\ 820 .driver = "virtio-serial-pci",\ 821 .property = "event_idx",\ 822 .value = "off",\ 823 },{\ 824 .driver = "virtio-net-pci",\ 825 .property = "event_idx",\ 826 .value = "off",\ 827 },{\ 828 .driver = "virtio-balloon-pci",\ 829 .property = "event_idx",\ 830 .value = "off",\ 831 },{\ 832 .driver = "qxl",\ 833 .property = "revision",\ 834 .value = stringify(2),\ 835 },{\ 836 .driver = "qxl-vga",\ 837 .property = "revision",\ 838 .value = stringify(2),\ 839 }, 840 841 static void pc_i440fx_0_14_machine_options(MachineClass *m) 842 { 843 pc_i440fx_0_15_machine_options(m); 844 m->hw_version = "0.14"; 845 SET_MACHINE_COMPAT(m, PC_COMPAT_0_14); 846 } 847 848 DEFINE_I440FX_MACHINE(v0_14, "pc-0.14", pc_compat_1_2, 849 pc_i440fx_0_14_machine_options); 850 851 852 #define PC_COMPAT_0_13 \ 853 PC_CPU_MODEL_IDS("0.13") \ 854 {\ 855 .driver = TYPE_PCI_DEVICE,\ 856 .property = "command_serr_enable",\ 857 .value = "off",\ 858 },{\ 859 .driver = "AC97",\ 860 .property = "use_broken_id",\ 861 .value = stringify(1),\ 862 },{\ 863 .driver = "virtio-9p-pci",\ 864 .property = "vectors",\ 865 .value = stringify(0),\ 866 },{\ 867 .driver = "VGA",\ 868 .property = "rombar",\ 869 .value = stringify(0),\ 870 },{\ 871 .driver = "vmware-svga",\ 872 .property = "rombar",\ 873 .value = stringify(0),\ 874 }, 875 876 static void pc_i440fx_0_13_machine_options(MachineClass *m) 877 { 878 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 879 pc_i440fx_0_14_machine_options(m); 880 m->hw_version = "0.13"; 881 SET_MACHINE_COMPAT(m, PC_COMPAT_0_13); 882 pcmc->kvmclock_enabled = false; 883 } 884 885 DEFINE_I440FX_MACHINE(v0_13, "pc-0.13", pc_compat_0_13, 886 pc_i440fx_0_13_machine_options); 887 888 889 #define PC_COMPAT_0_12 \ 890 PC_CPU_MODEL_IDS("0.12") \ 891 {\ 892 .driver = "virtio-serial-pci",\ 893 .property = "max_ports",\ 894 .value = stringify(1),\ 895 },{\ 896 .driver = "virtio-serial-pci",\ 897 .property = "vectors",\ 898 .value = stringify(0),\ 899 },{\ 900 .driver = "usb-mouse",\ 901 .property = "serial",\ 902 .value = "1",\ 903 },{\ 904 .driver = "usb-tablet",\ 905 .property = "serial",\ 906 .value = "1",\ 907 },{\ 908 .driver = "usb-kbd",\ 909 .property = "serial",\ 910 .value = "1",\ 911 }, 912 913 static void pc_i440fx_0_12_machine_options(MachineClass *m) 914 { 915 pc_i440fx_0_13_machine_options(m); 916 m->hw_version = "0.12"; 917 SET_MACHINE_COMPAT(m, PC_COMPAT_0_12); 918 } 919 920 DEFINE_I440FX_MACHINE(v0_12, "pc-0.12", pc_compat_0_13, 921 pc_i440fx_0_12_machine_options); 922 923 924 #define PC_COMPAT_0_11 \ 925 PC_CPU_MODEL_IDS("0.11") \ 926 {\ 927 .driver = "virtio-blk-pci",\ 928 .property = "vectors",\ 929 .value = stringify(0),\ 930 },{\ 931 .driver = TYPE_PCI_DEVICE,\ 932 .property = "rombar",\ 933 .value = stringify(0),\ 934 },{\ 935 .driver = "ide-drive",\ 936 .property = "ver",\ 937 .value = "0.11",\ 938 },{\ 939 .driver = "scsi-disk",\ 940 .property = "ver",\ 941 .value = "0.11",\ 942 }, 943 944 static void pc_i440fx_0_11_machine_options(MachineClass *m) 945 { 946 pc_i440fx_0_12_machine_options(m); 947 m->hw_version = "0.11"; 948 SET_MACHINE_COMPAT(m, PC_COMPAT_0_11); 949 } 950 951 DEFINE_I440FX_MACHINE(v0_11, "pc-0.11", pc_compat_0_13, 952 pc_i440fx_0_11_machine_options); 953 954 955 #define PC_COMPAT_0_10 \ 956 PC_CPU_MODEL_IDS("0.10") \ 957 {\ 958 .driver = "virtio-blk-pci",\ 959 .property = "class",\ 960 .value = stringify(PCI_CLASS_STORAGE_OTHER),\ 961 },{\ 962 .driver = "virtio-serial-pci",\ 963 .property = "class",\ 964 .value = stringify(PCI_CLASS_DISPLAY_OTHER),\ 965 },{\ 966 .driver = "virtio-net-pci",\ 967 .property = "vectors",\ 968 .value = stringify(0),\ 969 },{\ 970 .driver = "ide-drive",\ 971 .property = "ver",\ 972 .value = "0.10",\ 973 },{\ 974 .driver = "scsi-disk",\ 975 .property = "ver",\ 976 .value = "0.10",\ 977 }, 978 979 static void pc_i440fx_0_10_machine_options(MachineClass *m) 980 { 981 pc_i440fx_0_11_machine_options(m); 982 m->hw_version = "0.10"; 983 SET_MACHINE_COMPAT(m, PC_COMPAT_0_10); 984 } 985 986 DEFINE_I440FX_MACHINE(v0_10, "pc-0.10", pc_compat_0_13, 987 pc_i440fx_0_10_machine_options); 988 989 typedef struct { 990 uint16_t gpu_device_id; 991 uint16_t pch_device_id; 992 uint8_t pch_revision_id; 993 } IGDDeviceIDInfo; 994 995 /* In real world different GPU should have different PCH. But actually 996 * the different PCH DIDs likely map to different PCH SKUs. We do the 997 * same thing for the GPU. For PCH, the different SKUs are going to be 998 * all the same silicon design and implementation, just different 999 * features turn on and off with fuses. The SW interfaces should be 1000 * consistent across all SKUs in a given family (eg LPT). But just same 1001 * features may not be supported. 1002 * 1003 * Most of these different PCH features probably don't matter to the 1004 * Gfx driver, but obviously any difference in display port connections 1005 * will so it should be fine with any PCH in case of passthrough. 1006 * 1007 * So currently use one PCH version, 0x8c4e, to cover all HSW(Haswell) 1008 * scenarios, 0x9cc3 for BDW(Broadwell). 1009 */ 1010 static const IGDDeviceIDInfo igd_combo_id_infos[] = { 1011 /* HSW Classic */ 1012 {0x0402, 0x8c4e, 0x04}, /* HSWGT1D, HSWD_w7 */ 1013 {0x0406, 0x8c4e, 0x04}, /* HSWGT1M, HSWM_w7 */ 1014 {0x0412, 0x8c4e, 0x04}, /* HSWGT2D, HSWD_w7 */ 1015 {0x0416, 0x8c4e, 0x04}, /* HSWGT2M, HSWM_w7 */ 1016 {0x041E, 0x8c4e, 0x04}, /* HSWGT15D, HSWD_w7 */ 1017 /* HSW ULT */ 1018 {0x0A06, 0x8c4e, 0x04}, /* HSWGT1UT, HSWM_w7 */ 1019 {0x0A16, 0x8c4e, 0x04}, /* HSWGT2UT, HSWM_w7 */ 1020 {0x0A26, 0x8c4e, 0x06}, /* HSWGT3UT, HSWM_w7 */ 1021 {0x0A2E, 0x8c4e, 0x04}, /* HSWGT3UT28W, HSWM_w7 */ 1022 {0x0A1E, 0x8c4e, 0x04}, /* HSWGT2UX, HSWM_w7 */ 1023 {0x0A0E, 0x8c4e, 0x04}, /* HSWGT1ULX, HSWM_w7 */ 1024 /* HSW CRW */ 1025 {0x0D26, 0x8c4e, 0x04}, /* HSWGT3CW, HSWM_w7 */ 1026 {0x0D22, 0x8c4e, 0x04}, /* HSWGT3CWDT, HSWD_w7 */ 1027 /* HSW Server */ 1028 {0x041A, 0x8c4e, 0x04}, /* HSWSVGT2, HSWD_w7 */ 1029 /* HSW SRVR */ 1030 {0x040A, 0x8c4e, 0x04}, /* HSWSVGT1, HSWD_w7 */ 1031 /* BSW */ 1032 {0x1606, 0x9cc3, 0x03}, /* BDWULTGT1, BDWM_w7 */ 1033 {0x1616, 0x9cc3, 0x03}, /* BDWULTGT2, BDWM_w7 */ 1034 {0x1626, 0x9cc3, 0x03}, /* BDWULTGT3, BDWM_w7 */ 1035 {0x160E, 0x9cc3, 0x03}, /* BDWULXGT1, BDWM_w7 */ 1036 {0x161E, 0x9cc3, 0x03}, /* BDWULXGT2, BDWM_w7 */ 1037 {0x1602, 0x9cc3, 0x03}, /* BDWHALOGT1, BDWM_w7 */ 1038 {0x1612, 0x9cc3, 0x03}, /* BDWHALOGT2, BDWM_w7 */ 1039 {0x1622, 0x9cc3, 0x03}, /* BDWHALOGT3, BDWM_w7 */ 1040 {0x162B, 0x9cc3, 0x03}, /* BDWHALO28W, BDWM_w7 */ 1041 {0x162A, 0x9cc3, 0x03}, /* BDWGT3WRKS, BDWM_w7 */ 1042 {0x162D, 0x9cc3, 0x03}, /* BDWGT3SRVR, BDWM_w7 */ 1043 }; 1044 1045 static void isa_bridge_class_init(ObjectClass *klass, void *data) 1046 { 1047 DeviceClass *dc = DEVICE_CLASS(klass); 1048 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 1049 1050 dc->desc = "ISA bridge faked to support IGD PT"; 1051 k->vendor_id = PCI_VENDOR_ID_INTEL; 1052 k->class_id = PCI_CLASS_BRIDGE_ISA; 1053 }; 1054 1055 static TypeInfo isa_bridge_info = { 1056 .name = "igd-passthrough-isa-bridge", 1057 .parent = TYPE_PCI_DEVICE, 1058 .instance_size = sizeof(PCIDevice), 1059 .class_init = isa_bridge_class_init, 1060 .interfaces = (InterfaceInfo[]) { 1061 { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 1062 { }, 1063 }, 1064 }; 1065 1066 static void pt_graphics_register_types(void) 1067 { 1068 type_register_static(&isa_bridge_info); 1069 } 1070 type_init(pt_graphics_register_types) 1071 1072 void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id) 1073 { 1074 struct PCIDevice *bridge_dev; 1075 int i, num; 1076 uint16_t pch_dev_id = 0xffff; 1077 uint8_t pch_rev_id; 1078 1079 num = ARRAY_SIZE(igd_combo_id_infos); 1080 for (i = 0; i < num; i++) { 1081 if (gpu_dev_id == igd_combo_id_infos[i].gpu_device_id) { 1082 pch_dev_id = igd_combo_id_infos[i].pch_device_id; 1083 pch_rev_id = igd_combo_id_infos[i].pch_revision_id; 1084 } 1085 } 1086 1087 if (pch_dev_id == 0xffff) { 1088 return; 1089 } 1090 1091 /* Currently IGD drivers always need to access PCH by 1f.0. */ 1092 bridge_dev = pci_create_simple(bus, PCI_DEVFN(0x1f, 0), 1093 "igd-passthrough-isa-bridge"); 1094 1095 /* 1096 * Note that vendor id is always PCI_VENDOR_ID_INTEL. 1097 */ 1098 if (!bridge_dev) { 1099 fprintf(stderr, "set igd-passthrough-isa-bridge failed!\n"); 1100 return; 1101 } 1102 pci_config_set_device_id(bridge_dev->config, pch_dev_id); 1103 pci_config_set_revision(bridge_dev->config, pch_rev_id); 1104 } 1105 1106 static void isapc_machine_options(MachineClass *m) 1107 { 1108 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 1109 m->desc = "ISA-only PC"; 1110 m->max_cpus = 1; 1111 m->option_rom_has_mr = true; 1112 m->rom_file_has_mr = false; 1113 pcmc->pci_enabled = false; 1114 pcmc->has_acpi_build = false; 1115 pcmc->smbios_defaults = false; 1116 pcmc->gigabyte_align = false; 1117 pcmc->smbios_legacy_mode = true; 1118 pcmc->has_reserved_memory = false; 1119 pcmc->default_nic_model = "ne2k_isa"; 1120 m->default_cpu_type = X86_CPU_TYPE_NAME("486"); 1121 } 1122 1123 DEFINE_PC_MACHINE(isapc, "isapc", pc_init_isa, 1124 isapc_machine_options); 1125 1126 1127 #ifdef CONFIG_XEN 1128 static void xenfv_machine_options(MachineClass *m) 1129 { 1130 m->desc = "Xen Fully-virtualized PC"; 1131 m->max_cpus = HVM_MAX_VCPUS; 1132 m->default_machine_opts = "accel=xen"; 1133 } 1134 1135 DEFINE_PC_MACHINE(xenfv, "xenfv", pc_xen_hvm_init, 1136 xenfv_machine_options); 1137 #endif 1138