1 /* 2 * QEMU PC System Emulator 3 * 4 * Copyright (c) 2003-2004 Fabrice Bellard 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 #include "qemu/osdep.h" 26 #include "config-devices.h" 27 28 #include "qemu/units.h" 29 #include "hw/loader.h" 30 #include "hw/i386/x86.h" 31 #include "hw/i386/pc.h" 32 #include "hw/i386/apic.h" 33 #include "hw/pci-host/i440fx.h" 34 #include "hw/southbridge/piix.h" 35 #include "hw/display/ramfb.h" 36 #include "hw/firmware/smbios.h" 37 #include "hw/pci/pci.h" 38 #include "hw/pci/pci_ids.h" 39 #include "hw/usb.h" 40 #include "net/net.h" 41 #include "hw/ide.h" 42 #include "hw/irq.h" 43 #include "sysemu/kvm.h" 44 #include "hw/kvm/clock.h" 45 #include "sysemu/sysemu.h" 46 #include "hw/sysbus.h" 47 #include "sysemu/arch_init.h" 48 #include "hw/i2c/smbus_eeprom.h" 49 #include "hw/xen/xen.h" 50 #include "exec/memory.h" 51 #include "exec/address-spaces.h" 52 #include "hw/acpi/acpi.h" 53 #include "cpu.h" 54 #include "qapi/error.h" 55 #include "qemu/error-report.h" 56 #ifdef CONFIG_XEN 57 #include <xen/hvm/hvm_info_table.h> 58 #include "hw/xen/xen_pt.h" 59 #endif 60 #include "migration/global_state.h" 61 #include "migration/misc.h" 62 #include "sysemu/numa.h" 63 64 #define MAX_IDE_BUS 2 65 66 #ifdef CONFIG_IDE_ISA 67 static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 }; 68 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 }; 69 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 }; 70 #endif 71 72 /* PC hardware initialisation */ 73 static void pc_init1(MachineState *machine, 74 const char *host_type, const char *pci_type) 75 { 76 PCMachineState *pcms = PC_MACHINE(machine); 77 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); 78 X86MachineState *x86ms = X86_MACHINE(machine); 79 MemoryRegion *system_memory = get_system_memory(); 80 MemoryRegion *system_io = get_system_io(); 81 PCIBus *pci_bus; 82 ISABus *isa_bus; 83 PCII440FXState *i440fx_state; 84 int piix3_devfn = -1; 85 qemu_irq smi_irq; 86 GSIState *gsi_state; 87 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; 88 BusState *idebus[MAX_IDE_BUS]; 89 ISADevice *rtc_state; 90 MemoryRegion *ram_memory; 91 MemoryRegion *pci_memory; 92 MemoryRegion *rom_memory; 93 ram_addr_t lowmem; 94 95 /* 96 * Calculate ram split, for memory below and above 4G. It's a bit 97 * complicated for backward compatibility reasons ... 98 * 99 * - Traditional split is 3.5G (lowmem = 0xe0000000). This is the 100 * default value for max_ram_below_4g now. 101 * 102 * - Then, to gigabyte align the memory, we move the split to 3G 103 * (lowmem = 0xc0000000). But only in case we have to split in 104 * the first place, i.e. ram_size is larger than (traditional) 105 * lowmem. And for new machine types (gigabyte_align = true) 106 * only, for live migration compatibility reasons. 107 * 108 * - Next the max-ram-below-4g option was added, which allowed to 109 * reduce lowmem to a smaller value, to allow a larger PCI I/O 110 * window below 4G. qemu doesn't enforce gigabyte alignment here, 111 * but prints a warning. 112 * 113 * - Finally max-ram-below-4g got updated to also allow raising lowmem, 114 * so legacy non-PAE guests can get as much memory as possible in 115 * the 32bit address space below 4G. 116 * 117 * - Note that Xen has its own ram setp code in xen_ram_init(), 118 * called via xen_hvm_init(). 119 * 120 * Examples: 121 * qemu -M pc-1.7 -m 4G (old default) -> 3584M low, 512M high 122 * qemu -M pc -m 4G (new default) -> 3072M low, 1024M high 123 * qemu -M pc,max-ram-below-4g=2G -m 4G -> 2048M low, 2048M high 124 * qemu -M pc,max-ram-below-4g=4G -m 3968M -> 3968M low (=4G-128M) 125 */ 126 if (xen_enabled()) { 127 xen_hvm_init(pcms, &ram_memory); 128 } else { 129 if (!x86ms->max_ram_below_4g) { 130 x86ms->max_ram_below_4g = 0xe0000000; /* default: 3.5G */ 131 } 132 lowmem = x86ms->max_ram_below_4g; 133 if (machine->ram_size >= x86ms->max_ram_below_4g) { 134 if (pcmc->gigabyte_align) { 135 if (lowmem > 0xc0000000) { 136 lowmem = 0xc0000000; 137 } 138 if (lowmem & (1 * GiB - 1)) { 139 warn_report("Large machine and max_ram_below_4g " 140 "(%" PRIu64 ") not a multiple of 1G; " 141 "possible bad performance.", 142 x86ms->max_ram_below_4g); 143 } 144 } 145 } 146 147 if (machine->ram_size >= lowmem) { 148 x86ms->above_4g_mem_size = machine->ram_size - lowmem; 149 x86ms->below_4g_mem_size = lowmem; 150 } else { 151 x86ms->above_4g_mem_size = 0; 152 x86ms->below_4g_mem_size = machine->ram_size; 153 } 154 } 155 156 x86_cpus_init(x86ms, pcmc->default_cpu_version); 157 158 if (kvm_enabled() && pcmc->kvmclock_enabled) { 159 kvmclock_create(); 160 } 161 162 if (pcmc->pci_enabled) { 163 pci_memory = g_new(MemoryRegion, 1); 164 memory_region_init(pci_memory, NULL, "pci", UINT64_MAX); 165 rom_memory = pci_memory; 166 } else { 167 pci_memory = NULL; 168 rom_memory = system_memory; 169 } 170 171 pc_guest_info_init(pcms); 172 173 if (pcmc->smbios_defaults) { 174 MachineClass *mc = MACHINE_GET_CLASS(machine); 175 /* These values are guest ABI, do not change */ 176 smbios_set_defaults("QEMU", "Standard PC (i440FX + PIIX, 1996)", 177 mc->name, pcmc->smbios_legacy_mode, 178 pcmc->smbios_uuid_encoded, 179 SMBIOS_ENTRY_POINT_21); 180 } 181 182 /* allocate ram and load rom/bios */ 183 if (!xen_enabled()) { 184 pc_memory_init(pcms, system_memory, 185 rom_memory, &ram_memory); 186 } else if (machine->kernel_filename != NULL) { 187 /* For xen HVM direct kernel boot, load linux here */ 188 xen_load_linux(pcms); 189 } 190 191 gsi_state = pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled); 192 193 if (pcmc->pci_enabled) { 194 PIIX3State *piix3; 195 196 pci_bus = i440fx_init(host_type, 197 pci_type, 198 &i440fx_state, 199 system_memory, system_io, machine->ram_size, 200 x86ms->below_4g_mem_size, 201 x86ms->above_4g_mem_size, 202 pci_memory, ram_memory); 203 pcms->bus = pci_bus; 204 205 piix3 = piix3_create(pci_bus, &isa_bus); 206 piix3->pic = x86ms->gsi; 207 piix3_devfn = piix3->dev.devfn; 208 } else { 209 pci_bus = NULL; 210 i440fx_state = NULL; 211 isa_bus = isa_bus_new(NULL, get_system_memory(), system_io, 212 &error_abort); 213 no_hpet = 1; 214 } 215 isa_bus_irqs(isa_bus, x86ms->gsi); 216 217 pc_i8259_create(isa_bus, gsi_state->i8259_irq); 218 219 if (pcmc->pci_enabled) { 220 ioapic_init_gsi(gsi_state, "i440fx"); 221 } 222 223 if (tcg_enabled()) { 224 x86_register_ferr_irq(x86ms->gsi[13]); 225 } 226 227 pc_vga_init(isa_bus, pcmc->pci_enabled ? pci_bus : NULL); 228 229 assert(pcms->vmport != ON_OFF_AUTO__MAX); 230 if (pcms->vmport == ON_OFF_AUTO_AUTO) { 231 pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON; 232 } 233 234 /* init basic PC hardware */ 235 pc_basic_device_init(isa_bus, x86ms->gsi, &rtc_state, true, 236 (pcms->vmport != ON_OFF_AUTO_ON), pcms->pit_enabled, 237 0x4); 238 239 pc_nic_init(pcmc, isa_bus, pci_bus); 240 241 ide_drive_get(hd, ARRAY_SIZE(hd)); 242 if (pcmc->pci_enabled) { 243 PCIDevice *dev; 244 if (xen_enabled()) { 245 dev = pci_piix3_xen_ide_init(pci_bus, hd, piix3_devfn + 1); 246 } else { 247 dev = pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1); 248 } 249 idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0"); 250 idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1"); 251 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state); 252 } 253 #ifdef CONFIG_IDE_ISA 254 else { 255 int i; 256 for (i = 0; i < MAX_IDE_BUS; i++) { 257 ISADevice *dev; 258 char busname[] = "ide.0"; 259 dev = isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i], 260 ide_irq[i], 261 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]); 262 /* 263 * The ide bus name is ide.0 for the first bus and ide.1 for the 264 * second one. 265 */ 266 busname[4] = '0' + i; 267 idebus[i] = qdev_get_child_bus(DEVICE(dev), busname); 268 } 269 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state); 270 } 271 #endif 272 273 if (pcmc->pci_enabled && machine_usb(machine)) { 274 pci_create_simple(pci_bus, piix3_devfn + 2, "piix3-usb-uhci"); 275 } 276 277 if (pcmc->pci_enabled && acpi_enabled) { 278 DeviceState *piix4_pm; 279 280 smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0); 281 /* TODO: Populate SPD eeprom data. */ 282 pcms->smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, 283 x86ms->gsi[9], smi_irq, 284 x86_machine_is_smm_enabled(x86ms), 285 &piix4_pm); 286 smbus_eeprom_init(pcms->smbus, 8, NULL, 0); 287 288 object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP, 289 TYPE_HOTPLUG_HANDLER, 290 (Object **)&pcms->acpi_dev, 291 object_property_allow_set_link, 292 OBJ_PROP_LINK_STRONG, &error_abort); 293 object_property_set_link(OBJECT(machine), OBJECT(piix4_pm), 294 PC_MACHINE_ACPI_DEVICE_PROP, &error_abort); 295 } 296 297 if (machine->nvdimms_state->is_enabled) { 298 nvdimm_init_acpi_state(machine->nvdimms_state, system_io, 299 x86ms->fw_cfg, OBJECT(pcms)); 300 } 301 } 302 303 /* Looking for a pc_compat_2_4() function? It doesn't exist. 304 * pc_compat_*() functions that run on machine-init time and 305 * change global QEMU state are deprecated. Please don't create 306 * one, and implement any pc-*-2.4 (and newer) compat code in 307 * hw_compat_*, pc_compat_*, or * pc_*_machine_options(). 308 */ 309 310 static void pc_compat_2_3_fn(MachineState *machine) 311 { 312 X86MachineState *x86ms = X86_MACHINE(machine); 313 if (kvm_enabled()) { 314 x86ms->smm = ON_OFF_AUTO_OFF; 315 } 316 } 317 318 static void pc_compat_2_2_fn(MachineState *machine) 319 { 320 pc_compat_2_3_fn(machine); 321 } 322 323 static void pc_compat_2_1_fn(MachineState *machine) 324 { 325 pc_compat_2_2_fn(machine); 326 x86_cpu_change_kvm_default("svm", NULL); 327 } 328 329 static void pc_compat_2_0_fn(MachineState *machine) 330 { 331 pc_compat_2_1_fn(machine); 332 } 333 334 static void pc_compat_1_7_fn(MachineState *machine) 335 { 336 pc_compat_2_0_fn(machine); 337 x86_cpu_change_kvm_default("x2apic", NULL); 338 } 339 340 static void pc_compat_1_6_fn(MachineState *machine) 341 { 342 pc_compat_1_7_fn(machine); 343 } 344 345 static void pc_compat_1_5_fn(MachineState *machine) 346 { 347 pc_compat_1_6_fn(machine); 348 } 349 350 static void pc_compat_1_4_fn(MachineState *machine) 351 { 352 pc_compat_1_5_fn(machine); 353 } 354 355 static void pc_compat_1_3(MachineState *machine) 356 { 357 pc_compat_1_4_fn(machine); 358 } 359 360 /* PC compat function for pc-1.0 to pc-1.2 */ 361 static void pc_compat_1_2(MachineState *machine) 362 { 363 pc_compat_1_3(machine); 364 x86_cpu_change_kvm_default("kvm-pv-eoi", NULL); 365 } 366 367 static void pc_init_isa(MachineState *machine) 368 { 369 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, TYPE_I440FX_PCI_DEVICE); 370 } 371 372 #ifdef CONFIG_XEN 373 static void pc_xen_hvm_init_pci(MachineState *machine) 374 { 375 const char *pci_type = has_igd_gfx_passthru ? 376 TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE : TYPE_I440FX_PCI_DEVICE; 377 378 pc_init1(machine, 379 TYPE_I440FX_PCI_HOST_BRIDGE, 380 pci_type); 381 } 382 383 static void pc_xen_hvm_init(MachineState *machine) 384 { 385 PCMachineState *pcms = PC_MACHINE(machine); 386 387 if (!xen_enabled()) { 388 error_report("xenfv machine requires the xen accelerator"); 389 exit(1); 390 } 391 392 pc_xen_hvm_init_pci(machine); 393 pci_create_simple(pcms->bus, -1, "xen-platform"); 394 } 395 #endif 396 397 #define DEFINE_I440FX_MACHINE(suffix, name, compatfn, optionfn) \ 398 static void pc_init_##suffix(MachineState *machine) \ 399 { \ 400 void (*compat)(MachineState *m) = (compatfn); \ 401 if (compat) { \ 402 compat(machine); \ 403 } \ 404 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, \ 405 TYPE_I440FX_PCI_DEVICE); \ 406 } \ 407 DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn) 408 409 static void pc_i440fx_machine_options(MachineClass *m) 410 { 411 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 412 pcmc->default_nic_model = "e1000"; 413 414 m->family = "pc_piix"; 415 m->desc = "Standard PC (i440FX + PIIX, 1996)"; 416 m->default_machine_opts = "firmware=bios-256k.bin"; 417 m->default_display = "std"; 418 machine_class_allow_dynamic_sysbus_dev(m, TYPE_RAMFB_DEVICE); 419 } 420 421 static void pc_i440fx_5_0_machine_options(MachineClass *m) 422 { 423 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 424 pc_i440fx_machine_options(m); 425 m->alias = "pc"; 426 m->is_default = 1; 427 pcmc->default_cpu_version = 1; 428 } 429 430 DEFINE_I440FX_MACHINE(v5_0, "pc-i440fx-5.0", NULL, 431 pc_i440fx_5_0_machine_options); 432 433 static void pc_i440fx_4_2_machine_options(MachineClass *m) 434 { 435 pc_i440fx_5_0_machine_options(m); 436 m->alias = NULL; 437 m->is_default = 0; 438 compat_props_add(m->compat_props, hw_compat_4_2, hw_compat_4_2_len); 439 compat_props_add(m->compat_props, pc_compat_4_2, pc_compat_4_2_len); 440 } 441 442 DEFINE_I440FX_MACHINE(v4_2, "pc-i440fx-4.2", NULL, 443 pc_i440fx_4_2_machine_options); 444 445 static void pc_i440fx_4_1_machine_options(MachineClass *m) 446 { 447 pc_i440fx_4_2_machine_options(m); 448 m->alias = NULL; 449 m->is_default = 0; 450 compat_props_add(m->compat_props, hw_compat_4_1, hw_compat_4_1_len); 451 compat_props_add(m->compat_props, pc_compat_4_1, pc_compat_4_1_len); 452 } 453 454 DEFINE_I440FX_MACHINE(v4_1, "pc-i440fx-4.1", NULL, 455 pc_i440fx_4_1_machine_options); 456 457 static void pc_i440fx_4_0_machine_options(MachineClass *m) 458 { 459 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 460 pc_i440fx_4_1_machine_options(m); 461 m->alias = NULL; 462 m->is_default = 0; 463 pcmc->default_cpu_version = CPU_VERSION_LEGACY; 464 compat_props_add(m->compat_props, hw_compat_4_0, hw_compat_4_0_len); 465 compat_props_add(m->compat_props, pc_compat_4_0, pc_compat_4_0_len); 466 } 467 468 DEFINE_I440FX_MACHINE(v4_0, "pc-i440fx-4.0", NULL, 469 pc_i440fx_4_0_machine_options); 470 471 static void pc_i440fx_3_1_machine_options(MachineClass *m) 472 { 473 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 474 475 pc_i440fx_4_0_machine_options(m); 476 m->is_default = 0; 477 pcmc->do_not_add_smb_acpi = true; 478 m->smbus_no_migration_support = true; 479 m->alias = NULL; 480 pcmc->pvh_enabled = false; 481 compat_props_add(m->compat_props, hw_compat_3_1, hw_compat_3_1_len); 482 compat_props_add(m->compat_props, pc_compat_3_1, pc_compat_3_1_len); 483 } 484 485 DEFINE_I440FX_MACHINE(v3_1, "pc-i440fx-3.1", NULL, 486 pc_i440fx_3_1_machine_options); 487 488 static void pc_i440fx_3_0_machine_options(MachineClass *m) 489 { 490 pc_i440fx_3_1_machine_options(m); 491 compat_props_add(m->compat_props, hw_compat_3_0, hw_compat_3_0_len); 492 compat_props_add(m->compat_props, pc_compat_3_0, pc_compat_3_0_len); 493 } 494 495 DEFINE_I440FX_MACHINE(v3_0, "pc-i440fx-3.0", NULL, 496 pc_i440fx_3_0_machine_options); 497 498 static void pc_i440fx_2_12_machine_options(MachineClass *m) 499 { 500 pc_i440fx_3_0_machine_options(m); 501 compat_props_add(m->compat_props, hw_compat_2_12, hw_compat_2_12_len); 502 compat_props_add(m->compat_props, pc_compat_2_12, pc_compat_2_12_len); 503 } 504 505 DEFINE_I440FX_MACHINE(v2_12, "pc-i440fx-2.12", NULL, 506 pc_i440fx_2_12_machine_options); 507 508 static void pc_i440fx_2_11_machine_options(MachineClass *m) 509 { 510 pc_i440fx_2_12_machine_options(m); 511 compat_props_add(m->compat_props, hw_compat_2_11, hw_compat_2_11_len); 512 compat_props_add(m->compat_props, pc_compat_2_11, pc_compat_2_11_len); 513 } 514 515 DEFINE_I440FX_MACHINE(v2_11, "pc-i440fx-2.11", NULL, 516 pc_i440fx_2_11_machine_options); 517 518 static void pc_i440fx_2_10_machine_options(MachineClass *m) 519 { 520 pc_i440fx_2_11_machine_options(m); 521 compat_props_add(m->compat_props, hw_compat_2_10, hw_compat_2_10_len); 522 compat_props_add(m->compat_props, pc_compat_2_10, pc_compat_2_10_len); 523 m->auto_enable_numa_with_memhp = false; 524 } 525 526 DEFINE_I440FX_MACHINE(v2_10, "pc-i440fx-2.10", NULL, 527 pc_i440fx_2_10_machine_options); 528 529 static void pc_i440fx_2_9_machine_options(MachineClass *m) 530 { 531 pc_i440fx_2_10_machine_options(m); 532 compat_props_add(m->compat_props, hw_compat_2_9, hw_compat_2_9_len); 533 compat_props_add(m->compat_props, pc_compat_2_9, pc_compat_2_9_len); 534 m->numa_auto_assign_ram = numa_legacy_auto_assign_ram; 535 } 536 537 DEFINE_I440FX_MACHINE(v2_9, "pc-i440fx-2.9", NULL, 538 pc_i440fx_2_9_machine_options); 539 540 static void pc_i440fx_2_8_machine_options(MachineClass *m) 541 { 542 pc_i440fx_2_9_machine_options(m); 543 compat_props_add(m->compat_props, hw_compat_2_8, hw_compat_2_8_len); 544 compat_props_add(m->compat_props, pc_compat_2_8, pc_compat_2_8_len); 545 } 546 547 DEFINE_I440FX_MACHINE(v2_8, "pc-i440fx-2.8", NULL, 548 pc_i440fx_2_8_machine_options); 549 550 static void pc_i440fx_2_7_machine_options(MachineClass *m) 551 { 552 pc_i440fx_2_8_machine_options(m); 553 compat_props_add(m->compat_props, hw_compat_2_7, hw_compat_2_7_len); 554 compat_props_add(m->compat_props, pc_compat_2_7, pc_compat_2_7_len); 555 } 556 557 DEFINE_I440FX_MACHINE(v2_7, "pc-i440fx-2.7", NULL, 558 pc_i440fx_2_7_machine_options); 559 560 static void pc_i440fx_2_6_machine_options(MachineClass *m) 561 { 562 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 563 564 pc_i440fx_2_7_machine_options(m); 565 pcmc->legacy_cpu_hotplug = true; 566 pcmc->linuxboot_dma_enabled = false; 567 compat_props_add(m->compat_props, hw_compat_2_6, hw_compat_2_6_len); 568 compat_props_add(m->compat_props, pc_compat_2_6, pc_compat_2_6_len); 569 } 570 571 DEFINE_I440FX_MACHINE(v2_6, "pc-i440fx-2.6", NULL, 572 pc_i440fx_2_6_machine_options); 573 574 static void pc_i440fx_2_5_machine_options(MachineClass *m) 575 { 576 X86MachineClass *x86mc = X86_MACHINE_CLASS(m); 577 578 pc_i440fx_2_6_machine_options(m); 579 x86mc->save_tsc_khz = false; 580 m->legacy_fw_cfg_order = 1; 581 compat_props_add(m->compat_props, hw_compat_2_5, hw_compat_2_5_len); 582 compat_props_add(m->compat_props, pc_compat_2_5, pc_compat_2_5_len); 583 } 584 585 DEFINE_I440FX_MACHINE(v2_5, "pc-i440fx-2.5", NULL, 586 pc_i440fx_2_5_machine_options); 587 588 static void pc_i440fx_2_4_machine_options(MachineClass *m) 589 { 590 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 591 592 pc_i440fx_2_5_machine_options(m); 593 m->hw_version = "2.4.0"; 594 pcmc->broken_reserved_end = true; 595 compat_props_add(m->compat_props, hw_compat_2_4, hw_compat_2_4_len); 596 compat_props_add(m->compat_props, pc_compat_2_4, pc_compat_2_4_len); 597 } 598 599 DEFINE_I440FX_MACHINE(v2_4, "pc-i440fx-2.4", NULL, 600 pc_i440fx_2_4_machine_options) 601 602 static void pc_i440fx_2_3_machine_options(MachineClass *m) 603 { 604 pc_i440fx_2_4_machine_options(m); 605 m->hw_version = "2.3.0"; 606 compat_props_add(m->compat_props, hw_compat_2_3, hw_compat_2_3_len); 607 compat_props_add(m->compat_props, pc_compat_2_3, pc_compat_2_3_len); 608 } 609 610 DEFINE_I440FX_MACHINE(v2_3, "pc-i440fx-2.3", pc_compat_2_3_fn, 611 pc_i440fx_2_3_machine_options); 612 613 static void pc_i440fx_2_2_machine_options(MachineClass *m) 614 { 615 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 616 617 pc_i440fx_2_3_machine_options(m); 618 m->hw_version = "2.2.0"; 619 m->default_machine_opts = "firmware=bios-256k.bin,suppress-vmdesc=on"; 620 compat_props_add(m->compat_props, hw_compat_2_2, hw_compat_2_2_len); 621 compat_props_add(m->compat_props, pc_compat_2_2, pc_compat_2_2_len); 622 pcmc->rsdp_in_ram = false; 623 } 624 625 DEFINE_I440FX_MACHINE(v2_2, "pc-i440fx-2.2", pc_compat_2_2_fn, 626 pc_i440fx_2_2_machine_options); 627 628 static void pc_i440fx_2_1_machine_options(MachineClass *m) 629 { 630 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 631 632 pc_i440fx_2_2_machine_options(m); 633 m->hw_version = "2.1.0"; 634 m->default_display = NULL; 635 compat_props_add(m->compat_props, hw_compat_2_1, hw_compat_2_1_len); 636 compat_props_add(m->compat_props, pc_compat_2_1, pc_compat_2_1_len); 637 pcmc->smbios_uuid_encoded = false; 638 pcmc->enforce_aligned_dimm = false; 639 } 640 641 DEFINE_I440FX_MACHINE(v2_1, "pc-i440fx-2.1", pc_compat_2_1_fn, 642 pc_i440fx_2_1_machine_options); 643 644 static void pc_i440fx_2_0_machine_options(MachineClass *m) 645 { 646 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 647 648 pc_i440fx_2_1_machine_options(m); 649 m->hw_version = "2.0.0"; 650 compat_props_add(m->compat_props, pc_compat_2_0, pc_compat_2_0_len); 651 pcmc->smbios_legacy_mode = true; 652 pcmc->has_reserved_memory = false; 653 /* This value depends on the actual DSDT and SSDT compiled into 654 * the source QEMU; unfortunately it depends on the binary and 655 * not on the machine type, so we cannot make pc-i440fx-1.7 work on 656 * both QEMU 1.7 and QEMU 2.0. 657 * 658 * Large variations cause migration to fail for more than one 659 * consecutive value of the "-smp" maxcpus option. 660 * 661 * For small variations of the kind caused by different iasl versions, 662 * the 4k rounding usually leaves slack. However, there could be still 663 * one or two values that break. For QEMU 1.7 and QEMU 2.0 the 664 * slack is only ~10 bytes before one "-smp maxcpus" value breaks! 665 * 666 * 6652 is valid for QEMU 2.0, the right value for pc-i440fx-1.7 on 667 * QEMU 1.7 it is 6414. For RHEL/CentOS 7.0 it is 6418. 668 */ 669 pcmc->legacy_acpi_table_size = 6652; 670 pcmc->acpi_data_size = 0x10000; 671 } 672 673 DEFINE_I440FX_MACHINE(v2_0, "pc-i440fx-2.0", pc_compat_2_0_fn, 674 pc_i440fx_2_0_machine_options); 675 676 static void pc_i440fx_1_7_machine_options(MachineClass *m) 677 { 678 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 679 680 pc_i440fx_2_0_machine_options(m); 681 m->hw_version = "1.7.0"; 682 m->default_machine_opts = NULL; 683 m->option_rom_has_mr = true; 684 compat_props_add(m->compat_props, pc_compat_1_7, pc_compat_1_7_len); 685 pcmc->smbios_defaults = false; 686 pcmc->gigabyte_align = false; 687 pcmc->legacy_acpi_table_size = 6414; 688 } 689 690 DEFINE_I440FX_MACHINE(v1_7, "pc-i440fx-1.7", pc_compat_1_7_fn, 691 pc_i440fx_1_7_machine_options); 692 693 static void pc_i440fx_1_6_machine_options(MachineClass *m) 694 { 695 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 696 697 pc_i440fx_1_7_machine_options(m); 698 m->hw_version = "1.6.0"; 699 m->rom_file_has_mr = false; 700 compat_props_add(m->compat_props, pc_compat_1_6, pc_compat_1_6_len); 701 pcmc->has_acpi_build = false; 702 } 703 704 DEFINE_I440FX_MACHINE(v1_6, "pc-i440fx-1.6", pc_compat_1_6_fn, 705 pc_i440fx_1_6_machine_options); 706 707 static void pc_i440fx_1_5_machine_options(MachineClass *m) 708 { 709 pc_i440fx_1_6_machine_options(m); 710 m->hw_version = "1.5.0"; 711 compat_props_add(m->compat_props, pc_compat_1_5, pc_compat_1_5_len); 712 } 713 714 DEFINE_I440FX_MACHINE(v1_5, "pc-i440fx-1.5", pc_compat_1_5_fn, 715 pc_i440fx_1_5_machine_options); 716 717 static void pc_i440fx_1_4_machine_options(MachineClass *m) 718 { 719 pc_i440fx_1_5_machine_options(m); 720 m->hw_version = "1.4.0"; 721 m->hot_add_cpu = NULL; 722 compat_props_add(m->compat_props, pc_compat_1_4, pc_compat_1_4_len); 723 } 724 725 DEFINE_I440FX_MACHINE(v1_4, "pc-i440fx-1.4", pc_compat_1_4_fn, 726 pc_i440fx_1_4_machine_options); 727 728 static void pc_i440fx_1_3_machine_options(MachineClass *m) 729 { 730 X86MachineClass *x86mc = X86_MACHINE_CLASS(m); 731 static GlobalProperty compat[] = { 732 PC_CPU_MODEL_IDS("1.3.0") 733 { "usb-tablet", "usb_version", "1" }, 734 { "virtio-net-pci", "ctrl_mac_addr", "off" }, 735 { "virtio-net-pci", "mq", "off" }, 736 { "e1000", "autonegotiation", "off" }, 737 }; 738 739 pc_i440fx_1_4_machine_options(m); 740 m->hw_version = "1.3.0"; 741 m->deprecation_reason = "use a newer machine type instead"; 742 x86mc->compat_apic_id_mode = true; 743 compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat)); 744 } 745 746 DEFINE_I440FX_MACHINE(v1_3, "pc-1.3", pc_compat_1_3, 747 pc_i440fx_1_3_machine_options); 748 749 750 static void pc_i440fx_1_2_machine_options(MachineClass *m) 751 { 752 static GlobalProperty compat[] = { 753 PC_CPU_MODEL_IDS("1.2.0") 754 { "nec-usb-xhci", "msi", "off" }, 755 { "nec-usb-xhci", "msix", "off" }, 756 { "qxl", "revision", "3" }, 757 { "qxl-vga", "revision", "3" }, 758 { "VGA", "mmio", "off" }, 759 }; 760 761 pc_i440fx_1_3_machine_options(m); 762 m->hw_version = "1.2.0"; 763 compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat)); 764 } 765 766 DEFINE_I440FX_MACHINE(v1_2, "pc-1.2", pc_compat_1_2, 767 pc_i440fx_1_2_machine_options); 768 769 770 static void pc_i440fx_1_1_machine_options(MachineClass *m) 771 { 772 static GlobalProperty compat[] = { 773 PC_CPU_MODEL_IDS("1.1.0") 774 { "virtio-scsi-pci", "hotplug", "off" }, 775 { "virtio-scsi-pci", "param_change", "off" }, 776 { "VGA", "vgamem_mb", "8" }, 777 { "vmware-svga", "vgamem_mb", "8" }, 778 { "qxl-vga", "vgamem_mb", "8" }, 779 { "qxl", "vgamem_mb", "8" }, 780 { "virtio-blk-pci", "config-wce", "off" }, 781 }; 782 783 pc_i440fx_1_2_machine_options(m); 784 m->hw_version = "1.1.0"; 785 compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat)); 786 } 787 788 DEFINE_I440FX_MACHINE(v1_1, "pc-1.1", pc_compat_1_2, 789 pc_i440fx_1_1_machine_options); 790 791 static void pc_i440fx_1_0_machine_options(MachineClass *m) 792 { 793 static GlobalProperty compat[] = { 794 PC_CPU_MODEL_IDS("1.0") 795 { TYPE_ISA_FDC, "check_media_rate", "off" }, 796 { "virtio-balloon-pci", "class", stringify(PCI_CLASS_MEMORY_RAM) }, 797 { "apic-common", "vapic", "off" }, 798 { TYPE_USB_DEVICE, "full-path", "no" }, 799 }; 800 801 pc_i440fx_1_1_machine_options(m); 802 m->hw_version = "1.0"; 803 compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat)); 804 } 805 806 DEFINE_I440FX_MACHINE(v1_0, "pc-1.0", pc_compat_1_2, 807 pc_i440fx_1_0_machine_options); 808 809 810 typedef struct { 811 uint16_t gpu_device_id; 812 uint16_t pch_device_id; 813 uint8_t pch_revision_id; 814 } IGDDeviceIDInfo; 815 816 /* In real world different GPU should have different PCH. But actually 817 * the different PCH DIDs likely map to different PCH SKUs. We do the 818 * same thing for the GPU. For PCH, the different SKUs are going to be 819 * all the same silicon design and implementation, just different 820 * features turn on and off with fuses. The SW interfaces should be 821 * consistent across all SKUs in a given family (eg LPT). But just same 822 * features may not be supported. 823 * 824 * Most of these different PCH features probably don't matter to the 825 * Gfx driver, but obviously any difference in display port connections 826 * will so it should be fine with any PCH in case of passthrough. 827 * 828 * So currently use one PCH version, 0x8c4e, to cover all HSW(Haswell) 829 * scenarios, 0x9cc3 for BDW(Broadwell). 830 */ 831 static const IGDDeviceIDInfo igd_combo_id_infos[] = { 832 /* HSW Classic */ 833 {0x0402, 0x8c4e, 0x04}, /* HSWGT1D, HSWD_w7 */ 834 {0x0406, 0x8c4e, 0x04}, /* HSWGT1M, HSWM_w7 */ 835 {0x0412, 0x8c4e, 0x04}, /* HSWGT2D, HSWD_w7 */ 836 {0x0416, 0x8c4e, 0x04}, /* HSWGT2M, HSWM_w7 */ 837 {0x041E, 0x8c4e, 0x04}, /* HSWGT15D, HSWD_w7 */ 838 /* HSW ULT */ 839 {0x0A06, 0x8c4e, 0x04}, /* HSWGT1UT, HSWM_w7 */ 840 {0x0A16, 0x8c4e, 0x04}, /* HSWGT2UT, HSWM_w7 */ 841 {0x0A26, 0x8c4e, 0x06}, /* HSWGT3UT, HSWM_w7 */ 842 {0x0A2E, 0x8c4e, 0x04}, /* HSWGT3UT28W, HSWM_w7 */ 843 {0x0A1E, 0x8c4e, 0x04}, /* HSWGT2UX, HSWM_w7 */ 844 {0x0A0E, 0x8c4e, 0x04}, /* HSWGT1ULX, HSWM_w7 */ 845 /* HSW CRW */ 846 {0x0D26, 0x8c4e, 0x04}, /* HSWGT3CW, HSWM_w7 */ 847 {0x0D22, 0x8c4e, 0x04}, /* HSWGT3CWDT, HSWD_w7 */ 848 /* HSW Server */ 849 {0x041A, 0x8c4e, 0x04}, /* HSWSVGT2, HSWD_w7 */ 850 /* HSW SRVR */ 851 {0x040A, 0x8c4e, 0x04}, /* HSWSVGT1, HSWD_w7 */ 852 /* BSW */ 853 {0x1606, 0x9cc3, 0x03}, /* BDWULTGT1, BDWM_w7 */ 854 {0x1616, 0x9cc3, 0x03}, /* BDWULTGT2, BDWM_w7 */ 855 {0x1626, 0x9cc3, 0x03}, /* BDWULTGT3, BDWM_w7 */ 856 {0x160E, 0x9cc3, 0x03}, /* BDWULXGT1, BDWM_w7 */ 857 {0x161E, 0x9cc3, 0x03}, /* BDWULXGT2, BDWM_w7 */ 858 {0x1602, 0x9cc3, 0x03}, /* BDWHALOGT1, BDWM_w7 */ 859 {0x1612, 0x9cc3, 0x03}, /* BDWHALOGT2, BDWM_w7 */ 860 {0x1622, 0x9cc3, 0x03}, /* BDWHALOGT3, BDWM_w7 */ 861 {0x162B, 0x9cc3, 0x03}, /* BDWHALO28W, BDWM_w7 */ 862 {0x162A, 0x9cc3, 0x03}, /* BDWGT3WRKS, BDWM_w7 */ 863 {0x162D, 0x9cc3, 0x03}, /* BDWGT3SRVR, BDWM_w7 */ 864 }; 865 866 static void isa_bridge_class_init(ObjectClass *klass, void *data) 867 { 868 DeviceClass *dc = DEVICE_CLASS(klass); 869 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 870 871 dc->desc = "ISA bridge faked to support IGD PT"; 872 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); 873 k->vendor_id = PCI_VENDOR_ID_INTEL; 874 k->class_id = PCI_CLASS_BRIDGE_ISA; 875 }; 876 877 static TypeInfo isa_bridge_info = { 878 .name = "igd-passthrough-isa-bridge", 879 .parent = TYPE_PCI_DEVICE, 880 .instance_size = sizeof(PCIDevice), 881 .class_init = isa_bridge_class_init, 882 .interfaces = (InterfaceInfo[]) { 883 { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 884 { }, 885 }, 886 }; 887 888 static void pt_graphics_register_types(void) 889 { 890 type_register_static(&isa_bridge_info); 891 } 892 type_init(pt_graphics_register_types) 893 894 void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id) 895 { 896 struct PCIDevice *bridge_dev; 897 int i, num; 898 uint16_t pch_dev_id = 0xffff; 899 uint8_t pch_rev_id; 900 901 num = ARRAY_SIZE(igd_combo_id_infos); 902 for (i = 0; i < num; i++) { 903 if (gpu_dev_id == igd_combo_id_infos[i].gpu_device_id) { 904 pch_dev_id = igd_combo_id_infos[i].pch_device_id; 905 pch_rev_id = igd_combo_id_infos[i].pch_revision_id; 906 } 907 } 908 909 if (pch_dev_id == 0xffff) { 910 return; 911 } 912 913 /* Currently IGD drivers always need to access PCH by 1f.0. */ 914 bridge_dev = pci_create_simple(bus, PCI_DEVFN(0x1f, 0), 915 "igd-passthrough-isa-bridge"); 916 917 /* 918 * Note that vendor id is always PCI_VENDOR_ID_INTEL. 919 */ 920 if (!bridge_dev) { 921 fprintf(stderr, "set igd-passthrough-isa-bridge failed!\n"); 922 return; 923 } 924 pci_config_set_device_id(bridge_dev->config, pch_dev_id); 925 pci_config_set_revision(bridge_dev->config, pch_rev_id); 926 } 927 928 static void isapc_machine_options(MachineClass *m) 929 { 930 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 931 m->desc = "ISA-only PC"; 932 m->max_cpus = 1; 933 m->option_rom_has_mr = true; 934 m->rom_file_has_mr = false; 935 pcmc->pci_enabled = false; 936 pcmc->has_acpi_build = false; 937 pcmc->smbios_defaults = false; 938 pcmc->gigabyte_align = false; 939 pcmc->smbios_legacy_mode = true; 940 pcmc->has_reserved_memory = false; 941 pcmc->default_nic_model = "ne2k_isa"; 942 m->default_cpu_type = X86_CPU_TYPE_NAME("486"); 943 } 944 945 DEFINE_PC_MACHINE(isapc, "isapc", pc_init_isa, 946 isapc_machine_options); 947 948 949 #ifdef CONFIG_XEN 950 static void xenfv_machine_options(MachineClass *m) 951 { 952 m->desc = "Xen Fully-virtualized PC"; 953 m->max_cpus = HVM_MAX_VCPUS; 954 m->default_machine_opts = "accel=xen"; 955 } 956 957 DEFINE_PC_MACHINE(xenfv, "xenfv", pc_xen_hvm_init, 958 xenfv_machine_options); 959 #endif 960