1 /* 2 * QEMU PC System Emulator 3 * 4 * Copyright (c) 2003-2004 Fabrice Bellard 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 #include "qemu/osdep.h" 26 #include "qemu/units.h" 27 #include "hw/i386/x86.h" 28 #include "hw/i386/pc.h" 29 #include "hw/char/serial.h" 30 #include "hw/char/parallel.h" 31 #include "hw/i386/apic.h" 32 #include "hw/i386/topology.h" 33 #include "hw/i386/fw_cfg.h" 34 #include "hw/i386/vmport.h" 35 #include "sysemu/cpus.h" 36 #include "hw/block/fdc.h" 37 #include "hw/ide.h" 38 #include "hw/pci/pci.h" 39 #include "hw/pci/pci_bus.h" 40 #include "hw/nvram/fw_cfg.h" 41 #include "hw/timer/hpet.h" 42 #include "hw/firmware/smbios.h" 43 #include "hw/loader.h" 44 #include "elf.h" 45 #include "migration/vmstate.h" 46 #include "multiboot.h" 47 #include "hw/rtc/mc146818rtc.h" 48 #include "hw/intc/i8259.h" 49 #include "hw/dma/i8257.h" 50 #include "hw/timer/i8254.h" 51 #include "hw/input/i8042.h" 52 #include "hw/irq.h" 53 #include "hw/audio/pcspk.h" 54 #include "hw/pci/msi.h" 55 #include "hw/sysbus.h" 56 #include "sysemu/sysemu.h" 57 #include "sysemu/tcg.h" 58 #include "sysemu/numa.h" 59 #include "sysemu/kvm.h" 60 #include "sysemu/xen.h" 61 #include "sysemu/qtest.h" 62 #include "sysemu/reset.h" 63 #include "sysemu/runstate.h" 64 #include "kvm_i386.h" 65 #include "hw/xen/xen.h" 66 #include "hw/xen/start_info.h" 67 #include "ui/qemu-spice.h" 68 #include "exec/memory.h" 69 #include "exec/address-spaces.h" 70 #include "sysemu/arch_init.h" 71 #include "qemu/bitmap.h" 72 #include "qemu/config-file.h" 73 #include "qemu/error-report.h" 74 #include "qemu/option.h" 75 #include "qemu/cutils.h" 76 #include "hw/acpi/acpi.h" 77 #include "hw/acpi/cpu_hotplug.h" 78 #include "hw/boards.h" 79 #include "acpi-build.h" 80 #include "hw/mem/pc-dimm.h" 81 #include "hw/mem/nvdimm.h" 82 #include "qapi/error.h" 83 #include "qapi/qapi-visit-common.h" 84 #include "qapi/visitor.h" 85 #include "hw/core/cpu.h" 86 #include "hw/usb.h" 87 #include "hw/i386/intel_iommu.h" 88 #include "hw/net/ne2000-isa.h" 89 #include "standard-headers/asm-x86/bootparam.h" 90 #include "hw/virtio/virtio-pmem-pci.h" 91 #include "hw/virtio/virtio-mem-pci.h" 92 #include "hw/mem/memory-device.h" 93 #include "sysemu/replay.h" 94 #include "qapi/qmp/qerror.h" 95 #include "e820_memory_layout.h" 96 #include "fw_cfg.h" 97 #include "trace.h" 98 #include CONFIG_DEVICES 99 100 GlobalProperty pc_compat_5_1[] = {}; 101 const size_t pc_compat_5_1_len = G_N_ELEMENTS(pc_compat_5_1); 102 103 GlobalProperty pc_compat_5_0[] = { 104 }; 105 const size_t pc_compat_5_0_len = G_N_ELEMENTS(pc_compat_5_0); 106 107 GlobalProperty pc_compat_4_2[] = { 108 { "mch", "smbase-smram", "off" }, 109 }; 110 const size_t pc_compat_4_2_len = G_N_ELEMENTS(pc_compat_4_2); 111 112 GlobalProperty pc_compat_4_1[] = {}; 113 const size_t pc_compat_4_1_len = G_N_ELEMENTS(pc_compat_4_1); 114 115 GlobalProperty pc_compat_4_0[] = {}; 116 const size_t pc_compat_4_0_len = G_N_ELEMENTS(pc_compat_4_0); 117 118 GlobalProperty pc_compat_3_1[] = { 119 { "intel-iommu", "dma-drain", "off" }, 120 { "Opteron_G3" "-" TYPE_X86_CPU, "rdtscp", "off" }, 121 { "Opteron_G4" "-" TYPE_X86_CPU, "rdtscp", "off" }, 122 { "Opteron_G4" "-" TYPE_X86_CPU, "npt", "off" }, 123 { "Opteron_G4" "-" TYPE_X86_CPU, "nrip-save", "off" }, 124 { "Opteron_G5" "-" TYPE_X86_CPU, "rdtscp", "off" }, 125 { "Opteron_G5" "-" TYPE_X86_CPU, "npt", "off" }, 126 { "Opteron_G5" "-" TYPE_X86_CPU, "nrip-save", "off" }, 127 { "EPYC" "-" TYPE_X86_CPU, "npt", "off" }, 128 { "EPYC" "-" TYPE_X86_CPU, "nrip-save", "off" }, 129 { "EPYC-IBPB" "-" TYPE_X86_CPU, "npt", "off" }, 130 { "EPYC-IBPB" "-" TYPE_X86_CPU, "nrip-save", "off" }, 131 { "Skylake-Client" "-" TYPE_X86_CPU, "mpx", "on" }, 132 { "Skylake-Client-IBRS" "-" TYPE_X86_CPU, "mpx", "on" }, 133 { "Skylake-Server" "-" TYPE_X86_CPU, "mpx", "on" }, 134 { "Skylake-Server-IBRS" "-" TYPE_X86_CPU, "mpx", "on" }, 135 { "Cascadelake-Server" "-" TYPE_X86_CPU, "mpx", "on" }, 136 { "Icelake-Client" "-" TYPE_X86_CPU, "mpx", "on" }, 137 { "Icelake-Server" "-" TYPE_X86_CPU, "mpx", "on" }, 138 { "Cascadelake-Server" "-" TYPE_X86_CPU, "stepping", "5" }, 139 { TYPE_X86_CPU, "x-intel-pt-auto-level", "off" }, 140 }; 141 const size_t pc_compat_3_1_len = G_N_ELEMENTS(pc_compat_3_1); 142 143 GlobalProperty pc_compat_3_0[] = { 144 { TYPE_X86_CPU, "x-hv-synic-kvm-only", "on" }, 145 { "Skylake-Server" "-" TYPE_X86_CPU, "pku", "off" }, 146 { "Skylake-Server-IBRS" "-" TYPE_X86_CPU, "pku", "off" }, 147 }; 148 const size_t pc_compat_3_0_len = G_N_ELEMENTS(pc_compat_3_0); 149 150 GlobalProperty pc_compat_2_12[] = { 151 { TYPE_X86_CPU, "legacy-cache", "on" }, 152 { TYPE_X86_CPU, "topoext", "off" }, 153 { "EPYC-" TYPE_X86_CPU, "xlevel", "0x8000000a" }, 154 { "EPYC-IBPB-" TYPE_X86_CPU, "xlevel", "0x8000000a" }, 155 }; 156 const size_t pc_compat_2_12_len = G_N_ELEMENTS(pc_compat_2_12); 157 158 GlobalProperty pc_compat_2_11[] = { 159 { TYPE_X86_CPU, "x-migrate-smi-count", "off" }, 160 { "Skylake-Server" "-" TYPE_X86_CPU, "clflushopt", "off" }, 161 }; 162 const size_t pc_compat_2_11_len = G_N_ELEMENTS(pc_compat_2_11); 163 164 GlobalProperty pc_compat_2_10[] = { 165 { TYPE_X86_CPU, "x-hv-max-vps", "0x40" }, 166 { "i440FX-pcihost", "x-pci-hole64-fix", "off" }, 167 { "q35-pcihost", "x-pci-hole64-fix", "off" }, 168 }; 169 const size_t pc_compat_2_10_len = G_N_ELEMENTS(pc_compat_2_10); 170 171 GlobalProperty pc_compat_2_9[] = { 172 { "mch", "extended-tseg-mbytes", "0" }, 173 }; 174 const size_t pc_compat_2_9_len = G_N_ELEMENTS(pc_compat_2_9); 175 176 GlobalProperty pc_compat_2_8[] = { 177 { TYPE_X86_CPU, "tcg-cpuid", "off" }, 178 { "kvmclock", "x-mach-use-reliable-get-clock", "off" }, 179 { "ICH9-LPC", "x-smi-broadcast", "off" }, 180 { TYPE_X86_CPU, "vmware-cpuid-freq", "off" }, 181 { "Haswell-" TYPE_X86_CPU, "stepping", "1" }, 182 }; 183 const size_t pc_compat_2_8_len = G_N_ELEMENTS(pc_compat_2_8); 184 185 GlobalProperty pc_compat_2_7[] = { 186 { TYPE_X86_CPU, "l3-cache", "off" }, 187 { TYPE_X86_CPU, "full-cpuid-auto-level", "off" }, 188 { "Opteron_G3" "-" TYPE_X86_CPU, "family", "15" }, 189 { "Opteron_G3" "-" TYPE_X86_CPU, "model", "6" }, 190 { "Opteron_G3" "-" TYPE_X86_CPU, "stepping", "1" }, 191 { "isa-pcspk", "migrate", "off" }, 192 }; 193 const size_t pc_compat_2_7_len = G_N_ELEMENTS(pc_compat_2_7); 194 195 GlobalProperty pc_compat_2_6[] = { 196 { TYPE_X86_CPU, "cpuid-0xb", "off" }, 197 { "vmxnet3", "romfile", "" }, 198 { TYPE_X86_CPU, "fill-mtrr-mask", "off" }, 199 { "apic-common", "legacy-instance-id", "on", } 200 }; 201 const size_t pc_compat_2_6_len = G_N_ELEMENTS(pc_compat_2_6); 202 203 GlobalProperty pc_compat_2_5[] = {}; 204 const size_t pc_compat_2_5_len = G_N_ELEMENTS(pc_compat_2_5); 205 206 GlobalProperty pc_compat_2_4[] = { 207 PC_CPU_MODEL_IDS("2.4.0") 208 { "Haswell-" TYPE_X86_CPU, "abm", "off" }, 209 { "Haswell-noTSX-" TYPE_X86_CPU, "abm", "off" }, 210 { "Broadwell-" TYPE_X86_CPU, "abm", "off" }, 211 { "Broadwell-noTSX-" TYPE_X86_CPU, "abm", "off" }, 212 { "host" "-" TYPE_X86_CPU, "host-cache-info", "on" }, 213 { TYPE_X86_CPU, "check", "off" }, 214 { "qemu64" "-" TYPE_X86_CPU, "sse4a", "on" }, 215 { "qemu64" "-" TYPE_X86_CPU, "abm", "on" }, 216 { "qemu64" "-" TYPE_X86_CPU, "popcnt", "on" }, 217 { "qemu32" "-" TYPE_X86_CPU, "popcnt", "on" }, 218 { "Opteron_G2" "-" TYPE_X86_CPU, "rdtscp", "on" }, 219 { "Opteron_G3" "-" TYPE_X86_CPU, "rdtscp", "on" }, 220 { "Opteron_G4" "-" TYPE_X86_CPU, "rdtscp", "on" }, 221 { "Opteron_G5" "-" TYPE_X86_CPU, "rdtscp", "on", } 222 }; 223 const size_t pc_compat_2_4_len = G_N_ELEMENTS(pc_compat_2_4); 224 225 GlobalProperty pc_compat_2_3[] = { 226 PC_CPU_MODEL_IDS("2.3.0") 227 { TYPE_X86_CPU, "arat", "off" }, 228 { "qemu64" "-" TYPE_X86_CPU, "min-level", "4" }, 229 { "kvm64" "-" TYPE_X86_CPU, "min-level", "5" }, 230 { "pentium3" "-" TYPE_X86_CPU, "min-level", "2" }, 231 { "n270" "-" TYPE_X86_CPU, "min-level", "5" }, 232 { "Conroe" "-" TYPE_X86_CPU, "min-level", "4" }, 233 { "Penryn" "-" TYPE_X86_CPU, "min-level", "4" }, 234 { "Nehalem" "-" TYPE_X86_CPU, "min-level", "4" }, 235 { "n270" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, 236 { "Penryn" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, 237 { "Conroe" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, 238 { "Nehalem" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, 239 { "Westmere" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, 240 { "SandyBridge" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, 241 { "IvyBridge" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, 242 { "Haswell" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, 243 { "Haswell-noTSX" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, 244 { "Broadwell" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, 245 { "Broadwell-noTSX" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, 246 { TYPE_X86_CPU, "kvm-no-smi-migration", "on" }, 247 }; 248 const size_t pc_compat_2_3_len = G_N_ELEMENTS(pc_compat_2_3); 249 250 GlobalProperty pc_compat_2_2[] = { 251 PC_CPU_MODEL_IDS("2.2.0") 252 { "kvm64" "-" TYPE_X86_CPU, "vme", "off" }, 253 { "kvm32" "-" TYPE_X86_CPU, "vme", "off" }, 254 { "Conroe" "-" TYPE_X86_CPU, "vme", "off" }, 255 { "Penryn" "-" TYPE_X86_CPU, "vme", "off" }, 256 { "Nehalem" "-" TYPE_X86_CPU, "vme", "off" }, 257 { "Westmere" "-" TYPE_X86_CPU, "vme", "off" }, 258 { "SandyBridge" "-" TYPE_X86_CPU, "vme", "off" }, 259 { "Haswell" "-" TYPE_X86_CPU, "vme", "off" }, 260 { "Broadwell" "-" TYPE_X86_CPU, "vme", "off" }, 261 { "Opteron_G1" "-" TYPE_X86_CPU, "vme", "off" }, 262 { "Opteron_G2" "-" TYPE_X86_CPU, "vme", "off" }, 263 { "Opteron_G3" "-" TYPE_X86_CPU, "vme", "off" }, 264 { "Opteron_G4" "-" TYPE_X86_CPU, "vme", "off" }, 265 { "Opteron_G5" "-" TYPE_X86_CPU, "vme", "off" }, 266 { "Haswell" "-" TYPE_X86_CPU, "f16c", "off" }, 267 { "Haswell" "-" TYPE_X86_CPU, "rdrand", "off" }, 268 { "Broadwell" "-" TYPE_X86_CPU, "f16c", "off" }, 269 { "Broadwell" "-" TYPE_X86_CPU, "rdrand", "off" }, 270 }; 271 const size_t pc_compat_2_2_len = G_N_ELEMENTS(pc_compat_2_2); 272 273 GlobalProperty pc_compat_2_1[] = { 274 PC_CPU_MODEL_IDS("2.1.0") 275 { "coreduo" "-" TYPE_X86_CPU, "vmx", "on" }, 276 { "core2duo" "-" TYPE_X86_CPU, "vmx", "on" }, 277 }; 278 const size_t pc_compat_2_1_len = G_N_ELEMENTS(pc_compat_2_1); 279 280 GlobalProperty pc_compat_2_0[] = { 281 PC_CPU_MODEL_IDS("2.0.0") 282 { "virtio-scsi-pci", "any_layout", "off" }, 283 { "PIIX4_PM", "memory-hotplug-support", "off" }, 284 { "apic", "version", "0x11" }, 285 { "nec-usb-xhci", "superspeed-ports-first", "off" }, 286 { "nec-usb-xhci", "force-pcie-endcap", "on" }, 287 { "pci-serial", "prog_if", "0" }, 288 { "pci-serial-2x", "prog_if", "0" }, 289 { "pci-serial-4x", "prog_if", "0" }, 290 { "virtio-net-pci", "guest_announce", "off" }, 291 { "ICH9-LPC", "memory-hotplug-support", "off" }, 292 { "xio3130-downstream", COMPAT_PROP_PCP, "off" }, 293 { "ioh3420", COMPAT_PROP_PCP, "off" }, 294 }; 295 const size_t pc_compat_2_0_len = G_N_ELEMENTS(pc_compat_2_0); 296 297 GlobalProperty pc_compat_1_7[] = { 298 PC_CPU_MODEL_IDS("1.7.0") 299 { TYPE_USB_DEVICE, "msos-desc", "no" }, 300 { "PIIX4_PM", "acpi-pci-hotplug-with-bridge-support", "off" }, 301 { "hpet", HPET_INTCAP, "4" }, 302 }; 303 const size_t pc_compat_1_7_len = G_N_ELEMENTS(pc_compat_1_7); 304 305 GlobalProperty pc_compat_1_6[] = { 306 PC_CPU_MODEL_IDS("1.6.0") 307 { "e1000", "mitigation", "off" }, 308 { "qemu64-" TYPE_X86_CPU, "model", "2" }, 309 { "qemu32-" TYPE_X86_CPU, "model", "3" }, 310 { "i440FX-pcihost", "short_root_bus", "1" }, 311 { "q35-pcihost", "short_root_bus", "1" }, 312 }; 313 const size_t pc_compat_1_6_len = G_N_ELEMENTS(pc_compat_1_6); 314 315 GlobalProperty pc_compat_1_5[] = { 316 PC_CPU_MODEL_IDS("1.5.0") 317 { "Conroe-" TYPE_X86_CPU, "model", "2" }, 318 { "Conroe-" TYPE_X86_CPU, "min-level", "2" }, 319 { "Penryn-" TYPE_X86_CPU, "model", "2" }, 320 { "Penryn-" TYPE_X86_CPU, "min-level", "2" }, 321 { "Nehalem-" TYPE_X86_CPU, "model", "2" }, 322 { "Nehalem-" TYPE_X86_CPU, "min-level", "2" }, 323 { "virtio-net-pci", "any_layout", "off" }, 324 { TYPE_X86_CPU, "pmu", "on" }, 325 { "i440FX-pcihost", "short_root_bus", "0" }, 326 { "q35-pcihost", "short_root_bus", "0" }, 327 }; 328 const size_t pc_compat_1_5_len = G_N_ELEMENTS(pc_compat_1_5); 329 330 GlobalProperty pc_compat_1_4[] = { 331 PC_CPU_MODEL_IDS("1.4.0") 332 { "scsi-hd", "discard_granularity", "0" }, 333 { "scsi-cd", "discard_granularity", "0" }, 334 { "scsi-disk", "discard_granularity", "0" }, 335 { "ide-hd", "discard_granularity", "0" }, 336 { "ide-cd", "discard_granularity", "0" }, 337 { "ide-drive", "discard_granularity", "0" }, 338 { "virtio-blk-pci", "discard_granularity", "0" }, 339 /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string: */ 340 { "virtio-serial-pci", "vectors", "0xFFFFFFFF" }, 341 { "virtio-net-pci", "ctrl_guest_offloads", "off" }, 342 { "e1000", "romfile", "pxe-e1000.rom" }, 343 { "ne2k_pci", "romfile", "pxe-ne2k_pci.rom" }, 344 { "pcnet", "romfile", "pxe-pcnet.rom" }, 345 { "rtl8139", "romfile", "pxe-rtl8139.rom" }, 346 { "virtio-net-pci", "romfile", "pxe-virtio.rom" }, 347 { "486-" TYPE_X86_CPU, "model", "0" }, 348 { "n270" "-" TYPE_X86_CPU, "movbe", "off" }, 349 { "Westmere" "-" TYPE_X86_CPU, "pclmulqdq", "off" }, 350 }; 351 const size_t pc_compat_1_4_len = G_N_ELEMENTS(pc_compat_1_4); 352 353 GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled) 354 { 355 GSIState *s; 356 357 s = g_new0(GSIState, 1); 358 if (kvm_ioapic_in_kernel()) { 359 kvm_pc_setup_irq_routing(pci_enabled); 360 } 361 *irqs = qemu_allocate_irqs(gsi_handler, s, GSI_NUM_PINS); 362 363 return s; 364 } 365 366 static void ioport80_write(void *opaque, hwaddr addr, uint64_t data, 367 unsigned size) 368 { 369 } 370 371 static uint64_t ioport80_read(void *opaque, hwaddr addr, unsigned size) 372 { 373 return 0xffffffffffffffffULL; 374 } 375 376 /* MSDOS compatibility mode FPU exception support */ 377 static void ioportF0_write(void *opaque, hwaddr addr, uint64_t data, 378 unsigned size) 379 { 380 if (tcg_enabled()) { 381 cpu_set_ignne(); 382 } 383 } 384 385 static uint64_t ioportF0_read(void *opaque, hwaddr addr, unsigned size) 386 { 387 return 0xffffffffffffffffULL; 388 } 389 390 /* PC cmos mappings */ 391 392 #define REG_EQUIPMENT_BYTE 0x14 393 394 static void cmos_init_hd(ISADevice *s, int type_ofs, int info_ofs, 395 int16_t cylinders, int8_t heads, int8_t sectors) 396 { 397 rtc_set_memory(s, type_ofs, 47); 398 rtc_set_memory(s, info_ofs, cylinders); 399 rtc_set_memory(s, info_ofs + 1, cylinders >> 8); 400 rtc_set_memory(s, info_ofs + 2, heads); 401 rtc_set_memory(s, info_ofs + 3, 0xff); 402 rtc_set_memory(s, info_ofs + 4, 0xff); 403 rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3)); 404 rtc_set_memory(s, info_ofs + 6, cylinders); 405 rtc_set_memory(s, info_ofs + 7, cylinders >> 8); 406 rtc_set_memory(s, info_ofs + 8, sectors); 407 } 408 409 /* convert boot_device letter to something recognizable by the bios */ 410 static int boot_device2nibble(char boot_device) 411 { 412 switch(boot_device) { 413 case 'a': 414 case 'b': 415 return 0x01; /* floppy boot */ 416 case 'c': 417 return 0x02; /* hard drive boot */ 418 case 'd': 419 return 0x03; /* CD-ROM boot */ 420 case 'n': 421 return 0x04; /* Network boot */ 422 } 423 return 0; 424 } 425 426 static void set_boot_dev(ISADevice *s, const char *boot_device, Error **errp) 427 { 428 #define PC_MAX_BOOT_DEVICES 3 429 int nbds, bds[3] = { 0, }; 430 int i; 431 432 nbds = strlen(boot_device); 433 if (nbds > PC_MAX_BOOT_DEVICES) { 434 error_setg(errp, "Too many boot devices for PC"); 435 return; 436 } 437 for (i = 0; i < nbds; i++) { 438 bds[i] = boot_device2nibble(boot_device[i]); 439 if (bds[i] == 0) { 440 error_setg(errp, "Invalid boot device for PC: '%c'", 441 boot_device[i]); 442 return; 443 } 444 } 445 rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]); 446 rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ? 0x0 : 0x1)); 447 } 448 449 static void pc_boot_set(void *opaque, const char *boot_device, Error **errp) 450 { 451 set_boot_dev(opaque, boot_device, errp); 452 } 453 454 static void pc_cmos_init_floppy(ISADevice *rtc_state, ISADevice *floppy) 455 { 456 int val, nb, i; 457 FloppyDriveType fd_type[2] = { FLOPPY_DRIVE_TYPE_NONE, 458 FLOPPY_DRIVE_TYPE_NONE }; 459 460 /* floppy type */ 461 if (floppy) { 462 for (i = 0; i < 2; i++) { 463 fd_type[i] = isa_fdc_get_drive_type(floppy, i); 464 } 465 } 466 val = (cmos_get_fd_drive_type(fd_type[0]) << 4) | 467 cmos_get_fd_drive_type(fd_type[1]); 468 rtc_set_memory(rtc_state, 0x10, val); 469 470 val = rtc_get_memory(rtc_state, REG_EQUIPMENT_BYTE); 471 nb = 0; 472 if (fd_type[0] != FLOPPY_DRIVE_TYPE_NONE) { 473 nb++; 474 } 475 if (fd_type[1] != FLOPPY_DRIVE_TYPE_NONE) { 476 nb++; 477 } 478 switch (nb) { 479 case 0: 480 break; 481 case 1: 482 val |= 0x01; /* 1 drive, ready for boot */ 483 break; 484 case 2: 485 val |= 0x41; /* 2 drives, ready for boot */ 486 break; 487 } 488 rtc_set_memory(rtc_state, REG_EQUIPMENT_BYTE, val); 489 } 490 491 typedef struct pc_cmos_init_late_arg { 492 ISADevice *rtc_state; 493 BusState *idebus[2]; 494 } pc_cmos_init_late_arg; 495 496 typedef struct check_fdc_state { 497 ISADevice *floppy; 498 bool multiple; 499 } CheckFdcState; 500 501 static int check_fdc(Object *obj, void *opaque) 502 { 503 CheckFdcState *state = opaque; 504 Object *fdc; 505 uint32_t iobase; 506 Error *local_err = NULL; 507 508 fdc = object_dynamic_cast(obj, TYPE_ISA_FDC); 509 if (!fdc) { 510 return 0; 511 } 512 513 iobase = object_property_get_uint(obj, "iobase", &local_err); 514 if (local_err || iobase != 0x3f0) { 515 error_free(local_err); 516 return 0; 517 } 518 519 if (state->floppy) { 520 state->multiple = true; 521 } else { 522 state->floppy = ISA_DEVICE(obj); 523 } 524 return 0; 525 } 526 527 static const char * const fdc_container_path[] = { 528 "/unattached", "/peripheral", "/peripheral-anon" 529 }; 530 531 /* 532 * Locate the FDC at IO address 0x3f0, in order to configure the CMOS registers 533 * and ACPI objects. 534 */ 535 ISADevice *pc_find_fdc0(void) 536 { 537 int i; 538 Object *container; 539 CheckFdcState state = { 0 }; 540 541 for (i = 0; i < ARRAY_SIZE(fdc_container_path); i++) { 542 container = container_get(qdev_get_machine(), fdc_container_path[i]); 543 object_child_foreach(container, check_fdc, &state); 544 } 545 546 if (state.multiple) { 547 warn_report("multiple floppy disk controllers with " 548 "iobase=0x3f0 have been found"); 549 error_printf("the one being picked for CMOS setup might not reflect " 550 "your intent"); 551 } 552 553 return state.floppy; 554 } 555 556 static void pc_cmos_init_late(void *opaque) 557 { 558 pc_cmos_init_late_arg *arg = opaque; 559 ISADevice *s = arg->rtc_state; 560 int16_t cylinders; 561 int8_t heads, sectors; 562 int val; 563 int i, trans; 564 565 val = 0; 566 if (arg->idebus[0] && ide_get_geometry(arg->idebus[0], 0, 567 &cylinders, &heads, §ors) >= 0) { 568 cmos_init_hd(s, 0x19, 0x1b, cylinders, heads, sectors); 569 val |= 0xf0; 570 } 571 if (arg->idebus[0] && ide_get_geometry(arg->idebus[0], 1, 572 &cylinders, &heads, §ors) >= 0) { 573 cmos_init_hd(s, 0x1a, 0x24, cylinders, heads, sectors); 574 val |= 0x0f; 575 } 576 rtc_set_memory(s, 0x12, val); 577 578 val = 0; 579 for (i = 0; i < 4; i++) { 580 /* NOTE: ide_get_geometry() returns the physical 581 geometry. It is always such that: 1 <= sects <= 63, 1 582 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS 583 geometry can be different if a translation is done. */ 584 if (arg->idebus[i / 2] && 585 ide_get_geometry(arg->idebus[i / 2], i % 2, 586 &cylinders, &heads, §ors) >= 0) { 587 trans = ide_get_bios_chs_trans(arg->idebus[i / 2], i % 2) - 1; 588 assert((trans & ~3) == 0); 589 val |= trans << (i * 2); 590 } 591 } 592 rtc_set_memory(s, 0x39, val); 593 594 pc_cmos_init_floppy(s, pc_find_fdc0()); 595 596 qemu_unregister_reset(pc_cmos_init_late, opaque); 597 } 598 599 void pc_cmos_init(PCMachineState *pcms, 600 BusState *idebus0, BusState *idebus1, 601 ISADevice *s) 602 { 603 int val; 604 static pc_cmos_init_late_arg arg; 605 X86MachineState *x86ms = X86_MACHINE(pcms); 606 607 /* various important CMOS locations needed by PC/Bochs bios */ 608 609 /* memory size */ 610 /* base memory (first MiB) */ 611 val = MIN(x86ms->below_4g_mem_size / KiB, 640); 612 rtc_set_memory(s, 0x15, val); 613 rtc_set_memory(s, 0x16, val >> 8); 614 /* extended memory (next 64MiB) */ 615 if (x86ms->below_4g_mem_size > 1 * MiB) { 616 val = (x86ms->below_4g_mem_size - 1 * MiB) / KiB; 617 } else { 618 val = 0; 619 } 620 if (val > 65535) 621 val = 65535; 622 rtc_set_memory(s, 0x17, val); 623 rtc_set_memory(s, 0x18, val >> 8); 624 rtc_set_memory(s, 0x30, val); 625 rtc_set_memory(s, 0x31, val >> 8); 626 /* memory between 16MiB and 4GiB */ 627 if (x86ms->below_4g_mem_size > 16 * MiB) { 628 val = (x86ms->below_4g_mem_size - 16 * MiB) / (64 * KiB); 629 } else { 630 val = 0; 631 } 632 if (val > 65535) 633 val = 65535; 634 rtc_set_memory(s, 0x34, val); 635 rtc_set_memory(s, 0x35, val >> 8); 636 /* memory above 4GiB */ 637 val = x86ms->above_4g_mem_size / 65536; 638 rtc_set_memory(s, 0x5b, val); 639 rtc_set_memory(s, 0x5c, val >> 8); 640 rtc_set_memory(s, 0x5d, val >> 16); 641 642 object_property_add_link(OBJECT(pcms), "rtc_state", 643 TYPE_ISA_DEVICE, 644 (Object **)&x86ms->rtc, 645 object_property_allow_set_link, 646 OBJ_PROP_LINK_STRONG); 647 object_property_set_link(OBJECT(pcms), "rtc_state", OBJECT(s), 648 &error_abort); 649 650 set_boot_dev(s, MACHINE(pcms)->boot_order, &error_fatal); 651 652 val = 0; 653 val |= 0x02; /* FPU is there */ 654 val |= 0x04; /* PS/2 mouse installed */ 655 rtc_set_memory(s, REG_EQUIPMENT_BYTE, val); 656 657 /* hard drives and FDC */ 658 arg.rtc_state = s; 659 arg.idebus[0] = idebus0; 660 arg.idebus[1] = idebus1; 661 qemu_register_reset(pc_cmos_init_late, &arg); 662 } 663 664 static void handle_a20_line_change(void *opaque, int irq, int level) 665 { 666 X86CPU *cpu = opaque; 667 668 /* XXX: send to all CPUs ? */ 669 /* XXX: add logic to handle multiple A20 line sources */ 670 x86_cpu_set_a20(cpu, level); 671 } 672 673 #define NE2000_NB_MAX 6 674 675 static const int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 676 0x280, 0x380 }; 677 static const int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 }; 678 679 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd) 680 { 681 static int nb_ne2k = 0; 682 683 if (nb_ne2k == NE2000_NB_MAX) 684 return; 685 isa_ne2000_init(bus, ne2000_io[nb_ne2k], 686 ne2000_irq[nb_ne2k], nd); 687 nb_ne2k++; 688 } 689 690 void pc_acpi_smi_interrupt(void *opaque, int irq, int level) 691 { 692 X86CPU *cpu = opaque; 693 694 if (level) { 695 cpu_interrupt(CPU(cpu), CPU_INTERRUPT_SMI); 696 } 697 } 698 699 /* 700 * This function is very similar to smp_parse() 701 * in hw/core/machine.c but includes CPU die support. 702 */ 703 void pc_smp_parse(MachineState *ms, QemuOpts *opts) 704 { 705 X86MachineState *x86ms = X86_MACHINE(ms); 706 707 if (opts) { 708 unsigned cpus = qemu_opt_get_number(opts, "cpus", 0); 709 unsigned sockets = qemu_opt_get_number(opts, "sockets", 0); 710 unsigned dies = qemu_opt_get_number(opts, "dies", 1); 711 unsigned cores = qemu_opt_get_number(opts, "cores", 0); 712 unsigned threads = qemu_opt_get_number(opts, "threads", 0); 713 714 /* compute missing values, prefer sockets over cores over threads */ 715 if (cpus == 0 || sockets == 0) { 716 cores = cores > 0 ? cores : 1; 717 threads = threads > 0 ? threads : 1; 718 if (cpus == 0) { 719 sockets = sockets > 0 ? sockets : 1; 720 cpus = cores * threads * dies * sockets; 721 } else { 722 ms->smp.max_cpus = 723 qemu_opt_get_number(opts, "maxcpus", cpus); 724 sockets = ms->smp.max_cpus / (cores * threads * dies); 725 } 726 } else if (cores == 0) { 727 threads = threads > 0 ? threads : 1; 728 cores = cpus / (sockets * dies * threads); 729 cores = cores > 0 ? cores : 1; 730 } else if (threads == 0) { 731 threads = cpus / (cores * dies * sockets); 732 threads = threads > 0 ? threads : 1; 733 } else if (sockets * dies * cores * threads < cpus) { 734 error_report("cpu topology: " 735 "sockets (%u) * dies (%u) * cores (%u) * threads (%u) < " 736 "smp_cpus (%u)", 737 sockets, dies, cores, threads, cpus); 738 exit(1); 739 } 740 741 ms->smp.max_cpus = 742 qemu_opt_get_number(opts, "maxcpus", cpus); 743 744 if (ms->smp.max_cpus < cpus) { 745 error_report("maxcpus must be equal to or greater than smp"); 746 exit(1); 747 } 748 749 if (sockets * dies * cores * threads > ms->smp.max_cpus) { 750 error_report("cpu topology: " 751 "sockets (%u) * dies (%u) * cores (%u) * threads (%u) > " 752 "maxcpus (%u)", 753 sockets, dies, cores, threads, 754 ms->smp.max_cpus); 755 exit(1); 756 } 757 758 if (sockets * dies * cores * threads != ms->smp.max_cpus) { 759 warn_report("Invalid CPU topology deprecated: " 760 "sockets (%u) * dies (%u) * cores (%u) * threads (%u) " 761 "!= maxcpus (%u)", 762 sockets, dies, cores, threads, 763 ms->smp.max_cpus); 764 } 765 766 ms->smp.cpus = cpus; 767 ms->smp.cores = cores; 768 ms->smp.threads = threads; 769 ms->smp.sockets = sockets; 770 x86ms->smp_dies = dies; 771 } 772 773 if (ms->smp.cpus > 1) { 774 Error *blocker = NULL; 775 error_setg(&blocker, QERR_REPLAY_NOT_SUPPORTED, "smp"); 776 replay_add_blocker(blocker); 777 } 778 } 779 780 void pc_hot_add_cpu(MachineState *ms, const int64_t id, Error **errp) 781 { 782 X86MachineState *x86ms = X86_MACHINE(ms); 783 int64_t apic_id = x86_cpu_apic_id_from_index(x86ms, id); 784 Error *local_err = NULL; 785 786 if (id < 0) { 787 error_setg(errp, "Invalid CPU id: %" PRIi64, id); 788 return; 789 } 790 791 if (apic_id >= ACPI_CPU_HOTPLUG_ID_LIMIT) { 792 error_setg(errp, "Unable to add CPU: %" PRIi64 793 ", resulting APIC ID (%" PRIi64 ") is too large", 794 id, apic_id); 795 return; 796 } 797 798 799 x86_cpu_new(X86_MACHINE(ms), apic_id, &local_err); 800 if (local_err) { 801 error_propagate(errp, local_err); 802 return; 803 } 804 } 805 806 static void rtc_set_cpus_count(ISADevice *rtc, uint16_t cpus_count) 807 { 808 if (cpus_count > 0xff) { 809 /* If the number of CPUs can't be represented in 8 bits, the 810 * BIOS must use "FW_CFG_NB_CPUS". Set RTC field to 0 just 811 * to make old BIOSes fail more predictably. 812 */ 813 rtc_set_memory(rtc, 0x5f, 0); 814 } else { 815 rtc_set_memory(rtc, 0x5f, cpus_count - 1); 816 } 817 } 818 819 static 820 void pc_machine_done(Notifier *notifier, void *data) 821 { 822 PCMachineState *pcms = container_of(notifier, 823 PCMachineState, machine_done); 824 X86MachineState *x86ms = X86_MACHINE(pcms); 825 PCIBus *bus = pcms->bus; 826 827 /* set the number of CPUs */ 828 rtc_set_cpus_count(x86ms->rtc, x86ms->boot_cpus); 829 830 if (bus) { 831 int extra_hosts = 0; 832 833 QLIST_FOREACH(bus, &bus->child, sibling) { 834 /* look for expander root buses */ 835 if (pci_bus_is_root(bus)) { 836 extra_hosts++; 837 } 838 } 839 if (extra_hosts && x86ms->fw_cfg) { 840 uint64_t *val = g_malloc(sizeof(*val)); 841 *val = cpu_to_le64(extra_hosts); 842 fw_cfg_add_file(x86ms->fw_cfg, 843 "etc/extra-pci-roots", val, sizeof(*val)); 844 } 845 } 846 847 acpi_setup(); 848 if (x86ms->fw_cfg) { 849 fw_cfg_build_smbios(MACHINE(pcms), x86ms->fw_cfg); 850 fw_cfg_build_feature_control(MACHINE(pcms), x86ms->fw_cfg); 851 /* update FW_CFG_NB_CPUS to account for -device added CPUs */ 852 fw_cfg_modify_i16(x86ms->fw_cfg, FW_CFG_NB_CPUS, x86ms->boot_cpus); 853 } 854 855 if (x86ms->apic_id_limit > 255 && !xen_enabled()) { 856 IntelIOMMUState *iommu = INTEL_IOMMU_DEVICE(x86_iommu_get_default()); 857 858 if (!iommu || !x86_iommu_ir_supported(X86_IOMMU_DEVICE(iommu)) || 859 iommu->intr_eim != ON_OFF_AUTO_ON) { 860 error_report("current -smp configuration requires " 861 "Extended Interrupt Mode enabled. " 862 "You can add an IOMMU using: " 863 "-device intel-iommu,intremap=on,eim=on"); 864 exit(EXIT_FAILURE); 865 } 866 } 867 } 868 869 void pc_guest_info_init(PCMachineState *pcms) 870 { 871 int i; 872 MachineState *ms = MACHINE(pcms); 873 X86MachineState *x86ms = X86_MACHINE(pcms); 874 875 x86ms->apic_xrupt_override = kvm_allows_irq0_override(); 876 pcms->numa_nodes = ms->numa_state->num_nodes; 877 pcms->node_mem = g_malloc0(pcms->numa_nodes * 878 sizeof *pcms->node_mem); 879 for (i = 0; i < ms->numa_state->num_nodes; i++) { 880 pcms->node_mem[i] = ms->numa_state->nodes[i].node_mem; 881 } 882 883 pcms->machine_done.notify = pc_machine_done; 884 qemu_add_machine_init_done_notifier(&pcms->machine_done); 885 } 886 887 /* setup pci memory address space mapping into system address space */ 888 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory, 889 MemoryRegion *pci_address_space) 890 { 891 /* Set to lower priority than RAM */ 892 memory_region_add_subregion_overlap(system_memory, 0x0, 893 pci_address_space, -1); 894 } 895 896 void xen_load_linux(PCMachineState *pcms) 897 { 898 int i; 899 FWCfgState *fw_cfg; 900 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); 901 X86MachineState *x86ms = X86_MACHINE(pcms); 902 903 assert(MACHINE(pcms)->kernel_filename != NULL); 904 905 fw_cfg = fw_cfg_init_io(FW_CFG_IO_BASE); 906 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, x86ms->boot_cpus); 907 rom_set_fw(fw_cfg); 908 909 x86_load_linux(x86ms, fw_cfg, pcmc->acpi_data_size, 910 pcmc->pvh_enabled, pcmc->linuxboot_dma_enabled); 911 for (i = 0; i < nb_option_roms; i++) { 912 assert(!strcmp(option_rom[i].name, "linuxboot.bin") || 913 !strcmp(option_rom[i].name, "linuxboot_dma.bin") || 914 !strcmp(option_rom[i].name, "pvh.bin") || 915 !strcmp(option_rom[i].name, "multiboot.bin")); 916 rom_add_option(option_rom[i].name, option_rom[i].bootindex); 917 } 918 x86ms->fw_cfg = fw_cfg; 919 } 920 921 void pc_memory_init(PCMachineState *pcms, 922 MemoryRegion *system_memory, 923 MemoryRegion *rom_memory, 924 MemoryRegion **ram_memory) 925 { 926 int linux_boot, i; 927 MemoryRegion *option_rom_mr; 928 MemoryRegion *ram_below_4g, *ram_above_4g; 929 FWCfgState *fw_cfg; 930 MachineState *machine = MACHINE(pcms); 931 MachineClass *mc = MACHINE_GET_CLASS(machine); 932 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); 933 X86MachineState *x86ms = X86_MACHINE(pcms); 934 935 assert(machine->ram_size == x86ms->below_4g_mem_size + 936 x86ms->above_4g_mem_size); 937 938 linux_boot = (machine->kernel_filename != NULL); 939 940 /* 941 * Split single memory region and use aliases to address portions of it, 942 * done for backwards compatibility with older qemus. 943 */ 944 *ram_memory = machine->ram; 945 ram_below_4g = g_malloc(sizeof(*ram_below_4g)); 946 memory_region_init_alias(ram_below_4g, NULL, "ram-below-4g", machine->ram, 947 0, x86ms->below_4g_mem_size); 948 memory_region_add_subregion(system_memory, 0, ram_below_4g); 949 e820_add_entry(0, x86ms->below_4g_mem_size, E820_RAM); 950 if (x86ms->above_4g_mem_size > 0) { 951 ram_above_4g = g_malloc(sizeof(*ram_above_4g)); 952 memory_region_init_alias(ram_above_4g, NULL, "ram-above-4g", 953 machine->ram, 954 x86ms->below_4g_mem_size, 955 x86ms->above_4g_mem_size); 956 memory_region_add_subregion(system_memory, 0x100000000ULL, 957 ram_above_4g); 958 e820_add_entry(0x100000000ULL, x86ms->above_4g_mem_size, E820_RAM); 959 } 960 961 if (!pcmc->has_reserved_memory && 962 (machine->ram_slots || 963 (machine->maxram_size > machine->ram_size))) { 964 965 error_report("\"-memory 'slots|maxmem'\" is not supported by: %s", 966 mc->name); 967 exit(EXIT_FAILURE); 968 } 969 970 /* always allocate the device memory information */ 971 machine->device_memory = g_malloc0(sizeof(*machine->device_memory)); 972 973 /* initialize device memory address space */ 974 if (pcmc->has_reserved_memory && 975 (machine->ram_size < machine->maxram_size)) { 976 ram_addr_t device_mem_size = machine->maxram_size - machine->ram_size; 977 978 if (machine->ram_slots > ACPI_MAX_RAM_SLOTS) { 979 error_report("unsupported amount of memory slots: %"PRIu64, 980 machine->ram_slots); 981 exit(EXIT_FAILURE); 982 } 983 984 if (QEMU_ALIGN_UP(machine->maxram_size, 985 TARGET_PAGE_SIZE) != machine->maxram_size) { 986 error_report("maximum memory size must by aligned to multiple of " 987 "%d bytes", TARGET_PAGE_SIZE); 988 exit(EXIT_FAILURE); 989 } 990 991 machine->device_memory->base = 992 ROUND_UP(0x100000000ULL + x86ms->above_4g_mem_size, 1 * GiB); 993 994 if (pcmc->enforce_aligned_dimm) { 995 /* size device region assuming 1G page max alignment per slot */ 996 device_mem_size += (1 * GiB) * machine->ram_slots; 997 } 998 999 if ((machine->device_memory->base + device_mem_size) < 1000 device_mem_size) { 1001 error_report("unsupported amount of maximum memory: " RAM_ADDR_FMT, 1002 machine->maxram_size); 1003 exit(EXIT_FAILURE); 1004 } 1005 1006 memory_region_init(&machine->device_memory->mr, OBJECT(pcms), 1007 "device-memory", device_mem_size); 1008 memory_region_add_subregion(system_memory, machine->device_memory->base, 1009 &machine->device_memory->mr); 1010 } 1011 1012 /* Initialize PC system firmware */ 1013 pc_system_firmware_init(pcms, rom_memory); 1014 1015 option_rom_mr = g_malloc(sizeof(*option_rom_mr)); 1016 memory_region_init_ram(option_rom_mr, NULL, "pc.rom", PC_ROM_SIZE, 1017 &error_fatal); 1018 if (pcmc->pci_enabled) { 1019 memory_region_set_readonly(option_rom_mr, true); 1020 } 1021 memory_region_add_subregion_overlap(rom_memory, 1022 PC_ROM_MIN_VGA, 1023 option_rom_mr, 1024 1); 1025 1026 fw_cfg = fw_cfg_arch_create(machine, 1027 x86ms->boot_cpus, x86ms->apic_id_limit); 1028 1029 rom_set_fw(fw_cfg); 1030 1031 if (pcmc->has_reserved_memory && machine->device_memory->base) { 1032 uint64_t *val = g_malloc(sizeof(*val)); 1033 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); 1034 uint64_t res_mem_end = machine->device_memory->base; 1035 1036 if (!pcmc->broken_reserved_end) { 1037 res_mem_end += memory_region_size(&machine->device_memory->mr); 1038 } 1039 *val = cpu_to_le64(ROUND_UP(res_mem_end, 1 * GiB)); 1040 fw_cfg_add_file(fw_cfg, "etc/reserved-memory-end", val, sizeof(*val)); 1041 } 1042 1043 if (linux_boot) { 1044 x86_load_linux(x86ms, fw_cfg, pcmc->acpi_data_size, 1045 pcmc->pvh_enabled, pcmc->linuxboot_dma_enabled); 1046 } 1047 1048 for (i = 0; i < nb_option_roms; i++) { 1049 rom_add_option(option_rom[i].name, option_rom[i].bootindex); 1050 } 1051 x86ms->fw_cfg = fw_cfg; 1052 1053 /* Init default IOAPIC address space */ 1054 x86ms->ioapic_as = &address_space_memory; 1055 1056 /* Init ACPI memory hotplug IO base address */ 1057 pcms->memhp_io_base = ACPI_MEMORY_HOTPLUG_BASE; 1058 } 1059 1060 /* 1061 * The 64bit pci hole starts after "above 4G RAM" and 1062 * potentially the space reserved for memory hotplug. 1063 */ 1064 uint64_t pc_pci_hole64_start(void) 1065 { 1066 PCMachineState *pcms = PC_MACHINE(qdev_get_machine()); 1067 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); 1068 MachineState *ms = MACHINE(pcms); 1069 X86MachineState *x86ms = X86_MACHINE(pcms); 1070 uint64_t hole64_start = 0; 1071 1072 if (pcmc->has_reserved_memory && ms->device_memory->base) { 1073 hole64_start = ms->device_memory->base; 1074 if (!pcmc->broken_reserved_end) { 1075 hole64_start += memory_region_size(&ms->device_memory->mr); 1076 } 1077 } else { 1078 hole64_start = 0x100000000ULL + x86ms->above_4g_mem_size; 1079 } 1080 1081 return ROUND_UP(hole64_start, 1 * GiB); 1082 } 1083 1084 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus) 1085 { 1086 DeviceState *dev = NULL; 1087 1088 rom_set_order_override(FW_CFG_ORDER_OVERRIDE_VGA); 1089 if (pci_bus) { 1090 PCIDevice *pcidev = pci_vga_init(pci_bus); 1091 dev = pcidev ? &pcidev->qdev : NULL; 1092 } else if (isa_bus) { 1093 ISADevice *isadev = isa_vga_init(isa_bus); 1094 dev = isadev ? DEVICE(isadev) : NULL; 1095 } 1096 rom_reset_order_override(); 1097 return dev; 1098 } 1099 1100 static const MemoryRegionOps ioport80_io_ops = { 1101 .write = ioport80_write, 1102 .read = ioport80_read, 1103 .endianness = DEVICE_NATIVE_ENDIAN, 1104 .impl = { 1105 .min_access_size = 1, 1106 .max_access_size = 1, 1107 }, 1108 }; 1109 1110 static const MemoryRegionOps ioportF0_io_ops = { 1111 .write = ioportF0_write, 1112 .read = ioportF0_read, 1113 .endianness = DEVICE_NATIVE_ENDIAN, 1114 .impl = { 1115 .min_access_size = 1, 1116 .max_access_size = 1, 1117 }, 1118 }; 1119 1120 static void pc_superio_init(ISABus *isa_bus, bool create_fdctrl, bool no_vmport) 1121 { 1122 int i; 1123 DriveInfo *fd[MAX_FD]; 1124 qemu_irq *a20_line; 1125 ISADevice *fdc, *i8042, *port92, *vmmouse; 1126 1127 serial_hds_isa_init(isa_bus, 0, MAX_ISA_SERIAL_PORTS); 1128 parallel_hds_isa_init(isa_bus, MAX_PARALLEL_PORTS); 1129 1130 for (i = 0; i < MAX_FD; i++) { 1131 fd[i] = drive_get(IF_FLOPPY, 0, i); 1132 create_fdctrl |= !!fd[i]; 1133 } 1134 if (create_fdctrl) { 1135 fdc = isa_new(TYPE_ISA_FDC); 1136 if (fdc) { 1137 isa_realize_and_unref(fdc, isa_bus, &error_fatal); 1138 isa_fdc_init_drives(fdc, fd); 1139 } 1140 } 1141 1142 i8042 = isa_create_simple(isa_bus, "i8042"); 1143 if (!no_vmport) { 1144 isa_create_simple(isa_bus, TYPE_VMPORT); 1145 vmmouse = isa_try_new("vmmouse"); 1146 } else { 1147 vmmouse = NULL; 1148 } 1149 if (vmmouse) { 1150 object_property_set_link(OBJECT(vmmouse), "i8042", OBJECT(i8042), 1151 &error_abort); 1152 isa_realize_and_unref(vmmouse, isa_bus, &error_fatal); 1153 } 1154 port92 = isa_create_simple(isa_bus, TYPE_PORT92); 1155 1156 a20_line = qemu_allocate_irqs(handle_a20_line_change, first_cpu, 2); 1157 i8042_setup_a20_line(i8042, a20_line[0]); 1158 qdev_connect_gpio_out_named(DEVICE(port92), 1159 PORT92_A20_LINE, 0, a20_line[1]); 1160 g_free(a20_line); 1161 } 1162 1163 void pc_basic_device_init(struct PCMachineState *pcms, 1164 ISABus *isa_bus, qemu_irq *gsi, 1165 ISADevice **rtc_state, 1166 bool create_fdctrl, 1167 uint32_t hpet_irqs) 1168 { 1169 int i; 1170 DeviceState *hpet = NULL; 1171 int pit_isa_irq = 0; 1172 qemu_irq pit_alt_irq = NULL; 1173 qemu_irq rtc_irq = NULL; 1174 ISADevice *pit = NULL; 1175 MemoryRegion *ioport80_io = g_new(MemoryRegion, 1); 1176 MemoryRegion *ioportF0_io = g_new(MemoryRegion, 1); 1177 1178 memory_region_init_io(ioport80_io, NULL, &ioport80_io_ops, NULL, "ioport80", 1); 1179 memory_region_add_subregion(isa_bus->address_space_io, 0x80, ioport80_io); 1180 1181 memory_region_init_io(ioportF0_io, NULL, &ioportF0_io_ops, NULL, "ioportF0", 1); 1182 memory_region_add_subregion(isa_bus->address_space_io, 0xf0, ioportF0_io); 1183 1184 /* 1185 * Check if an HPET shall be created. 1186 * 1187 * Without KVM_CAP_PIT_STATE2, we cannot switch off the in-kernel PIT 1188 * when the HPET wants to take over. Thus we have to disable the latter. 1189 */ 1190 if (!no_hpet && (!kvm_irqchip_in_kernel() || kvm_has_pit_state2())) { 1191 hpet = qdev_try_new(TYPE_HPET); 1192 if (hpet) { 1193 /* For pc-piix-*, hpet's intcap is always IRQ2. For pc-q35-1.7 1194 * and earlier, use IRQ2 for compat. Otherwise, use IRQ16~23, 1195 * IRQ8 and IRQ2. 1196 */ 1197 uint8_t compat = object_property_get_uint(OBJECT(hpet), 1198 HPET_INTCAP, NULL); 1199 if (!compat) { 1200 qdev_prop_set_uint32(hpet, HPET_INTCAP, hpet_irqs); 1201 } 1202 sysbus_realize_and_unref(SYS_BUS_DEVICE(hpet), &error_fatal); 1203 sysbus_mmio_map(SYS_BUS_DEVICE(hpet), 0, HPET_BASE); 1204 1205 for (i = 0; i < GSI_NUM_PINS; i++) { 1206 sysbus_connect_irq(SYS_BUS_DEVICE(hpet), i, gsi[i]); 1207 } 1208 pit_isa_irq = -1; 1209 pit_alt_irq = qdev_get_gpio_in(hpet, HPET_LEGACY_PIT_INT); 1210 rtc_irq = qdev_get_gpio_in(hpet, HPET_LEGACY_RTC_INT); 1211 } 1212 } 1213 *rtc_state = mc146818_rtc_init(isa_bus, 2000, rtc_irq); 1214 1215 qemu_register_boot_set(pc_boot_set, *rtc_state); 1216 1217 if (!xen_enabled() && pcms->pit_enabled) { 1218 if (kvm_pit_in_kernel()) { 1219 pit = kvm_pit_init(isa_bus, 0x40); 1220 } else { 1221 pit = i8254_pit_init(isa_bus, 0x40, pit_isa_irq, pit_alt_irq); 1222 } 1223 if (hpet) { 1224 /* connect PIT to output control line of the HPET */ 1225 qdev_connect_gpio_out(hpet, 0, qdev_get_gpio_in(DEVICE(pit), 0)); 1226 } 1227 pcspk_init(pcms->pcspk, isa_bus, pit); 1228 } 1229 1230 i8257_dma_init(isa_bus, 0); 1231 1232 /* Super I/O */ 1233 pc_superio_init(isa_bus, create_fdctrl, pcms->vmport != ON_OFF_AUTO_ON); 1234 } 1235 1236 void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus) 1237 { 1238 int i; 1239 1240 rom_set_order_override(FW_CFG_ORDER_OVERRIDE_NIC); 1241 for (i = 0; i < nb_nics; i++) { 1242 NICInfo *nd = &nd_table[i]; 1243 const char *model = nd->model ? nd->model : pcmc->default_nic_model; 1244 1245 if (g_str_equal(model, "ne2k_isa")) { 1246 pc_init_ne2k_isa(isa_bus, nd); 1247 } else { 1248 pci_nic_init_nofail(nd, pci_bus, model, NULL); 1249 } 1250 } 1251 rom_reset_order_override(); 1252 } 1253 1254 void pc_i8259_create(ISABus *isa_bus, qemu_irq *i8259_irqs) 1255 { 1256 qemu_irq *i8259; 1257 1258 if (kvm_pic_in_kernel()) { 1259 i8259 = kvm_i8259_init(isa_bus); 1260 } else if (xen_enabled()) { 1261 i8259 = xen_interrupt_controller_init(); 1262 } else { 1263 i8259 = i8259_init(isa_bus, x86_allocate_cpu_irq()); 1264 } 1265 1266 for (size_t i = 0; i < ISA_NUM_IRQS; i++) { 1267 i8259_irqs[i] = i8259[i]; 1268 } 1269 1270 g_free(i8259); 1271 } 1272 1273 static void pc_memory_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev, 1274 Error **errp) 1275 { 1276 const PCMachineState *pcms = PC_MACHINE(hotplug_dev); 1277 const PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); 1278 const MachineState *ms = MACHINE(hotplug_dev); 1279 const bool is_nvdimm = object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM); 1280 const uint64_t legacy_align = TARGET_PAGE_SIZE; 1281 Error *local_err = NULL; 1282 1283 /* 1284 * When -no-acpi is used with Q35 machine type, no ACPI is built, 1285 * but pcms->acpi_dev is still created. Check !acpi_enabled in 1286 * addition to cover this case. 1287 */ 1288 if (!pcms->acpi_dev || !x86_machine_is_acpi_enabled(X86_MACHINE(pcms))) { 1289 error_setg(errp, 1290 "memory hotplug is not enabled: missing acpi device or acpi disabled"); 1291 return; 1292 } 1293 1294 if (is_nvdimm && !ms->nvdimms_state->is_enabled) { 1295 error_setg(errp, "nvdimm is not enabled: missing 'nvdimm' in '-M'"); 1296 return; 1297 } 1298 1299 hotplug_handler_pre_plug(pcms->acpi_dev, dev, &local_err); 1300 if (local_err) { 1301 error_propagate(errp, local_err); 1302 return; 1303 } 1304 1305 pc_dimm_pre_plug(PC_DIMM(dev), MACHINE(hotplug_dev), 1306 pcmc->enforce_aligned_dimm ? NULL : &legacy_align, errp); 1307 } 1308 1309 static void pc_memory_plug(HotplugHandler *hotplug_dev, 1310 DeviceState *dev, Error **errp) 1311 { 1312 Error *local_err = NULL; 1313 PCMachineState *pcms = PC_MACHINE(hotplug_dev); 1314 MachineState *ms = MACHINE(hotplug_dev); 1315 bool is_nvdimm = object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM); 1316 1317 pc_dimm_plug(PC_DIMM(dev), MACHINE(pcms), &local_err); 1318 if (local_err) { 1319 goto out; 1320 } 1321 1322 if (is_nvdimm) { 1323 nvdimm_plug(ms->nvdimms_state); 1324 } 1325 1326 hotplug_handler_plug(HOTPLUG_HANDLER(pcms->acpi_dev), dev, &error_abort); 1327 out: 1328 error_propagate(errp, local_err); 1329 } 1330 1331 static void pc_memory_unplug_request(HotplugHandler *hotplug_dev, 1332 DeviceState *dev, Error **errp) 1333 { 1334 PCMachineState *pcms = PC_MACHINE(hotplug_dev); 1335 1336 /* 1337 * When -no-acpi is used with Q35 machine type, no ACPI is built, 1338 * but pcms->acpi_dev is still created. Check !acpi_enabled in 1339 * addition to cover this case. 1340 */ 1341 if (!pcms->acpi_dev || !x86_machine_is_acpi_enabled(X86_MACHINE(pcms))) { 1342 error_setg(errp, 1343 "memory hotplug is not enabled: missing acpi device or acpi disabled"); 1344 return; 1345 } 1346 1347 if (object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM)) { 1348 error_setg(errp, "nvdimm device hot unplug is not supported yet."); 1349 return; 1350 } 1351 1352 hotplug_handler_unplug_request(HOTPLUG_HANDLER(pcms->acpi_dev), dev, 1353 errp); 1354 } 1355 1356 static void pc_memory_unplug(HotplugHandler *hotplug_dev, 1357 DeviceState *dev, Error **errp) 1358 { 1359 PCMachineState *pcms = PC_MACHINE(hotplug_dev); 1360 Error *local_err = NULL; 1361 1362 hotplug_handler_unplug(HOTPLUG_HANDLER(pcms->acpi_dev), dev, &local_err); 1363 if (local_err) { 1364 goto out; 1365 } 1366 1367 pc_dimm_unplug(PC_DIMM(dev), MACHINE(pcms)); 1368 qdev_unrealize(dev); 1369 out: 1370 error_propagate(errp, local_err); 1371 } 1372 1373 static int pc_apic_cmp(const void *a, const void *b) 1374 { 1375 CPUArchId *apic_a = (CPUArchId *)a; 1376 CPUArchId *apic_b = (CPUArchId *)b; 1377 1378 return apic_a->arch_id - apic_b->arch_id; 1379 } 1380 1381 /* returns pointer to CPUArchId descriptor that matches CPU's apic_id 1382 * in ms->possible_cpus->cpus, if ms->possible_cpus->cpus has no 1383 * entry corresponding to CPU's apic_id returns NULL. 1384 */ 1385 static CPUArchId *pc_find_cpu_slot(MachineState *ms, uint32_t id, int *idx) 1386 { 1387 CPUArchId apic_id, *found_cpu; 1388 1389 apic_id.arch_id = id; 1390 found_cpu = bsearch(&apic_id, ms->possible_cpus->cpus, 1391 ms->possible_cpus->len, sizeof(*ms->possible_cpus->cpus), 1392 pc_apic_cmp); 1393 if (found_cpu && idx) { 1394 *idx = found_cpu - ms->possible_cpus->cpus; 1395 } 1396 return found_cpu; 1397 } 1398 1399 static void pc_cpu_plug(HotplugHandler *hotplug_dev, 1400 DeviceState *dev, Error **errp) 1401 { 1402 CPUArchId *found_cpu; 1403 Error *local_err = NULL; 1404 X86CPU *cpu = X86_CPU(dev); 1405 PCMachineState *pcms = PC_MACHINE(hotplug_dev); 1406 X86MachineState *x86ms = X86_MACHINE(pcms); 1407 1408 if (pcms->acpi_dev) { 1409 hotplug_handler_plug(HOTPLUG_HANDLER(pcms->acpi_dev), dev, &local_err); 1410 if (local_err) { 1411 goto out; 1412 } 1413 } 1414 1415 /* increment the number of CPUs */ 1416 x86ms->boot_cpus++; 1417 if (x86ms->rtc) { 1418 rtc_set_cpus_count(x86ms->rtc, x86ms->boot_cpus); 1419 } 1420 if (x86ms->fw_cfg) { 1421 fw_cfg_modify_i16(x86ms->fw_cfg, FW_CFG_NB_CPUS, x86ms->boot_cpus); 1422 } 1423 1424 found_cpu = pc_find_cpu_slot(MACHINE(pcms), cpu->apic_id, NULL); 1425 found_cpu->cpu = OBJECT(dev); 1426 out: 1427 error_propagate(errp, local_err); 1428 } 1429 static void pc_cpu_unplug_request_cb(HotplugHandler *hotplug_dev, 1430 DeviceState *dev, Error **errp) 1431 { 1432 int idx = -1; 1433 X86CPU *cpu = X86_CPU(dev); 1434 PCMachineState *pcms = PC_MACHINE(hotplug_dev); 1435 1436 if (!pcms->acpi_dev) { 1437 error_setg(errp, "CPU hot unplug not supported without ACPI"); 1438 return; 1439 } 1440 1441 pc_find_cpu_slot(MACHINE(pcms), cpu->apic_id, &idx); 1442 assert(idx != -1); 1443 if (idx == 0) { 1444 error_setg(errp, "Boot CPU is unpluggable"); 1445 return; 1446 } 1447 1448 hotplug_handler_unplug_request(HOTPLUG_HANDLER(pcms->acpi_dev), dev, 1449 errp); 1450 } 1451 1452 static void pc_cpu_unplug_cb(HotplugHandler *hotplug_dev, 1453 DeviceState *dev, Error **errp) 1454 { 1455 CPUArchId *found_cpu; 1456 Error *local_err = NULL; 1457 X86CPU *cpu = X86_CPU(dev); 1458 PCMachineState *pcms = PC_MACHINE(hotplug_dev); 1459 X86MachineState *x86ms = X86_MACHINE(pcms); 1460 1461 hotplug_handler_unplug(HOTPLUG_HANDLER(pcms->acpi_dev), dev, &local_err); 1462 if (local_err) { 1463 goto out; 1464 } 1465 1466 found_cpu = pc_find_cpu_slot(MACHINE(pcms), cpu->apic_id, NULL); 1467 found_cpu->cpu = NULL; 1468 qdev_unrealize(dev); 1469 1470 /* decrement the number of CPUs */ 1471 x86ms->boot_cpus--; 1472 /* Update the number of CPUs in CMOS */ 1473 rtc_set_cpus_count(x86ms->rtc, x86ms->boot_cpus); 1474 fw_cfg_modify_i16(x86ms->fw_cfg, FW_CFG_NB_CPUS, x86ms->boot_cpus); 1475 out: 1476 error_propagate(errp, local_err); 1477 } 1478 1479 static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev, 1480 DeviceState *dev, Error **errp) 1481 { 1482 int idx; 1483 CPUState *cs; 1484 CPUArchId *cpu_slot; 1485 X86CPUTopoIDs topo_ids; 1486 X86CPU *cpu = X86_CPU(dev); 1487 CPUX86State *env = &cpu->env; 1488 MachineState *ms = MACHINE(hotplug_dev); 1489 PCMachineState *pcms = PC_MACHINE(hotplug_dev); 1490 X86MachineState *x86ms = X86_MACHINE(pcms); 1491 unsigned int smp_cores = ms->smp.cores; 1492 unsigned int smp_threads = ms->smp.threads; 1493 X86CPUTopoInfo topo_info; 1494 1495 if(!object_dynamic_cast(OBJECT(cpu), ms->cpu_type)) { 1496 error_setg(errp, "Invalid CPU type, expected cpu type: '%s'", 1497 ms->cpu_type); 1498 return; 1499 } 1500 1501 init_topo_info(&topo_info, x86ms); 1502 1503 env->nr_dies = x86ms->smp_dies; 1504 env->nr_nodes = topo_info.nodes_per_pkg; 1505 env->pkg_offset = x86ms->apicid_pkg_offset(&topo_info); 1506 1507 /* 1508 * If APIC ID is not set, 1509 * set it based on socket/die/core/thread properties. 1510 */ 1511 if (cpu->apic_id == UNASSIGNED_APIC_ID) { 1512 int max_socket = (ms->smp.max_cpus - 1) / 1513 smp_threads / smp_cores / x86ms->smp_dies; 1514 1515 /* 1516 * die-id was optional in QEMU 4.0 and older, so keep it optional 1517 * if there's only one die per socket. 1518 */ 1519 if (cpu->die_id < 0 && x86ms->smp_dies == 1) { 1520 cpu->die_id = 0; 1521 } 1522 1523 if (cpu->socket_id < 0) { 1524 error_setg(errp, "CPU socket-id is not set"); 1525 return; 1526 } else if (cpu->socket_id > max_socket) { 1527 error_setg(errp, "Invalid CPU socket-id: %u must be in range 0:%u", 1528 cpu->socket_id, max_socket); 1529 return; 1530 } 1531 if (cpu->die_id < 0) { 1532 error_setg(errp, "CPU die-id is not set"); 1533 return; 1534 } else if (cpu->die_id > x86ms->smp_dies - 1) { 1535 error_setg(errp, "Invalid CPU die-id: %u must be in range 0:%u", 1536 cpu->die_id, x86ms->smp_dies - 1); 1537 return; 1538 } 1539 if (cpu->core_id < 0) { 1540 error_setg(errp, "CPU core-id is not set"); 1541 return; 1542 } else if (cpu->core_id > (smp_cores - 1)) { 1543 error_setg(errp, "Invalid CPU core-id: %u must be in range 0:%u", 1544 cpu->core_id, smp_cores - 1); 1545 return; 1546 } 1547 if (cpu->thread_id < 0) { 1548 error_setg(errp, "CPU thread-id is not set"); 1549 return; 1550 } else if (cpu->thread_id > (smp_threads - 1)) { 1551 error_setg(errp, "Invalid CPU thread-id: %u must be in range 0:%u", 1552 cpu->thread_id, smp_threads - 1); 1553 return; 1554 } 1555 1556 topo_ids.pkg_id = cpu->socket_id; 1557 topo_ids.die_id = cpu->die_id; 1558 topo_ids.core_id = cpu->core_id; 1559 topo_ids.smt_id = cpu->thread_id; 1560 cpu->apic_id = x86ms->apicid_from_topo_ids(&topo_info, &topo_ids); 1561 } 1562 1563 cpu_slot = pc_find_cpu_slot(MACHINE(pcms), cpu->apic_id, &idx); 1564 if (!cpu_slot) { 1565 MachineState *ms = MACHINE(pcms); 1566 1567 x86ms->topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids); 1568 error_setg(errp, 1569 "Invalid CPU [socket: %u, die: %u, core: %u, thread: %u] with" 1570 " APIC ID %" PRIu32 ", valid index range 0:%d", 1571 topo_ids.pkg_id, topo_ids.die_id, topo_ids.core_id, topo_ids.smt_id, 1572 cpu->apic_id, ms->possible_cpus->len - 1); 1573 return; 1574 } 1575 1576 if (cpu_slot->cpu) { 1577 error_setg(errp, "CPU[%d] with APIC ID %" PRIu32 " exists", 1578 idx, cpu->apic_id); 1579 return; 1580 } 1581 1582 /* if 'address' properties socket-id/core-id/thread-id are not set, set them 1583 * so that machine_query_hotpluggable_cpus would show correct values 1584 */ 1585 /* TODO: move socket_id/core_id/thread_id checks into x86_cpu_realizefn() 1586 * once -smp refactoring is complete and there will be CPU private 1587 * CPUState::nr_cores and CPUState::nr_threads fields instead of globals */ 1588 x86ms->topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids); 1589 if (cpu->socket_id != -1 && cpu->socket_id != topo_ids.pkg_id) { 1590 error_setg(errp, "property socket-id: %u doesn't match set apic-id:" 1591 " 0x%x (socket-id: %u)", cpu->socket_id, cpu->apic_id, 1592 topo_ids.pkg_id); 1593 return; 1594 } 1595 cpu->socket_id = topo_ids.pkg_id; 1596 1597 if (cpu->die_id != -1 && cpu->die_id != topo_ids.die_id) { 1598 error_setg(errp, "property die-id: %u doesn't match set apic-id:" 1599 " 0x%x (die-id: %u)", cpu->die_id, cpu->apic_id, topo_ids.die_id); 1600 return; 1601 } 1602 cpu->die_id = topo_ids.die_id; 1603 1604 if (cpu->core_id != -1 && cpu->core_id != topo_ids.core_id) { 1605 error_setg(errp, "property core-id: %u doesn't match set apic-id:" 1606 " 0x%x (core-id: %u)", cpu->core_id, cpu->apic_id, 1607 topo_ids.core_id); 1608 return; 1609 } 1610 cpu->core_id = topo_ids.core_id; 1611 1612 if (cpu->thread_id != -1 && cpu->thread_id != topo_ids.smt_id) { 1613 error_setg(errp, "property thread-id: %u doesn't match set apic-id:" 1614 " 0x%x (thread-id: %u)", cpu->thread_id, cpu->apic_id, 1615 topo_ids.smt_id); 1616 return; 1617 } 1618 cpu->thread_id = topo_ids.smt_id; 1619 1620 if (hyperv_feat_enabled(cpu, HYPERV_FEAT_VPINDEX) && 1621 !kvm_hv_vpindex_settable()) { 1622 error_setg(errp, "kernel doesn't allow setting HyperV VP_INDEX"); 1623 return; 1624 } 1625 1626 cs = CPU(cpu); 1627 cs->cpu_index = idx; 1628 1629 numa_cpu_pre_plug(cpu_slot, dev, errp); 1630 } 1631 1632 static void pc_virtio_md_pci_pre_plug(HotplugHandler *hotplug_dev, 1633 DeviceState *dev, Error **errp) 1634 { 1635 HotplugHandler *hotplug_dev2 = qdev_get_bus_hotplug_handler(dev); 1636 Error *local_err = NULL; 1637 1638 if (!hotplug_dev2 && dev->hotplugged) { 1639 /* 1640 * Without a bus hotplug handler, we cannot control the plug/unplug 1641 * order. We should never reach this point when hotplugging on x86, 1642 * however, better add a safety net. 1643 */ 1644 error_setg(errp, "hotplug of virtio based memory devices not supported" 1645 " on this bus."); 1646 return; 1647 } 1648 /* 1649 * First, see if we can plug this memory device at all. If that 1650 * succeeds, branch of to the actual hotplug handler. 1651 */ 1652 memory_device_pre_plug(MEMORY_DEVICE(dev), MACHINE(hotplug_dev), NULL, 1653 &local_err); 1654 if (!local_err && hotplug_dev2) { 1655 hotplug_handler_pre_plug(hotplug_dev2, dev, &local_err); 1656 } 1657 error_propagate(errp, local_err); 1658 } 1659 1660 static void pc_virtio_md_pci_plug(HotplugHandler *hotplug_dev, 1661 DeviceState *dev, Error **errp) 1662 { 1663 HotplugHandler *hotplug_dev2 = qdev_get_bus_hotplug_handler(dev); 1664 Error *local_err = NULL; 1665 1666 /* 1667 * Plug the memory device first and then branch off to the actual 1668 * hotplug handler. If that one fails, we can easily undo the memory 1669 * device bits. 1670 */ 1671 memory_device_plug(MEMORY_DEVICE(dev), MACHINE(hotplug_dev)); 1672 if (hotplug_dev2) { 1673 hotplug_handler_plug(hotplug_dev2, dev, &local_err); 1674 if (local_err) { 1675 memory_device_unplug(MEMORY_DEVICE(dev), MACHINE(hotplug_dev)); 1676 } 1677 } 1678 error_propagate(errp, local_err); 1679 } 1680 1681 static void pc_virtio_md_pci_unplug_request(HotplugHandler *hotplug_dev, 1682 DeviceState *dev, Error **errp) 1683 { 1684 /* We don't support hot unplug of virtio based memory devices */ 1685 error_setg(errp, "virtio based memory devices cannot be unplugged."); 1686 } 1687 1688 static void pc_virtio_md_pci_unplug(HotplugHandler *hotplug_dev, 1689 DeviceState *dev, Error **errp) 1690 { 1691 /* We don't support hot unplug of virtio based memory devices */ 1692 } 1693 1694 static void pc_machine_device_pre_plug_cb(HotplugHandler *hotplug_dev, 1695 DeviceState *dev, Error **errp) 1696 { 1697 if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { 1698 pc_memory_pre_plug(hotplug_dev, dev, errp); 1699 } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) { 1700 pc_cpu_pre_plug(hotplug_dev, dev, errp); 1701 } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_PMEM_PCI) || 1702 object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MEM_PCI)) { 1703 pc_virtio_md_pci_pre_plug(hotplug_dev, dev, errp); 1704 } 1705 } 1706 1707 static void pc_machine_device_plug_cb(HotplugHandler *hotplug_dev, 1708 DeviceState *dev, Error **errp) 1709 { 1710 if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { 1711 pc_memory_plug(hotplug_dev, dev, errp); 1712 } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) { 1713 pc_cpu_plug(hotplug_dev, dev, errp); 1714 } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_PMEM_PCI) || 1715 object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MEM_PCI)) { 1716 pc_virtio_md_pci_plug(hotplug_dev, dev, errp); 1717 } 1718 } 1719 1720 static void pc_machine_device_unplug_request_cb(HotplugHandler *hotplug_dev, 1721 DeviceState *dev, Error **errp) 1722 { 1723 if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { 1724 pc_memory_unplug_request(hotplug_dev, dev, errp); 1725 } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) { 1726 pc_cpu_unplug_request_cb(hotplug_dev, dev, errp); 1727 } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_PMEM_PCI) || 1728 object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MEM_PCI)) { 1729 pc_virtio_md_pci_unplug_request(hotplug_dev, dev, errp); 1730 } else { 1731 error_setg(errp, "acpi: device unplug request for not supported device" 1732 " type: %s", object_get_typename(OBJECT(dev))); 1733 } 1734 } 1735 1736 static void pc_machine_device_unplug_cb(HotplugHandler *hotplug_dev, 1737 DeviceState *dev, Error **errp) 1738 { 1739 if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { 1740 pc_memory_unplug(hotplug_dev, dev, errp); 1741 } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) { 1742 pc_cpu_unplug_cb(hotplug_dev, dev, errp); 1743 } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_PMEM_PCI) || 1744 object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MEM_PCI)) { 1745 pc_virtio_md_pci_unplug(hotplug_dev, dev, errp); 1746 } else { 1747 error_setg(errp, "acpi: device unplug for not supported device" 1748 " type: %s", object_get_typename(OBJECT(dev))); 1749 } 1750 } 1751 1752 static HotplugHandler *pc_get_hotplug_handler(MachineState *machine, 1753 DeviceState *dev) 1754 { 1755 if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM) || 1756 object_dynamic_cast(OBJECT(dev), TYPE_CPU) || 1757 object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_PMEM_PCI) || 1758 object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MEM_PCI)) { 1759 return HOTPLUG_HANDLER(machine); 1760 } 1761 1762 return NULL; 1763 } 1764 1765 static void 1766 pc_machine_get_device_memory_region_size(Object *obj, Visitor *v, 1767 const char *name, void *opaque, 1768 Error **errp) 1769 { 1770 MachineState *ms = MACHINE(obj); 1771 int64_t value = 0; 1772 1773 if (ms->device_memory) { 1774 value = memory_region_size(&ms->device_memory->mr); 1775 } 1776 1777 visit_type_int(v, name, &value, errp); 1778 } 1779 1780 static void pc_machine_get_vmport(Object *obj, Visitor *v, const char *name, 1781 void *opaque, Error **errp) 1782 { 1783 PCMachineState *pcms = PC_MACHINE(obj); 1784 OnOffAuto vmport = pcms->vmport; 1785 1786 visit_type_OnOffAuto(v, name, &vmport, errp); 1787 } 1788 1789 static void pc_machine_set_vmport(Object *obj, Visitor *v, const char *name, 1790 void *opaque, Error **errp) 1791 { 1792 PCMachineState *pcms = PC_MACHINE(obj); 1793 1794 visit_type_OnOffAuto(v, name, &pcms->vmport, errp); 1795 } 1796 1797 static bool pc_machine_get_smbus(Object *obj, Error **errp) 1798 { 1799 PCMachineState *pcms = PC_MACHINE(obj); 1800 1801 return pcms->smbus_enabled; 1802 } 1803 1804 static void pc_machine_set_smbus(Object *obj, bool value, Error **errp) 1805 { 1806 PCMachineState *pcms = PC_MACHINE(obj); 1807 1808 pcms->smbus_enabled = value; 1809 } 1810 1811 static bool pc_machine_get_sata(Object *obj, Error **errp) 1812 { 1813 PCMachineState *pcms = PC_MACHINE(obj); 1814 1815 return pcms->sata_enabled; 1816 } 1817 1818 static void pc_machine_set_sata(Object *obj, bool value, Error **errp) 1819 { 1820 PCMachineState *pcms = PC_MACHINE(obj); 1821 1822 pcms->sata_enabled = value; 1823 } 1824 1825 static bool pc_machine_get_pit(Object *obj, Error **errp) 1826 { 1827 PCMachineState *pcms = PC_MACHINE(obj); 1828 1829 return pcms->pit_enabled; 1830 } 1831 1832 static void pc_machine_set_pit(Object *obj, bool value, Error **errp) 1833 { 1834 PCMachineState *pcms = PC_MACHINE(obj); 1835 1836 pcms->pit_enabled = value; 1837 } 1838 1839 static void pc_machine_get_max_ram_below_4g(Object *obj, Visitor *v, 1840 const char *name, void *opaque, 1841 Error **errp) 1842 { 1843 PCMachineState *pcms = PC_MACHINE(obj); 1844 uint64_t value = pcms->max_ram_below_4g; 1845 1846 visit_type_size(v, name, &value, errp); 1847 } 1848 1849 static void pc_machine_set_max_ram_below_4g(Object *obj, Visitor *v, 1850 const char *name, void *opaque, 1851 Error **errp) 1852 { 1853 PCMachineState *pcms = PC_MACHINE(obj); 1854 uint64_t value; 1855 1856 if (!visit_type_size(v, name, &value, errp)) { 1857 return; 1858 } 1859 if (value > 4 * GiB) { 1860 error_setg(errp, 1861 "Machine option 'max-ram-below-4g=%"PRIu64 1862 "' expects size less than or equal to 4G", value); 1863 return; 1864 } 1865 1866 if (value < 1 * MiB) { 1867 warn_report("Only %" PRIu64 " bytes of RAM below the 4GiB boundary," 1868 "BIOS may not work with less than 1MiB", value); 1869 } 1870 1871 pcms->max_ram_below_4g = value; 1872 } 1873 1874 static void pc_machine_initfn(Object *obj) 1875 { 1876 PCMachineState *pcms = PC_MACHINE(obj); 1877 1878 #ifdef CONFIG_VMPORT 1879 pcms->vmport = ON_OFF_AUTO_AUTO; 1880 #else 1881 pcms->vmport = ON_OFF_AUTO_OFF; 1882 #endif /* CONFIG_VMPORT */ 1883 pcms->max_ram_below_4g = 0; /* use default */ 1884 /* acpi build is enabled by default if machine supports it */ 1885 pcms->acpi_build_enabled = PC_MACHINE_GET_CLASS(pcms)->has_acpi_build; 1886 pcms->smbus_enabled = true; 1887 pcms->sata_enabled = true; 1888 pcms->pit_enabled = true; 1889 1890 pc_system_flash_create(pcms); 1891 pcms->pcspk = isa_new(TYPE_PC_SPEAKER); 1892 object_property_add_alias(OBJECT(pcms), "pcspk-audiodev", 1893 OBJECT(pcms->pcspk), "audiodev"); 1894 } 1895 1896 static void pc_machine_reset(MachineState *machine) 1897 { 1898 CPUState *cs; 1899 X86CPU *cpu; 1900 1901 qemu_devices_reset(); 1902 1903 /* Reset APIC after devices have been reset to cancel 1904 * any changes that qemu_devices_reset() might have done. 1905 */ 1906 CPU_FOREACH(cs) { 1907 cpu = X86_CPU(cs); 1908 1909 if (cpu->apic_state) { 1910 device_legacy_reset(cpu->apic_state); 1911 } 1912 } 1913 } 1914 1915 static void pc_machine_wakeup(MachineState *machine) 1916 { 1917 cpu_synchronize_all_states(); 1918 pc_machine_reset(machine); 1919 cpu_synchronize_all_post_reset(); 1920 } 1921 1922 static bool pc_hotplug_allowed(MachineState *ms, DeviceState *dev, Error **errp) 1923 { 1924 X86IOMMUState *iommu = x86_iommu_get_default(); 1925 IntelIOMMUState *intel_iommu; 1926 1927 if (iommu && 1928 object_dynamic_cast((Object *)iommu, TYPE_INTEL_IOMMU_DEVICE) && 1929 object_dynamic_cast((Object *)dev, "vfio-pci")) { 1930 intel_iommu = INTEL_IOMMU_DEVICE(iommu); 1931 if (!intel_iommu->caching_mode) { 1932 error_setg(errp, "Device assignment is not allowed without " 1933 "enabling caching-mode=on for Intel IOMMU."); 1934 return false; 1935 } 1936 } 1937 1938 return true; 1939 } 1940 1941 static void pc_machine_class_init(ObjectClass *oc, void *data) 1942 { 1943 MachineClass *mc = MACHINE_CLASS(oc); 1944 PCMachineClass *pcmc = PC_MACHINE_CLASS(oc); 1945 HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc); 1946 1947 pcmc->pci_enabled = true; 1948 pcmc->has_acpi_build = true; 1949 pcmc->rsdp_in_ram = true; 1950 pcmc->smbios_defaults = true; 1951 pcmc->smbios_uuid_encoded = true; 1952 pcmc->gigabyte_align = true; 1953 pcmc->has_reserved_memory = true; 1954 pcmc->kvmclock_enabled = true; 1955 pcmc->enforce_aligned_dimm = true; 1956 /* BIOS ACPI tables: 128K. Other BIOS datastructures: less than 4K reported 1957 * to be used at the moment, 32K should be enough for a while. */ 1958 pcmc->acpi_data_size = 0x20000 + 0x8000; 1959 pcmc->linuxboot_dma_enabled = true; 1960 pcmc->pvh_enabled = true; 1961 assert(!mc->get_hotplug_handler); 1962 mc->get_hotplug_handler = pc_get_hotplug_handler; 1963 mc->hotplug_allowed = pc_hotplug_allowed; 1964 mc->cpu_index_to_instance_props = x86_cpu_index_to_props; 1965 mc->get_default_cpu_node_id = x86_get_default_cpu_node_id; 1966 mc->possible_cpu_arch_ids = x86_possible_cpu_arch_ids; 1967 mc->auto_enable_numa_with_memhp = true; 1968 mc->auto_enable_numa_with_memdev = true; 1969 mc->has_hotpluggable_cpus = true; 1970 mc->default_boot_order = "cad"; 1971 mc->hot_add_cpu = pc_hot_add_cpu; 1972 mc->smp_parse = pc_smp_parse; 1973 mc->block_default_type = IF_IDE; 1974 mc->max_cpus = 255; 1975 mc->reset = pc_machine_reset; 1976 mc->wakeup = pc_machine_wakeup; 1977 hc->pre_plug = pc_machine_device_pre_plug_cb; 1978 hc->plug = pc_machine_device_plug_cb; 1979 hc->unplug_request = pc_machine_device_unplug_request_cb; 1980 hc->unplug = pc_machine_device_unplug_cb; 1981 mc->default_cpu_type = TARGET_DEFAULT_CPU_TYPE; 1982 mc->nvdimm_supported = true; 1983 mc->default_ram_id = "pc.ram"; 1984 1985 object_class_property_add(oc, PC_MACHINE_MAX_RAM_BELOW_4G, "size", 1986 pc_machine_get_max_ram_below_4g, pc_machine_set_max_ram_below_4g, 1987 NULL, NULL); 1988 object_class_property_set_description(oc, PC_MACHINE_MAX_RAM_BELOW_4G, 1989 "Maximum ram below the 4G boundary (32bit boundary)"); 1990 1991 object_class_property_add(oc, PC_MACHINE_DEVMEM_REGION_SIZE, "int", 1992 pc_machine_get_device_memory_region_size, NULL, 1993 NULL, NULL); 1994 1995 object_class_property_add(oc, PC_MACHINE_VMPORT, "OnOffAuto", 1996 pc_machine_get_vmport, pc_machine_set_vmport, 1997 NULL, NULL); 1998 object_class_property_set_description(oc, PC_MACHINE_VMPORT, 1999 "Enable vmport (pc & q35)"); 2000 2001 object_class_property_add_bool(oc, PC_MACHINE_SMBUS, 2002 pc_machine_get_smbus, pc_machine_set_smbus); 2003 2004 object_class_property_add_bool(oc, PC_MACHINE_SATA, 2005 pc_machine_get_sata, pc_machine_set_sata); 2006 2007 object_class_property_add_bool(oc, PC_MACHINE_PIT, 2008 pc_machine_get_pit, pc_machine_set_pit); 2009 } 2010 2011 static const TypeInfo pc_machine_info = { 2012 .name = TYPE_PC_MACHINE, 2013 .parent = TYPE_X86_MACHINE, 2014 .abstract = true, 2015 .instance_size = sizeof(PCMachineState), 2016 .instance_init = pc_machine_initfn, 2017 .class_size = sizeof(PCMachineClass), 2018 .class_init = pc_machine_class_init, 2019 .interfaces = (InterfaceInfo[]) { 2020 { TYPE_HOTPLUG_HANDLER }, 2021 { } 2022 }, 2023 }; 2024 2025 static void pc_machine_register_types(void) 2026 { 2027 type_register_static(&pc_machine_info); 2028 } 2029 2030 type_init(pc_machine_register_types) 2031