1 /* 2 * Copyright (c) 2018 Intel Corporation 3 * Copyright (c) 2019 Red Hat, Inc. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms and conditions of the GNU General Public License, 7 * version 2 or later, as published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program. If not, see <http://www.gnu.org/licenses/>. 16 */ 17 18 #include "qemu/osdep.h" 19 #include "qemu/error-report.h" 20 #include "qemu/cutils.h" 21 #include "qemu/units.h" 22 #include "qapi/error.h" 23 #include "qapi/visitor.h" 24 #include "qapi/qapi-visit-common.h" 25 #include "sysemu/sysemu.h" 26 #include "sysemu/cpus.h" 27 #include "sysemu/numa.h" 28 #include "sysemu/reset.h" 29 #include "sysemu/runstate.h" 30 #include "acpi-microvm.h" 31 #include "microvm-dt.h" 32 33 #include "hw/loader.h" 34 #include "hw/irq.h" 35 #include "hw/kvm/clock.h" 36 #include "hw/i386/microvm.h" 37 #include "hw/i386/x86.h" 38 #include "target/i386/cpu.h" 39 #include "hw/intc/i8259.h" 40 #include "hw/timer/i8254.h" 41 #include "hw/rtc/mc146818rtc.h" 42 #include "hw/char/serial.h" 43 #include "hw/display/ramfb.h" 44 #include "hw/i386/topology.h" 45 #include "hw/i386/e820_memory_layout.h" 46 #include "hw/i386/fw_cfg.h" 47 #include "hw/virtio/virtio-mmio.h" 48 #include "hw/acpi/acpi.h" 49 #include "hw/acpi/generic_event_device.h" 50 #include "hw/pci-host/gpex.h" 51 #include "hw/usb/xhci.h" 52 53 #include "elf.h" 54 #include "kvm/kvm_i386.h" 55 #include "hw/xen/start_info.h" 56 57 #define MICROVM_QBOOT_FILENAME "qboot.rom" 58 #define MICROVM_BIOS_FILENAME "bios-microvm.bin" 59 60 static void microvm_set_rtc(MicrovmMachineState *mms, MC146818RtcState *s) 61 { 62 X86MachineState *x86ms = X86_MACHINE(mms); 63 int val; 64 65 val = MIN(x86ms->below_4g_mem_size / KiB, 640); 66 mc146818rtc_set_cmos_data(s, 0x15, val); 67 mc146818rtc_set_cmos_data(s, 0x16, val >> 8); 68 /* extended memory (next 64MiB) */ 69 if (x86ms->below_4g_mem_size > 1 * MiB) { 70 val = (x86ms->below_4g_mem_size - 1 * MiB) / KiB; 71 } else { 72 val = 0; 73 } 74 if (val > 65535) { 75 val = 65535; 76 } 77 mc146818rtc_set_cmos_data(s, 0x17, val); 78 mc146818rtc_set_cmos_data(s, 0x18, val >> 8); 79 mc146818rtc_set_cmos_data(s, 0x30, val); 80 mc146818rtc_set_cmos_data(s, 0x31, val >> 8); 81 /* memory between 16MiB and 4GiB */ 82 if (x86ms->below_4g_mem_size > 16 * MiB) { 83 val = (x86ms->below_4g_mem_size - 16 * MiB) / (64 * KiB); 84 } else { 85 val = 0; 86 } 87 if (val > 65535) { 88 val = 65535; 89 } 90 mc146818rtc_set_cmos_data(s, 0x34, val); 91 mc146818rtc_set_cmos_data(s, 0x35, val >> 8); 92 /* memory above 4GiB */ 93 val = x86ms->above_4g_mem_size / 65536; 94 mc146818rtc_set_cmos_data(s, 0x5b, val); 95 mc146818rtc_set_cmos_data(s, 0x5c, val >> 8); 96 mc146818rtc_set_cmos_data(s, 0x5d, val >> 16); 97 } 98 99 static void create_gpex(MicrovmMachineState *mms) 100 { 101 X86MachineState *x86ms = X86_MACHINE(mms); 102 MemoryRegion *mmio32_alias; 103 MemoryRegion *mmio64_alias; 104 MemoryRegion *mmio_reg; 105 MemoryRegion *ecam_alias; 106 MemoryRegion *ecam_reg; 107 DeviceState *dev; 108 int i; 109 110 dev = qdev_new(TYPE_GPEX_HOST); 111 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 112 113 /* Map only the first size_ecam bytes of ECAM space */ 114 ecam_alias = g_new0(MemoryRegion, 1); 115 ecam_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0); 116 memory_region_init_alias(ecam_alias, OBJECT(dev), "pcie-ecam", 117 ecam_reg, 0, mms->gpex.ecam.size); 118 memory_region_add_subregion(get_system_memory(), 119 mms->gpex.ecam.base, ecam_alias); 120 121 /* Map the MMIO window into system address space so as to expose 122 * the section of PCI MMIO space which starts at the same base address 123 * (ie 1:1 mapping for that part of PCI MMIO space visible through 124 * the window). 125 */ 126 mmio_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 1); 127 if (mms->gpex.mmio32.size) { 128 mmio32_alias = g_new0(MemoryRegion, 1); 129 memory_region_init_alias(mmio32_alias, OBJECT(dev), "pcie-mmio32", mmio_reg, 130 mms->gpex.mmio32.base, mms->gpex.mmio32.size); 131 memory_region_add_subregion(get_system_memory(), 132 mms->gpex.mmio32.base, mmio32_alias); 133 } 134 if (mms->gpex.mmio64.size) { 135 mmio64_alias = g_new0(MemoryRegion, 1); 136 memory_region_init_alias(mmio64_alias, OBJECT(dev), "pcie-mmio64", mmio_reg, 137 mms->gpex.mmio64.base, mms->gpex.mmio64.size); 138 memory_region_add_subregion(get_system_memory(), 139 mms->gpex.mmio64.base, mmio64_alias); 140 } 141 142 for (i = 0; i < GPEX_NUM_IRQS; i++) { 143 sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, 144 x86ms->gsi[mms->gpex.irq + i]); 145 } 146 } 147 148 static int microvm_ioapics(MicrovmMachineState *mms) 149 { 150 if (!x86_machine_is_acpi_enabled(X86_MACHINE(mms))) { 151 return 1; 152 } 153 if (mms->ioapic2 == ON_OFF_AUTO_OFF) { 154 return 1; 155 } 156 return 2; 157 } 158 159 static void microvm_devices_init(MicrovmMachineState *mms) 160 { 161 const char *default_firmware; 162 X86MachineState *x86ms = X86_MACHINE(mms); 163 ISABus *isa_bus; 164 GSIState *gsi_state; 165 int ioapics; 166 int i; 167 168 /* Core components */ 169 ioapics = microvm_ioapics(mms); 170 gsi_state = g_malloc0(sizeof(*gsi_state)); 171 x86ms->gsi = qemu_allocate_irqs(gsi_handler, gsi_state, 172 IOAPIC_NUM_PINS * ioapics); 173 174 isa_bus = isa_bus_new(NULL, get_system_memory(), get_system_io(), 175 &error_abort); 176 isa_bus_register_input_irqs(isa_bus, x86ms->gsi); 177 178 ioapic_init_gsi(gsi_state, "machine"); 179 if (ioapics > 1) { 180 x86ms->ioapic2 = ioapic_init_secondary(gsi_state); 181 } 182 183 kvmclock_create(true); 184 185 mms->virtio_irq_base = 5; 186 mms->virtio_num_transports = 8; 187 if (x86ms->ioapic2) { 188 mms->pcie_irq_base = 16; /* 16 -> 19 */ 189 /* use second ioapic (24 -> 47) for virtio-mmio irq lines */ 190 mms->virtio_irq_base = IO_APIC_SECONDARY_IRQBASE; 191 mms->virtio_num_transports = IOAPIC_NUM_PINS; 192 } else if (x86_machine_is_acpi_enabled(x86ms)) { 193 mms->pcie_irq_base = 12; /* 12 -> 15 */ 194 mms->virtio_irq_base = 16; /* 16 -> 23 */ 195 } 196 197 for (i = 0; i < mms->virtio_num_transports; i++) { 198 sysbus_create_simple("virtio-mmio", 199 VIRTIO_MMIO_BASE + i * 512, 200 x86ms->gsi[mms->virtio_irq_base + i]); 201 } 202 203 /* Optional and legacy devices */ 204 if (x86_machine_is_acpi_enabled(x86ms)) { 205 DeviceState *dev = qdev_new(TYPE_ACPI_GED_X86); 206 qdev_prop_set_uint32(dev, "ged-event", ACPI_GED_PWR_DOWN_EVT); 207 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, GED_MMIO_BASE); 208 /* sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, GED_MMIO_BASE_MEMHP); */ 209 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, GED_MMIO_BASE_REGS); 210 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, 211 x86ms->gsi[GED_MMIO_IRQ]); 212 sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal); 213 x86ms->acpi_dev = HOTPLUG_HANDLER(dev); 214 } 215 216 if (x86_machine_is_acpi_enabled(x86ms) && machine_usb(MACHINE(mms))) { 217 DeviceState *dev = qdev_new(TYPE_XHCI_SYSBUS); 218 qdev_prop_set_uint32(dev, "intrs", 1); 219 qdev_prop_set_uint32(dev, "slots", XHCI_MAXSLOTS); 220 qdev_prop_set_uint32(dev, "p2", 8); 221 qdev_prop_set_uint32(dev, "p3", 8); 222 sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal); 223 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, MICROVM_XHCI_BASE); 224 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, 225 x86ms->gsi[MICROVM_XHCI_IRQ]); 226 } 227 228 if (x86_machine_is_acpi_enabled(x86ms) && mms->pcie == ON_OFF_AUTO_ON) { 229 /* use topmost 25% of the address space available */ 230 hwaddr phys_size = (hwaddr)1 << X86_CPU(first_cpu)->phys_bits; 231 if (phys_size > 0x1000000ll) { 232 mms->gpex.mmio64.size = phys_size / 4; 233 mms->gpex.mmio64.base = phys_size - mms->gpex.mmio64.size; 234 } 235 mms->gpex.mmio32.base = PCIE_MMIO_BASE; 236 mms->gpex.mmio32.size = PCIE_MMIO_SIZE; 237 mms->gpex.ecam.base = PCIE_ECAM_BASE; 238 mms->gpex.ecam.size = PCIE_ECAM_SIZE; 239 mms->gpex.irq = mms->pcie_irq_base; 240 create_gpex(mms); 241 x86ms->pci_irq_mask = ((1 << (mms->pcie_irq_base + 0)) | 242 (1 << (mms->pcie_irq_base + 1)) | 243 (1 << (mms->pcie_irq_base + 2)) | 244 (1 << (mms->pcie_irq_base + 3))); 245 } else { 246 x86ms->pci_irq_mask = 0; 247 } 248 249 if (x86ms->pic == ON_OFF_AUTO_ON || x86ms->pic == ON_OFF_AUTO_AUTO) { 250 qemu_irq *i8259; 251 252 i8259 = i8259_init(isa_bus, x86_allocate_cpu_irq()); 253 for (i = 0; i < ISA_NUM_IRQS; i++) { 254 gsi_state->i8259_irq[i] = i8259[i]; 255 } 256 g_free(i8259); 257 } 258 259 if (x86ms->pit == ON_OFF_AUTO_ON || x86ms->pit == ON_OFF_AUTO_AUTO) { 260 if (kvm_pit_in_kernel()) { 261 kvm_pit_init(isa_bus, 0x40); 262 } else { 263 i8254_pit_init(isa_bus, 0x40, 0, NULL); 264 } 265 } 266 267 if (mms->rtc == ON_OFF_AUTO_ON || 268 (mms->rtc == ON_OFF_AUTO_AUTO && !kvm_enabled())) { 269 microvm_set_rtc(mms, mc146818_rtc_init(isa_bus, 2000, NULL)); 270 } 271 272 if (mms->isa_serial) { 273 serial_hds_isa_init(isa_bus, 0, 1); 274 } 275 276 default_firmware = x86_machine_is_acpi_enabled(x86ms) 277 ? MICROVM_BIOS_FILENAME 278 : MICROVM_QBOOT_FILENAME; 279 x86_bios_rom_init(MACHINE(mms), default_firmware, get_system_memory(), true); 280 } 281 282 static void microvm_memory_init(MicrovmMachineState *mms) 283 { 284 MachineState *machine = MACHINE(mms); 285 X86MachineState *x86ms = X86_MACHINE(mms); 286 MemoryRegion *ram_below_4g, *ram_above_4g; 287 MemoryRegion *system_memory = get_system_memory(); 288 FWCfgState *fw_cfg; 289 ram_addr_t lowmem = 0xc0000000; /* 3G */ 290 int i; 291 292 if (machine->ram_size > lowmem) { 293 x86ms->above_4g_mem_size = machine->ram_size - lowmem; 294 x86ms->below_4g_mem_size = lowmem; 295 } else { 296 x86ms->above_4g_mem_size = 0; 297 x86ms->below_4g_mem_size = machine->ram_size; 298 } 299 300 ram_below_4g = g_malloc(sizeof(*ram_below_4g)); 301 memory_region_init_alias(ram_below_4g, NULL, "ram-below-4g", machine->ram, 302 0, x86ms->below_4g_mem_size); 303 memory_region_add_subregion(system_memory, 0, ram_below_4g); 304 305 e820_add_entry(0, x86ms->below_4g_mem_size, E820_RAM); 306 307 if (x86ms->above_4g_mem_size > 0) { 308 ram_above_4g = g_malloc(sizeof(*ram_above_4g)); 309 memory_region_init_alias(ram_above_4g, NULL, "ram-above-4g", 310 machine->ram, 311 x86ms->below_4g_mem_size, 312 x86ms->above_4g_mem_size); 313 memory_region_add_subregion(system_memory, 0x100000000ULL, 314 ram_above_4g); 315 e820_add_entry(0x100000000ULL, x86ms->above_4g_mem_size, E820_RAM); 316 } 317 318 fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4, 319 &address_space_memory); 320 321 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, machine->smp.cpus); 322 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, machine->smp.max_cpus); 323 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)machine->ram_size); 324 fw_cfg_add_i32(fw_cfg, FW_CFG_IRQ0_OVERRIDE, 1); 325 fw_cfg_add_file(fw_cfg, "etc/e820", e820_table, 326 sizeof(struct e820_entry) * e820_get_num_entries()); 327 328 rom_set_fw(fw_cfg); 329 330 if (machine->kernel_filename != NULL) { 331 x86_load_linux(x86ms, fw_cfg, 0, true); 332 } 333 334 if (mms->option_roms) { 335 for (i = 0; i < nb_option_roms; i++) { 336 rom_add_option(option_rom[i].name, option_rom[i].bootindex); 337 } 338 } 339 340 x86ms->fw_cfg = fw_cfg; 341 x86ms->ioapic_as = &address_space_memory; 342 } 343 344 static gchar *microvm_get_mmio_cmdline(gchar *name, uint32_t virtio_irq_base) 345 { 346 gchar *cmdline; 347 gchar *separator; 348 long int index; 349 int ret; 350 351 separator = g_strrstr(name, "."); 352 if (!separator) { 353 return NULL; 354 } 355 356 if (qemu_strtol(separator + 1, NULL, 10, &index) != 0) { 357 return NULL; 358 } 359 360 cmdline = g_malloc0(VIRTIO_CMDLINE_MAXLEN); 361 ret = g_snprintf(cmdline, VIRTIO_CMDLINE_MAXLEN, 362 " virtio_mmio.device=512@0x%lx:%ld", 363 VIRTIO_MMIO_BASE + index * 512, 364 virtio_irq_base + index); 365 if (ret < 0 || ret >= VIRTIO_CMDLINE_MAXLEN) { 366 g_free(cmdline); 367 return NULL; 368 } 369 370 return cmdline; 371 } 372 373 static void microvm_fix_kernel_cmdline(MachineState *machine) 374 { 375 X86MachineState *x86ms = X86_MACHINE(machine); 376 MicrovmMachineState *mms = MICROVM_MACHINE(machine); 377 BusState *bus; 378 BusChild *kid; 379 char *cmdline; 380 381 /* 382 * Find MMIO transports with attached devices, and add them to the kernel 383 * command line. 384 * 385 * Yes, this is a hack, but one that heavily improves the UX without 386 * introducing any significant issues. 387 */ 388 cmdline = g_strdup(machine->kernel_cmdline); 389 bus = sysbus_get_default(); 390 QTAILQ_FOREACH(kid, &bus->children, sibling) { 391 DeviceState *dev = kid->child; 392 ObjectClass *class = object_get_class(OBJECT(dev)); 393 394 if (class == object_class_by_name(TYPE_VIRTIO_MMIO)) { 395 VirtIOMMIOProxy *mmio = VIRTIO_MMIO(OBJECT(dev)); 396 VirtioBusState *mmio_virtio_bus = &mmio->bus; 397 BusState *mmio_bus = &mmio_virtio_bus->parent_obj; 398 399 if (!QTAILQ_EMPTY(&mmio_bus->children)) { 400 gchar *mmio_cmdline = microvm_get_mmio_cmdline 401 (mmio_bus->name, mms->virtio_irq_base); 402 if (mmio_cmdline) { 403 char *newcmd = g_strjoin(NULL, cmdline, mmio_cmdline, NULL); 404 g_free(mmio_cmdline); 405 g_free(cmdline); 406 cmdline = newcmd; 407 } 408 } 409 } 410 } 411 412 fw_cfg_modify_i32(x86ms->fw_cfg, FW_CFG_CMDLINE_SIZE, strlen(cmdline) + 1); 413 fw_cfg_modify_string(x86ms->fw_cfg, FW_CFG_CMDLINE_DATA, cmdline); 414 415 g_free(cmdline); 416 } 417 418 static void microvm_device_pre_plug_cb(HotplugHandler *hotplug_dev, 419 DeviceState *dev, Error **errp) 420 { 421 X86CPU *cpu = X86_CPU(dev); 422 423 cpu->host_phys_bits = true; /* need reliable phys-bits */ 424 x86_cpu_pre_plug(hotplug_dev, dev, errp); 425 } 426 427 static void microvm_device_plug_cb(HotplugHandler *hotplug_dev, 428 DeviceState *dev, Error **errp) 429 { 430 x86_cpu_plug(hotplug_dev, dev, errp); 431 } 432 433 static void microvm_device_unplug_request_cb(HotplugHandler *hotplug_dev, 434 DeviceState *dev, Error **errp) 435 { 436 error_setg(errp, "unplug not supported by microvm"); 437 } 438 439 static void microvm_device_unplug_cb(HotplugHandler *hotplug_dev, 440 DeviceState *dev, Error **errp) 441 { 442 error_setg(errp, "unplug not supported by microvm"); 443 } 444 445 static HotplugHandler *microvm_get_hotplug_handler(MachineState *machine, 446 DeviceState *dev) 447 { 448 if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) { 449 return HOTPLUG_HANDLER(machine); 450 } 451 return NULL; 452 } 453 454 static void microvm_machine_state_init(MachineState *machine) 455 { 456 MicrovmMachineState *mms = MICROVM_MACHINE(machine); 457 X86MachineState *x86ms = X86_MACHINE(machine); 458 459 microvm_memory_init(mms); 460 461 x86_cpus_init(x86ms, CPU_VERSION_LATEST); 462 463 microvm_devices_init(mms); 464 } 465 466 static void microvm_machine_reset(MachineState *machine, ShutdownCause reason) 467 { 468 MicrovmMachineState *mms = MICROVM_MACHINE(machine); 469 CPUState *cs; 470 X86CPU *cpu; 471 472 if (!x86_machine_is_acpi_enabled(X86_MACHINE(machine)) && 473 machine->kernel_filename != NULL && 474 mms->auto_kernel_cmdline && !mms->kernel_cmdline_fixed) { 475 microvm_fix_kernel_cmdline(machine); 476 mms->kernel_cmdline_fixed = true; 477 } 478 479 qemu_devices_reset(reason); 480 481 CPU_FOREACH(cs) { 482 cpu = X86_CPU(cs); 483 484 x86_cpu_after_reset(cpu); 485 } 486 } 487 488 static void microvm_machine_get_rtc(Object *obj, Visitor *v, const char *name, 489 void *opaque, Error **errp) 490 { 491 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 492 OnOffAuto rtc = mms->rtc; 493 494 visit_type_OnOffAuto(v, name, &rtc, errp); 495 } 496 497 static void microvm_machine_set_rtc(Object *obj, Visitor *v, const char *name, 498 void *opaque, Error **errp) 499 { 500 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 501 502 visit_type_OnOffAuto(v, name, &mms->rtc, errp); 503 } 504 505 static void microvm_machine_get_pcie(Object *obj, Visitor *v, const char *name, 506 void *opaque, Error **errp) 507 { 508 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 509 OnOffAuto pcie = mms->pcie; 510 511 visit_type_OnOffAuto(v, name, &pcie, errp); 512 } 513 514 static void microvm_machine_set_pcie(Object *obj, Visitor *v, const char *name, 515 void *opaque, Error **errp) 516 { 517 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 518 519 visit_type_OnOffAuto(v, name, &mms->pcie, errp); 520 } 521 522 static void microvm_machine_get_ioapic2(Object *obj, Visitor *v, const char *name, 523 void *opaque, Error **errp) 524 { 525 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 526 OnOffAuto ioapic2 = mms->ioapic2; 527 528 visit_type_OnOffAuto(v, name, &ioapic2, errp); 529 } 530 531 static void microvm_machine_set_ioapic2(Object *obj, Visitor *v, const char *name, 532 void *opaque, Error **errp) 533 { 534 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 535 536 visit_type_OnOffAuto(v, name, &mms->ioapic2, errp); 537 } 538 539 static bool microvm_machine_get_isa_serial(Object *obj, Error **errp) 540 { 541 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 542 543 return mms->isa_serial; 544 } 545 546 static void microvm_machine_set_isa_serial(Object *obj, bool value, 547 Error **errp) 548 { 549 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 550 551 mms->isa_serial = value; 552 } 553 554 static bool microvm_machine_get_option_roms(Object *obj, Error **errp) 555 { 556 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 557 558 return mms->option_roms; 559 } 560 561 static void microvm_machine_set_option_roms(Object *obj, bool value, 562 Error **errp) 563 { 564 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 565 566 mms->option_roms = value; 567 } 568 569 static bool microvm_machine_get_auto_kernel_cmdline(Object *obj, Error **errp) 570 { 571 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 572 573 return mms->auto_kernel_cmdline; 574 } 575 576 static void microvm_machine_set_auto_kernel_cmdline(Object *obj, bool value, 577 Error **errp) 578 { 579 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 580 581 mms->auto_kernel_cmdline = value; 582 } 583 584 static void microvm_machine_done(Notifier *notifier, void *data) 585 { 586 MicrovmMachineState *mms = container_of(notifier, MicrovmMachineState, 587 machine_done); 588 589 acpi_setup_microvm(mms); 590 dt_setup_microvm(mms); 591 } 592 593 static void microvm_powerdown_req(Notifier *notifier, void *data) 594 { 595 MicrovmMachineState *mms = container_of(notifier, MicrovmMachineState, 596 powerdown_req); 597 X86MachineState *x86ms = X86_MACHINE(mms); 598 599 if (x86ms->acpi_dev) { 600 Object *obj = OBJECT(x86ms->acpi_dev); 601 AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_GET_CLASS(obj); 602 adevc->send_event(ACPI_DEVICE_IF(x86ms->acpi_dev), 603 ACPI_POWER_DOWN_STATUS); 604 } 605 } 606 607 static void microvm_machine_initfn(Object *obj) 608 { 609 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 610 611 /* Configuration */ 612 mms->rtc = ON_OFF_AUTO_AUTO; 613 mms->pcie = ON_OFF_AUTO_AUTO; 614 mms->ioapic2 = ON_OFF_AUTO_AUTO; 615 mms->isa_serial = true; 616 mms->option_roms = true; 617 mms->auto_kernel_cmdline = true; 618 619 /* State */ 620 mms->kernel_cmdline_fixed = false; 621 622 mms->machine_done.notify = microvm_machine_done; 623 qemu_add_machine_init_done_notifier(&mms->machine_done); 624 mms->powerdown_req.notify = microvm_powerdown_req; 625 qemu_register_powerdown_notifier(&mms->powerdown_req); 626 } 627 628 GlobalProperty microvm_properties[] = { 629 /* 630 * pcie host bridge (gpex) on microvm has no io address window, 631 * so reserving io space is not going to work. Turn it off. 632 */ 633 { "pcie-root-port", "io-reserve", "0" }, 634 }; 635 636 static void microvm_class_init(ObjectClass *oc, void *data) 637 { 638 X86MachineClass *x86mc = X86_MACHINE_CLASS(oc); 639 MachineClass *mc = MACHINE_CLASS(oc); 640 HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc); 641 642 mc->init = microvm_machine_state_init; 643 644 mc->family = "microvm_i386"; 645 mc->desc = "microvm (i386)"; 646 mc->units_per_default_bus = 1; 647 mc->no_floppy = 1; 648 mc->max_cpus = 288; 649 mc->has_hotpluggable_cpus = false; 650 mc->auto_enable_numa_with_memhp = false; 651 mc->auto_enable_numa_with_memdev = false; 652 mc->default_cpu_type = TARGET_DEFAULT_CPU_TYPE; 653 mc->nvdimm_supported = false; 654 mc->default_ram_id = "microvm.ram"; 655 656 /* Avoid relying too much on kernel components */ 657 mc->default_kernel_irqchip_split = true; 658 659 /* Machine class handlers */ 660 mc->reset = microvm_machine_reset; 661 662 /* hotplug (for cpu coldplug) */ 663 mc->get_hotplug_handler = microvm_get_hotplug_handler; 664 hc->pre_plug = microvm_device_pre_plug_cb; 665 hc->plug = microvm_device_plug_cb; 666 hc->unplug_request = microvm_device_unplug_request_cb; 667 hc->unplug = microvm_device_unplug_cb; 668 669 x86mc->fwcfg_dma_enabled = true; 670 671 object_class_property_add(oc, MICROVM_MACHINE_RTC, "OnOffAuto", 672 microvm_machine_get_rtc, 673 microvm_machine_set_rtc, 674 NULL, NULL); 675 object_class_property_set_description(oc, MICROVM_MACHINE_RTC, 676 "Enable MC146818 RTC"); 677 678 object_class_property_add(oc, MICROVM_MACHINE_PCIE, "OnOffAuto", 679 microvm_machine_get_pcie, 680 microvm_machine_set_pcie, 681 NULL, NULL); 682 object_class_property_set_description(oc, MICROVM_MACHINE_PCIE, 683 "Enable PCIe"); 684 685 object_class_property_add(oc, MICROVM_MACHINE_IOAPIC2, "OnOffAuto", 686 microvm_machine_get_ioapic2, 687 microvm_machine_set_ioapic2, 688 NULL, NULL); 689 object_class_property_set_description(oc, MICROVM_MACHINE_IOAPIC2, 690 "Enable second IO-APIC"); 691 692 object_class_property_add_bool(oc, MICROVM_MACHINE_ISA_SERIAL, 693 microvm_machine_get_isa_serial, 694 microvm_machine_set_isa_serial); 695 object_class_property_set_description(oc, MICROVM_MACHINE_ISA_SERIAL, 696 "Set off to disable the instantiation an ISA serial port"); 697 698 object_class_property_add_bool(oc, MICROVM_MACHINE_OPTION_ROMS, 699 microvm_machine_get_option_roms, 700 microvm_machine_set_option_roms); 701 object_class_property_set_description(oc, MICROVM_MACHINE_OPTION_ROMS, 702 "Set off to disable loading option ROMs"); 703 704 object_class_property_add_bool(oc, MICROVM_MACHINE_AUTO_KERNEL_CMDLINE, 705 microvm_machine_get_auto_kernel_cmdline, 706 microvm_machine_set_auto_kernel_cmdline); 707 object_class_property_set_description(oc, 708 MICROVM_MACHINE_AUTO_KERNEL_CMDLINE, 709 "Set off to disable adding virtio-mmio devices to the kernel cmdline"); 710 711 machine_class_allow_dynamic_sysbus_dev(mc, TYPE_RAMFB_DEVICE); 712 713 compat_props_add(mc->compat_props, microvm_properties, 714 G_N_ELEMENTS(microvm_properties)); 715 } 716 717 static const TypeInfo microvm_machine_info = { 718 .name = TYPE_MICROVM_MACHINE, 719 .parent = TYPE_X86_MACHINE, 720 .instance_size = sizeof(MicrovmMachineState), 721 .instance_init = microvm_machine_initfn, 722 .class_size = sizeof(MicrovmMachineClass), 723 .class_init = microvm_class_init, 724 .interfaces = (InterfaceInfo[]) { 725 { TYPE_HOTPLUG_HANDLER }, 726 { } 727 }, 728 }; 729 730 static void microvm_machine_init(void) 731 { 732 type_register_static(µvm_machine_info); 733 } 734 type_init(microvm_machine_init); 735