1 /* 2 * Copyright (c) 2018 Intel Corporation 3 * Copyright (c) 2019 Red Hat, Inc. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms and conditions of the GNU General Public License, 7 * version 2 or later, as published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program. If not, see <http://www.gnu.org/licenses/>. 16 */ 17 18 #include "qemu/osdep.h" 19 #include "qemu/error-report.h" 20 #include "qemu/cutils.h" 21 #include "qemu/units.h" 22 #include "qapi/error.h" 23 #include "qapi/visitor.h" 24 #include "qapi/qapi-visit-common.h" 25 #include "sysemu/sysemu.h" 26 #include "sysemu/cpus.h" 27 #include "sysemu/numa.h" 28 #include "sysemu/reset.h" 29 #include "sysemu/runstate.h" 30 #include "acpi-microvm.h" 31 32 #include "hw/loader.h" 33 #include "hw/irq.h" 34 #include "hw/kvm/clock.h" 35 #include "hw/i386/microvm.h" 36 #include "hw/i386/x86.h" 37 #include "target/i386/cpu.h" 38 #include "hw/intc/i8259.h" 39 #include "hw/timer/i8254.h" 40 #include "hw/rtc/mc146818rtc.h" 41 #include "hw/char/serial.h" 42 #include "hw/display/ramfb.h" 43 #include "hw/i386/topology.h" 44 #include "hw/i386/e820_memory_layout.h" 45 #include "hw/i386/fw_cfg.h" 46 #include "hw/virtio/virtio-mmio.h" 47 #include "hw/acpi/acpi.h" 48 #include "hw/acpi/generic_event_device.h" 49 #include "hw/pci-host/gpex.h" 50 #include "hw/usb/xhci.h" 51 52 #include "cpu.h" 53 #include "elf.h" 54 #include "kvm_i386.h" 55 #include "hw/xen/start_info.h" 56 57 #define MICROVM_QBOOT_FILENAME "qboot.rom" 58 #define MICROVM_BIOS_FILENAME "bios-microvm.bin" 59 60 static void microvm_set_rtc(MicrovmMachineState *mms, ISADevice *s) 61 { 62 X86MachineState *x86ms = X86_MACHINE(mms); 63 int val; 64 65 val = MIN(x86ms->below_4g_mem_size / KiB, 640); 66 rtc_set_memory(s, 0x15, val); 67 rtc_set_memory(s, 0x16, val >> 8); 68 /* extended memory (next 64MiB) */ 69 if (x86ms->below_4g_mem_size > 1 * MiB) { 70 val = (x86ms->below_4g_mem_size - 1 * MiB) / KiB; 71 } else { 72 val = 0; 73 } 74 if (val > 65535) { 75 val = 65535; 76 } 77 rtc_set_memory(s, 0x17, val); 78 rtc_set_memory(s, 0x18, val >> 8); 79 rtc_set_memory(s, 0x30, val); 80 rtc_set_memory(s, 0x31, val >> 8); 81 /* memory between 16MiB and 4GiB */ 82 if (x86ms->below_4g_mem_size > 16 * MiB) { 83 val = (x86ms->below_4g_mem_size - 16 * MiB) / (64 * KiB); 84 } else { 85 val = 0; 86 } 87 if (val > 65535) { 88 val = 65535; 89 } 90 rtc_set_memory(s, 0x34, val); 91 rtc_set_memory(s, 0x35, val >> 8); 92 /* memory above 4GiB */ 93 val = x86ms->above_4g_mem_size / 65536; 94 rtc_set_memory(s, 0x5b, val); 95 rtc_set_memory(s, 0x5c, val >> 8); 96 rtc_set_memory(s, 0x5d, val >> 16); 97 } 98 99 static void microvm_gsi_handler(void *opaque, int n, int level) 100 { 101 GSIState *s = opaque; 102 103 qemu_set_irq(s->ioapic_irq[n], level); 104 } 105 106 static void create_gpex(MicrovmMachineState *mms) 107 { 108 X86MachineState *x86ms = X86_MACHINE(mms); 109 MemoryRegion *mmio32_alias; 110 MemoryRegion *mmio64_alias; 111 MemoryRegion *mmio_reg; 112 MemoryRegion *ecam_alias; 113 MemoryRegion *ecam_reg; 114 DeviceState *dev; 115 int i; 116 117 dev = qdev_new(TYPE_GPEX_HOST); 118 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 119 120 /* Map only the first size_ecam bytes of ECAM space */ 121 ecam_alias = g_new0(MemoryRegion, 1); 122 ecam_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0); 123 memory_region_init_alias(ecam_alias, OBJECT(dev), "pcie-ecam", 124 ecam_reg, 0, mms->gpex.ecam.size); 125 memory_region_add_subregion(get_system_memory(), 126 mms->gpex.ecam.base, ecam_alias); 127 128 /* Map the MMIO window into system address space so as to expose 129 * the section of PCI MMIO space which starts at the same base address 130 * (ie 1:1 mapping for that part of PCI MMIO space visible through 131 * the window). 132 */ 133 mmio_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 1); 134 if (mms->gpex.mmio32.size) { 135 mmio32_alias = g_new0(MemoryRegion, 1); 136 memory_region_init_alias(mmio32_alias, OBJECT(dev), "pcie-mmio32", mmio_reg, 137 mms->gpex.mmio32.base, mms->gpex.mmio32.size); 138 memory_region_add_subregion(get_system_memory(), 139 mms->gpex.mmio32.base, mmio32_alias); 140 } 141 if (mms->gpex.mmio64.size) { 142 mmio64_alias = g_new0(MemoryRegion, 1); 143 memory_region_init_alias(mmio64_alias, OBJECT(dev), "pcie-mmio64", mmio_reg, 144 mms->gpex.mmio64.base, mms->gpex.mmio64.size); 145 memory_region_add_subregion(get_system_memory(), 146 mms->gpex.mmio64.base, mmio64_alias); 147 } 148 149 for (i = 0; i < GPEX_NUM_IRQS; i++) { 150 sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, 151 x86ms->gsi[mms->gpex.irq + i]); 152 } 153 } 154 155 static void microvm_devices_init(MicrovmMachineState *mms) 156 { 157 X86MachineState *x86ms = X86_MACHINE(mms); 158 ISABus *isa_bus; 159 ISADevice *rtc_state; 160 GSIState *gsi_state; 161 int i; 162 163 /* Core components */ 164 165 gsi_state = g_malloc0(sizeof(*gsi_state)); 166 if (mms->pic == ON_OFF_AUTO_ON || mms->pic == ON_OFF_AUTO_AUTO) { 167 x86ms->gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS); 168 } else { 169 x86ms->gsi = qemu_allocate_irqs(microvm_gsi_handler, 170 gsi_state, GSI_NUM_PINS); 171 } 172 173 isa_bus = isa_bus_new(NULL, get_system_memory(), get_system_io(), 174 &error_abort); 175 isa_bus_irqs(isa_bus, x86ms->gsi); 176 177 ioapic_init_gsi(gsi_state, "machine"); 178 179 kvmclock_create(true); 180 181 mms->virtio_irq_base = x86_machine_is_acpi_enabled(x86ms) ? 16 : 5; 182 for (i = 0; i < VIRTIO_NUM_TRANSPORTS; i++) { 183 sysbus_create_simple("virtio-mmio", 184 VIRTIO_MMIO_BASE + i * 512, 185 x86ms->gsi[mms->virtio_irq_base + i]); 186 } 187 188 /* Optional and legacy devices */ 189 if (x86_machine_is_acpi_enabled(x86ms)) { 190 DeviceState *dev = qdev_new(TYPE_ACPI_GED_X86); 191 qdev_prop_set_uint32(dev, "ged-event", ACPI_GED_PWR_DOWN_EVT); 192 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, GED_MMIO_BASE); 193 /* sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, GED_MMIO_BASE_MEMHP); */ 194 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, GED_MMIO_BASE_REGS); 195 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, 196 x86ms->gsi[GED_MMIO_IRQ]); 197 sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal); 198 x86ms->acpi_dev = HOTPLUG_HANDLER(dev); 199 } 200 201 if (x86_machine_is_acpi_enabled(x86ms) && machine_usb(MACHINE(mms))) { 202 DeviceState *dev = qdev_new(TYPE_XHCI_SYSBUS); 203 qdev_prop_set_uint32(dev, "intrs", 1); 204 qdev_prop_set_uint32(dev, "slots", XHCI_MAXSLOTS); 205 qdev_prop_set_uint32(dev, "p2", 8); 206 qdev_prop_set_uint32(dev, "p3", 8); 207 sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal); 208 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, MICROVM_XHCI_BASE); 209 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, 210 x86ms->gsi[MICROVM_XHCI_IRQ]); 211 } 212 213 if (x86_machine_is_acpi_enabled(x86ms) && mms->pcie == ON_OFF_AUTO_ON) { 214 /* use topmost 25% of the address space available */ 215 hwaddr phys_size = (hwaddr)1 << X86_CPU(first_cpu)->phys_bits; 216 if (phys_size > 0x1000000ll) { 217 mms->gpex.mmio64.size = phys_size / 4; 218 mms->gpex.mmio64.base = phys_size - mms->gpex.mmio64.size; 219 } 220 mms->gpex.mmio32.base = PCIE_MMIO_BASE; 221 mms->gpex.mmio32.size = PCIE_MMIO_SIZE; 222 mms->gpex.ecam.base = PCIE_ECAM_BASE; 223 mms->gpex.ecam.size = PCIE_ECAM_SIZE; 224 mms->gpex.irq = PCIE_IRQ_BASE; 225 create_gpex(mms); 226 x86ms->pci_irq_mask = ((1 << (PCIE_IRQ_BASE + 0)) | 227 (1 << (PCIE_IRQ_BASE + 1)) | 228 (1 << (PCIE_IRQ_BASE + 2)) | 229 (1 << (PCIE_IRQ_BASE + 3))); 230 } else { 231 x86ms->pci_irq_mask = 0; 232 } 233 234 if (mms->pic == ON_OFF_AUTO_ON || mms->pic == ON_OFF_AUTO_AUTO) { 235 qemu_irq *i8259; 236 237 i8259 = i8259_init(isa_bus, x86_allocate_cpu_irq()); 238 for (i = 0; i < ISA_NUM_IRQS; i++) { 239 gsi_state->i8259_irq[i] = i8259[i]; 240 } 241 g_free(i8259); 242 } 243 244 if (mms->pit == ON_OFF_AUTO_ON || mms->pit == ON_OFF_AUTO_AUTO) { 245 if (kvm_pit_in_kernel()) { 246 kvm_pit_init(isa_bus, 0x40); 247 } else { 248 i8254_pit_init(isa_bus, 0x40, 0, NULL); 249 } 250 } 251 252 if (mms->rtc == ON_OFF_AUTO_ON || 253 (mms->rtc == ON_OFF_AUTO_AUTO && !kvm_enabled())) { 254 rtc_state = mc146818_rtc_init(isa_bus, 2000, NULL); 255 microvm_set_rtc(mms, rtc_state); 256 } 257 258 if (mms->isa_serial) { 259 serial_hds_isa_init(isa_bus, 0, 1); 260 } 261 262 if (bios_name == NULL) { 263 bios_name = x86_machine_is_acpi_enabled(x86ms) 264 ? MICROVM_BIOS_FILENAME 265 : MICROVM_QBOOT_FILENAME; 266 } 267 x86_bios_rom_init(get_system_memory(), true); 268 } 269 270 static void microvm_memory_init(MicrovmMachineState *mms) 271 { 272 MachineState *machine = MACHINE(mms); 273 X86MachineState *x86ms = X86_MACHINE(mms); 274 MemoryRegion *ram_below_4g, *ram_above_4g; 275 MemoryRegion *system_memory = get_system_memory(); 276 FWCfgState *fw_cfg; 277 ram_addr_t lowmem = 0xc0000000; /* 3G */ 278 int i; 279 280 if (machine->ram_size > lowmem) { 281 x86ms->above_4g_mem_size = machine->ram_size - lowmem; 282 x86ms->below_4g_mem_size = lowmem; 283 } else { 284 x86ms->above_4g_mem_size = 0; 285 x86ms->below_4g_mem_size = machine->ram_size; 286 } 287 288 ram_below_4g = g_malloc(sizeof(*ram_below_4g)); 289 memory_region_init_alias(ram_below_4g, NULL, "ram-below-4g", machine->ram, 290 0, x86ms->below_4g_mem_size); 291 memory_region_add_subregion(system_memory, 0, ram_below_4g); 292 293 e820_add_entry(0, x86ms->below_4g_mem_size, E820_RAM); 294 295 if (x86ms->above_4g_mem_size > 0) { 296 ram_above_4g = g_malloc(sizeof(*ram_above_4g)); 297 memory_region_init_alias(ram_above_4g, NULL, "ram-above-4g", 298 machine->ram, 299 x86ms->below_4g_mem_size, 300 x86ms->above_4g_mem_size); 301 memory_region_add_subregion(system_memory, 0x100000000ULL, 302 ram_above_4g); 303 e820_add_entry(0x100000000ULL, x86ms->above_4g_mem_size, E820_RAM); 304 } 305 306 fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4, 307 &address_space_memory); 308 309 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, machine->smp.cpus); 310 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, machine->smp.max_cpus); 311 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)machine->ram_size); 312 fw_cfg_add_i32(fw_cfg, FW_CFG_IRQ0_OVERRIDE, 1); 313 fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE, 314 &e820_reserve, sizeof(e820_reserve)); 315 fw_cfg_add_file(fw_cfg, "etc/e820", e820_table, 316 sizeof(struct e820_entry) * e820_get_num_entries()); 317 318 rom_set_fw(fw_cfg); 319 320 if (machine->kernel_filename != NULL) { 321 x86_load_linux(x86ms, fw_cfg, 0, true, true); 322 } 323 324 if (mms->option_roms) { 325 for (i = 0; i < nb_option_roms; i++) { 326 rom_add_option(option_rom[i].name, option_rom[i].bootindex); 327 } 328 } 329 330 x86ms->fw_cfg = fw_cfg; 331 x86ms->ioapic_as = &address_space_memory; 332 } 333 334 static gchar *microvm_get_mmio_cmdline(gchar *name, uint32_t virtio_irq_base) 335 { 336 gchar *cmdline; 337 gchar *separator; 338 long int index; 339 int ret; 340 341 separator = g_strrstr(name, "."); 342 if (!separator) { 343 return NULL; 344 } 345 346 if (qemu_strtol(separator + 1, NULL, 10, &index) != 0) { 347 return NULL; 348 } 349 350 cmdline = g_malloc0(VIRTIO_CMDLINE_MAXLEN); 351 ret = g_snprintf(cmdline, VIRTIO_CMDLINE_MAXLEN, 352 " virtio_mmio.device=512@0x%lx:%ld", 353 VIRTIO_MMIO_BASE + index * 512, 354 virtio_irq_base + index); 355 if (ret < 0 || ret >= VIRTIO_CMDLINE_MAXLEN) { 356 g_free(cmdline); 357 return NULL; 358 } 359 360 return cmdline; 361 } 362 363 static void microvm_fix_kernel_cmdline(MachineState *machine) 364 { 365 X86MachineState *x86ms = X86_MACHINE(machine); 366 MicrovmMachineState *mms = MICROVM_MACHINE(machine); 367 BusState *bus; 368 BusChild *kid; 369 char *cmdline; 370 371 /* 372 * Find MMIO transports with attached devices, and add them to the kernel 373 * command line. 374 * 375 * Yes, this is a hack, but one that heavily improves the UX without 376 * introducing any significant issues. 377 */ 378 cmdline = g_strdup(machine->kernel_cmdline); 379 bus = sysbus_get_default(); 380 QTAILQ_FOREACH(kid, &bus->children, sibling) { 381 DeviceState *dev = kid->child; 382 ObjectClass *class = object_get_class(OBJECT(dev)); 383 384 if (class == object_class_by_name(TYPE_VIRTIO_MMIO)) { 385 VirtIOMMIOProxy *mmio = VIRTIO_MMIO(OBJECT(dev)); 386 VirtioBusState *mmio_virtio_bus = &mmio->bus; 387 BusState *mmio_bus = &mmio_virtio_bus->parent_obj; 388 389 if (!QTAILQ_EMPTY(&mmio_bus->children)) { 390 gchar *mmio_cmdline = microvm_get_mmio_cmdline 391 (mmio_bus->name, mms->virtio_irq_base); 392 if (mmio_cmdline) { 393 char *newcmd = g_strjoin(NULL, cmdline, mmio_cmdline, NULL); 394 g_free(mmio_cmdline); 395 g_free(cmdline); 396 cmdline = newcmd; 397 } 398 } 399 } 400 } 401 402 fw_cfg_modify_i32(x86ms->fw_cfg, FW_CFG_CMDLINE_SIZE, strlen(cmdline) + 1); 403 fw_cfg_modify_string(x86ms->fw_cfg, FW_CFG_CMDLINE_DATA, cmdline); 404 405 g_free(cmdline); 406 } 407 408 static void microvm_device_pre_plug_cb(HotplugHandler *hotplug_dev, 409 DeviceState *dev, Error **errp) 410 { 411 X86CPU *cpu = X86_CPU(dev); 412 413 cpu->host_phys_bits = true; /* need reliable phys-bits */ 414 x86_cpu_pre_plug(hotplug_dev, dev, errp); 415 } 416 417 static void microvm_device_plug_cb(HotplugHandler *hotplug_dev, 418 DeviceState *dev, Error **errp) 419 { 420 x86_cpu_plug(hotplug_dev, dev, errp); 421 } 422 423 static void microvm_device_unplug_request_cb(HotplugHandler *hotplug_dev, 424 DeviceState *dev, Error **errp) 425 { 426 error_setg(errp, "unplug not supported by microvm"); 427 } 428 429 static void microvm_device_unplug_cb(HotplugHandler *hotplug_dev, 430 DeviceState *dev, Error **errp) 431 { 432 error_setg(errp, "unplug not supported by microvm"); 433 } 434 435 static HotplugHandler *microvm_get_hotplug_handler(MachineState *machine, 436 DeviceState *dev) 437 { 438 if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) { 439 return HOTPLUG_HANDLER(machine); 440 } 441 return NULL; 442 } 443 444 static void microvm_machine_state_init(MachineState *machine) 445 { 446 MicrovmMachineState *mms = MICROVM_MACHINE(machine); 447 X86MachineState *x86ms = X86_MACHINE(machine); 448 Error *local_err = NULL; 449 450 microvm_memory_init(mms); 451 452 x86_cpus_init(x86ms, CPU_VERSION_LATEST); 453 if (local_err) { 454 error_report_err(local_err); 455 exit(1); 456 } 457 458 microvm_devices_init(mms); 459 } 460 461 static void microvm_machine_reset(MachineState *machine) 462 { 463 MicrovmMachineState *mms = MICROVM_MACHINE(machine); 464 CPUState *cs; 465 X86CPU *cpu; 466 467 if (!x86_machine_is_acpi_enabled(X86_MACHINE(machine)) && 468 machine->kernel_filename != NULL && 469 mms->auto_kernel_cmdline && !mms->kernel_cmdline_fixed) { 470 microvm_fix_kernel_cmdline(machine); 471 mms->kernel_cmdline_fixed = true; 472 } 473 474 qemu_devices_reset(); 475 476 CPU_FOREACH(cs) { 477 cpu = X86_CPU(cs); 478 479 if (cpu->apic_state) { 480 device_legacy_reset(cpu->apic_state); 481 } 482 } 483 } 484 485 static void microvm_machine_get_pic(Object *obj, Visitor *v, const char *name, 486 void *opaque, Error **errp) 487 { 488 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 489 OnOffAuto pic = mms->pic; 490 491 visit_type_OnOffAuto(v, name, &pic, errp); 492 } 493 494 static void microvm_machine_set_pic(Object *obj, Visitor *v, const char *name, 495 void *opaque, Error **errp) 496 { 497 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 498 499 visit_type_OnOffAuto(v, name, &mms->pic, errp); 500 } 501 502 static void microvm_machine_get_pit(Object *obj, Visitor *v, const char *name, 503 void *opaque, Error **errp) 504 { 505 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 506 OnOffAuto pit = mms->pit; 507 508 visit_type_OnOffAuto(v, name, &pit, errp); 509 } 510 511 static void microvm_machine_set_pit(Object *obj, Visitor *v, const char *name, 512 void *opaque, Error **errp) 513 { 514 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 515 516 visit_type_OnOffAuto(v, name, &mms->pit, errp); 517 } 518 519 static void microvm_machine_get_rtc(Object *obj, Visitor *v, const char *name, 520 void *opaque, Error **errp) 521 { 522 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 523 OnOffAuto rtc = mms->rtc; 524 525 visit_type_OnOffAuto(v, name, &rtc, errp); 526 } 527 528 static void microvm_machine_set_rtc(Object *obj, Visitor *v, const char *name, 529 void *opaque, Error **errp) 530 { 531 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 532 533 visit_type_OnOffAuto(v, name, &mms->rtc, errp); 534 } 535 536 static void microvm_machine_get_pcie(Object *obj, Visitor *v, const char *name, 537 void *opaque, Error **errp) 538 { 539 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 540 OnOffAuto pcie = mms->pcie; 541 542 visit_type_OnOffAuto(v, name, &pcie, errp); 543 } 544 545 static void microvm_machine_set_pcie(Object *obj, Visitor *v, const char *name, 546 void *opaque, Error **errp) 547 { 548 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 549 550 visit_type_OnOffAuto(v, name, &mms->pcie, errp); 551 } 552 553 static bool microvm_machine_get_isa_serial(Object *obj, Error **errp) 554 { 555 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 556 557 return mms->isa_serial; 558 } 559 560 static void microvm_machine_set_isa_serial(Object *obj, bool value, 561 Error **errp) 562 { 563 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 564 565 mms->isa_serial = value; 566 } 567 568 static bool microvm_machine_get_option_roms(Object *obj, Error **errp) 569 { 570 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 571 572 return mms->option_roms; 573 } 574 575 static void microvm_machine_set_option_roms(Object *obj, bool value, 576 Error **errp) 577 { 578 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 579 580 mms->option_roms = value; 581 } 582 583 static bool microvm_machine_get_auto_kernel_cmdline(Object *obj, Error **errp) 584 { 585 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 586 587 return mms->auto_kernel_cmdline; 588 } 589 590 static void microvm_machine_set_auto_kernel_cmdline(Object *obj, bool value, 591 Error **errp) 592 { 593 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 594 595 mms->auto_kernel_cmdline = value; 596 } 597 598 static void microvm_machine_done(Notifier *notifier, void *data) 599 { 600 MicrovmMachineState *mms = container_of(notifier, MicrovmMachineState, 601 machine_done); 602 603 acpi_setup_microvm(mms); 604 } 605 606 static void microvm_powerdown_req(Notifier *notifier, void *data) 607 { 608 MicrovmMachineState *mms = container_of(notifier, MicrovmMachineState, 609 powerdown_req); 610 X86MachineState *x86ms = X86_MACHINE(mms); 611 612 if (x86ms->acpi_dev) { 613 Object *obj = OBJECT(x86ms->acpi_dev); 614 AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_GET_CLASS(obj); 615 adevc->send_event(ACPI_DEVICE_IF(x86ms->acpi_dev), 616 ACPI_POWER_DOWN_STATUS); 617 } 618 } 619 620 static void microvm_machine_initfn(Object *obj) 621 { 622 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 623 624 /* Configuration */ 625 mms->pic = ON_OFF_AUTO_AUTO; 626 mms->pit = ON_OFF_AUTO_AUTO; 627 mms->rtc = ON_OFF_AUTO_AUTO; 628 mms->pcie = ON_OFF_AUTO_AUTO; 629 mms->isa_serial = true; 630 mms->option_roms = true; 631 mms->auto_kernel_cmdline = true; 632 633 /* State */ 634 mms->kernel_cmdline_fixed = false; 635 636 mms->machine_done.notify = microvm_machine_done; 637 qemu_add_machine_init_done_notifier(&mms->machine_done); 638 mms->powerdown_req.notify = microvm_powerdown_req; 639 qemu_register_powerdown_notifier(&mms->powerdown_req); 640 } 641 642 static void microvm_class_init(ObjectClass *oc, void *data) 643 { 644 MachineClass *mc = MACHINE_CLASS(oc); 645 HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc); 646 647 mc->init = microvm_machine_state_init; 648 649 mc->family = "microvm_i386"; 650 mc->desc = "microvm (i386)"; 651 mc->units_per_default_bus = 1; 652 mc->no_floppy = 1; 653 mc->max_cpus = 288; 654 mc->has_hotpluggable_cpus = false; 655 mc->auto_enable_numa_with_memhp = false; 656 mc->auto_enable_numa_with_memdev = false; 657 mc->default_cpu_type = TARGET_DEFAULT_CPU_TYPE; 658 mc->nvdimm_supported = false; 659 mc->default_ram_id = "microvm.ram"; 660 661 /* Avoid relying too much on kernel components */ 662 mc->default_kernel_irqchip_split = true; 663 664 /* Machine class handlers */ 665 mc->reset = microvm_machine_reset; 666 667 /* hotplug (for cpu coldplug) */ 668 mc->get_hotplug_handler = microvm_get_hotplug_handler; 669 hc->pre_plug = microvm_device_pre_plug_cb; 670 hc->plug = microvm_device_plug_cb; 671 hc->unplug_request = microvm_device_unplug_request_cb; 672 hc->unplug = microvm_device_unplug_cb; 673 674 object_class_property_add(oc, MICROVM_MACHINE_PIC, "OnOffAuto", 675 microvm_machine_get_pic, 676 microvm_machine_set_pic, 677 NULL, NULL); 678 object_class_property_set_description(oc, MICROVM_MACHINE_PIC, 679 "Enable i8259 PIC"); 680 681 object_class_property_add(oc, MICROVM_MACHINE_PIT, "OnOffAuto", 682 microvm_machine_get_pit, 683 microvm_machine_set_pit, 684 NULL, NULL); 685 object_class_property_set_description(oc, MICROVM_MACHINE_PIT, 686 "Enable i8254 PIT"); 687 688 object_class_property_add(oc, MICROVM_MACHINE_RTC, "OnOffAuto", 689 microvm_machine_get_rtc, 690 microvm_machine_set_rtc, 691 NULL, NULL); 692 object_class_property_set_description(oc, MICROVM_MACHINE_RTC, 693 "Enable MC146818 RTC"); 694 695 object_class_property_add(oc, MICROVM_MACHINE_PCIE, "OnOffAuto", 696 microvm_machine_get_pcie, 697 microvm_machine_set_pcie, 698 NULL, NULL); 699 object_class_property_set_description(oc, MICROVM_MACHINE_PCIE, 700 "Enable PCIe"); 701 702 object_class_property_add_bool(oc, MICROVM_MACHINE_ISA_SERIAL, 703 microvm_machine_get_isa_serial, 704 microvm_machine_set_isa_serial); 705 object_class_property_set_description(oc, MICROVM_MACHINE_ISA_SERIAL, 706 "Set off to disable the instantiation an ISA serial port"); 707 708 object_class_property_add_bool(oc, MICROVM_MACHINE_OPTION_ROMS, 709 microvm_machine_get_option_roms, 710 microvm_machine_set_option_roms); 711 object_class_property_set_description(oc, MICROVM_MACHINE_OPTION_ROMS, 712 "Set off to disable loading option ROMs"); 713 714 object_class_property_add_bool(oc, MICROVM_MACHINE_AUTO_KERNEL_CMDLINE, 715 microvm_machine_get_auto_kernel_cmdline, 716 microvm_machine_set_auto_kernel_cmdline); 717 object_class_property_set_description(oc, 718 MICROVM_MACHINE_AUTO_KERNEL_CMDLINE, 719 "Set off to disable adding virtio-mmio devices to the kernel cmdline"); 720 721 machine_class_allow_dynamic_sysbus_dev(mc, TYPE_RAMFB_DEVICE); 722 } 723 724 static const TypeInfo microvm_machine_info = { 725 .name = TYPE_MICROVM_MACHINE, 726 .parent = TYPE_X86_MACHINE, 727 .instance_size = sizeof(MicrovmMachineState), 728 .instance_init = microvm_machine_initfn, 729 .class_size = sizeof(MicrovmMachineClass), 730 .class_init = microvm_class_init, 731 .interfaces = (InterfaceInfo[]) { 732 { TYPE_HOTPLUG_HANDLER }, 733 { } 734 }, 735 }; 736 737 static void microvm_machine_init(void) 738 { 739 type_register_static(µvm_machine_info); 740 } 741 type_init(microvm_machine_init); 742