1 /* 2 * Copyright (c) 2018 Intel Corporation 3 * Copyright (c) 2019 Red Hat, Inc. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms and conditions of the GNU General Public License, 7 * version 2 or later, as published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program. If not, see <http://www.gnu.org/licenses/>. 16 */ 17 18 #include "qemu/osdep.h" 19 #include "qemu/error-report.h" 20 #include "qemu/cutils.h" 21 #include "qemu/units.h" 22 #include "qapi/error.h" 23 #include "qapi/visitor.h" 24 #include "qapi/qapi-visit-common.h" 25 #include "sysemu/sysemu.h" 26 #include "sysemu/cpus.h" 27 #include "sysemu/numa.h" 28 #include "sysemu/reset.h" 29 30 #include "hw/loader.h" 31 #include "hw/irq.h" 32 #include "hw/kvm/clock.h" 33 #include "hw/i386/microvm.h" 34 #include "hw/i386/x86.h" 35 #include "hw/i386/pc.h" 36 #include "target/i386/cpu.h" 37 #include "hw/intc/i8259.h" 38 #include "hw/timer/i8254.h" 39 #include "hw/rtc/mc146818rtc.h" 40 #include "hw/char/serial.h" 41 #include "hw/i386/topology.h" 42 #include "hw/i386/e820_memory_layout.h" 43 #include "hw/i386/fw_cfg.h" 44 #include "hw/virtio/virtio-mmio.h" 45 46 #include "cpu.h" 47 #include "elf.h" 48 #include "kvm_i386.h" 49 #include "hw/xen/start_info.h" 50 51 #define MICROVM_BIOS_FILENAME "bios-microvm.bin" 52 53 static void microvm_set_rtc(MicrovmMachineState *mms, ISADevice *s) 54 { 55 X86MachineState *x86ms = X86_MACHINE(mms); 56 int val; 57 58 val = MIN(x86ms->below_4g_mem_size / KiB, 640); 59 rtc_set_memory(s, 0x15, val); 60 rtc_set_memory(s, 0x16, val >> 8); 61 /* extended memory (next 64MiB) */ 62 if (x86ms->below_4g_mem_size > 1 * MiB) { 63 val = (x86ms->below_4g_mem_size - 1 * MiB) / KiB; 64 } else { 65 val = 0; 66 } 67 if (val > 65535) { 68 val = 65535; 69 } 70 rtc_set_memory(s, 0x17, val); 71 rtc_set_memory(s, 0x18, val >> 8); 72 rtc_set_memory(s, 0x30, val); 73 rtc_set_memory(s, 0x31, val >> 8); 74 /* memory between 16MiB and 4GiB */ 75 if (x86ms->below_4g_mem_size > 16 * MiB) { 76 val = (x86ms->below_4g_mem_size - 16 * MiB) / (64 * KiB); 77 } else { 78 val = 0; 79 } 80 if (val > 65535) { 81 val = 65535; 82 } 83 rtc_set_memory(s, 0x34, val); 84 rtc_set_memory(s, 0x35, val >> 8); 85 /* memory above 4GiB */ 86 val = x86ms->above_4g_mem_size / 65536; 87 rtc_set_memory(s, 0x5b, val); 88 rtc_set_memory(s, 0x5c, val >> 8); 89 rtc_set_memory(s, 0x5d, val >> 16); 90 } 91 92 static void microvm_gsi_handler(void *opaque, int n, int level) 93 { 94 GSIState *s = opaque; 95 96 qemu_set_irq(s->ioapic_irq[n], level); 97 } 98 99 static void microvm_devices_init(MicrovmMachineState *mms) 100 { 101 X86MachineState *x86ms = X86_MACHINE(mms); 102 ISABus *isa_bus; 103 ISADevice *rtc_state; 104 GSIState *gsi_state; 105 int i; 106 107 /* Core components */ 108 109 gsi_state = g_malloc0(sizeof(*gsi_state)); 110 if (mms->pic == ON_OFF_AUTO_ON || mms->pic == ON_OFF_AUTO_AUTO) { 111 x86ms->gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS); 112 } else { 113 x86ms->gsi = qemu_allocate_irqs(microvm_gsi_handler, 114 gsi_state, GSI_NUM_PINS); 115 } 116 117 isa_bus = isa_bus_new(NULL, get_system_memory(), get_system_io(), 118 &error_abort); 119 isa_bus_irqs(isa_bus, x86ms->gsi); 120 121 ioapic_init_gsi(gsi_state, "machine"); 122 123 kvmclock_create(); 124 125 for (i = 0; i < VIRTIO_NUM_TRANSPORTS; i++) { 126 sysbus_create_simple("virtio-mmio", 127 VIRTIO_MMIO_BASE + i * 512, 128 x86ms->gsi[VIRTIO_IRQ_BASE + i]); 129 } 130 131 /* Optional and legacy devices */ 132 133 if (mms->pic == ON_OFF_AUTO_ON || mms->pic == ON_OFF_AUTO_AUTO) { 134 qemu_irq *i8259; 135 136 i8259 = i8259_init(isa_bus, pc_allocate_cpu_irq()); 137 for (i = 0; i < ISA_NUM_IRQS; i++) { 138 gsi_state->i8259_irq[i] = i8259[i]; 139 } 140 g_free(i8259); 141 } 142 143 if (mms->pit == ON_OFF_AUTO_ON || mms->pit == ON_OFF_AUTO_AUTO) { 144 if (kvm_pit_in_kernel()) { 145 kvm_pit_init(isa_bus, 0x40); 146 } else { 147 i8254_pit_init(isa_bus, 0x40, 0, NULL); 148 } 149 } 150 151 if (mms->rtc == ON_OFF_AUTO_ON || 152 (mms->rtc == ON_OFF_AUTO_AUTO && !kvm_enabled())) { 153 rtc_state = mc146818_rtc_init(isa_bus, 2000, NULL); 154 microvm_set_rtc(mms, rtc_state); 155 } 156 157 if (mms->isa_serial) { 158 serial_hds_isa_init(isa_bus, 0, 1); 159 } 160 161 if (bios_name == NULL) { 162 bios_name = MICROVM_BIOS_FILENAME; 163 } 164 x86_bios_rom_init(get_system_memory(), true); 165 } 166 167 static void microvm_memory_init(MicrovmMachineState *mms) 168 { 169 MachineState *machine = MACHINE(mms); 170 X86MachineState *x86ms = X86_MACHINE(mms); 171 MemoryRegion *ram, *ram_below_4g, *ram_above_4g; 172 MemoryRegion *system_memory = get_system_memory(); 173 FWCfgState *fw_cfg; 174 ram_addr_t lowmem; 175 int i; 176 177 /* 178 * Check whether RAM fits below 4G (leaving 1/2 GByte for IO memory 179 * and 256 Mbytes for PCI Express Enhanced Configuration Access Mapping 180 * also known as MMCFG). 181 * If it doesn't, we need to split it in chunks below and above 4G. 182 * In any case, try to make sure that guest addresses aligned at 183 * 1G boundaries get mapped to host addresses aligned at 1G boundaries. 184 */ 185 if (machine->ram_size >= 0xb0000000) { 186 lowmem = 0x80000000; 187 } else { 188 lowmem = 0xb0000000; 189 } 190 191 /* 192 * Handle the machine opt max-ram-below-4g. It is basically doing 193 * min(qemu limit, user limit). 194 */ 195 if (!x86ms->max_ram_below_4g) { 196 x86ms->max_ram_below_4g = 4 * GiB; 197 } 198 if (lowmem > x86ms->max_ram_below_4g) { 199 lowmem = x86ms->max_ram_below_4g; 200 if (machine->ram_size - lowmem > lowmem && 201 lowmem & (1 * GiB - 1)) { 202 warn_report("There is possibly poor performance as the ram size " 203 " (0x%" PRIx64 ") is more then twice the size of" 204 " max-ram-below-4g (%"PRIu64") and" 205 " max-ram-below-4g is not a multiple of 1G.", 206 (uint64_t)machine->ram_size, x86ms->max_ram_below_4g); 207 } 208 } 209 210 if (machine->ram_size > lowmem) { 211 x86ms->above_4g_mem_size = machine->ram_size - lowmem; 212 x86ms->below_4g_mem_size = lowmem; 213 } else { 214 x86ms->above_4g_mem_size = 0; 215 x86ms->below_4g_mem_size = machine->ram_size; 216 } 217 218 ram = g_malloc(sizeof(*ram)); 219 memory_region_allocate_system_memory(ram, NULL, "microvm.ram", 220 machine->ram_size); 221 222 ram_below_4g = g_malloc(sizeof(*ram_below_4g)); 223 memory_region_init_alias(ram_below_4g, NULL, "ram-below-4g", ram, 224 0, x86ms->below_4g_mem_size); 225 memory_region_add_subregion(system_memory, 0, ram_below_4g); 226 227 e820_add_entry(0, x86ms->below_4g_mem_size, E820_RAM); 228 229 if (x86ms->above_4g_mem_size > 0) { 230 ram_above_4g = g_malloc(sizeof(*ram_above_4g)); 231 memory_region_init_alias(ram_above_4g, NULL, "ram-above-4g", ram, 232 x86ms->below_4g_mem_size, 233 x86ms->above_4g_mem_size); 234 memory_region_add_subregion(system_memory, 0x100000000ULL, 235 ram_above_4g); 236 e820_add_entry(0x100000000ULL, x86ms->above_4g_mem_size, E820_RAM); 237 } 238 239 fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4, 240 &address_space_memory); 241 242 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, machine->smp.cpus); 243 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, machine->smp.max_cpus); 244 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)machine->ram_size); 245 fw_cfg_add_i32(fw_cfg, FW_CFG_IRQ0_OVERRIDE, kvm_allows_irq0_override()); 246 fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE, 247 &e820_reserve, sizeof(e820_reserve)); 248 fw_cfg_add_file(fw_cfg, "etc/e820", e820_table, 249 sizeof(struct e820_entry) * e820_get_num_entries()); 250 251 rom_set_fw(fw_cfg); 252 253 if (machine->kernel_filename != NULL) { 254 x86_load_linux(x86ms, fw_cfg, 0, true, true); 255 } 256 257 if (mms->option_roms) { 258 for (i = 0; i < nb_option_roms; i++) { 259 rom_add_option(option_rom[i].name, option_rom[i].bootindex); 260 } 261 } 262 263 x86ms->fw_cfg = fw_cfg; 264 x86ms->ioapic_as = &address_space_memory; 265 } 266 267 static gchar *microvm_get_mmio_cmdline(gchar *name) 268 { 269 gchar *cmdline; 270 gchar *separator; 271 long int index; 272 int ret; 273 274 separator = g_strrstr(name, "."); 275 if (!separator) { 276 return NULL; 277 } 278 279 if (qemu_strtol(separator + 1, NULL, 10, &index) != 0) { 280 return NULL; 281 } 282 283 cmdline = g_malloc0(VIRTIO_CMDLINE_MAXLEN); 284 ret = g_snprintf(cmdline, VIRTIO_CMDLINE_MAXLEN, 285 " virtio_mmio.device=512@0x%lx:%ld", 286 VIRTIO_MMIO_BASE + index * 512, 287 VIRTIO_IRQ_BASE + index); 288 if (ret < 0 || ret >= VIRTIO_CMDLINE_MAXLEN) { 289 g_free(cmdline); 290 return NULL; 291 } 292 293 return cmdline; 294 } 295 296 static void microvm_fix_kernel_cmdline(MachineState *machine) 297 { 298 X86MachineState *x86ms = X86_MACHINE(machine); 299 BusState *bus; 300 BusChild *kid; 301 char *cmdline; 302 303 /* 304 * Find MMIO transports with attached devices, and add them to the kernel 305 * command line. 306 * 307 * Yes, this is a hack, but one that heavily improves the UX without 308 * introducing any significant issues. 309 */ 310 cmdline = g_strdup(machine->kernel_cmdline); 311 bus = sysbus_get_default(); 312 QTAILQ_FOREACH(kid, &bus->children, sibling) { 313 DeviceState *dev = kid->child; 314 ObjectClass *class = object_get_class(OBJECT(dev)); 315 316 if (class == object_class_by_name(TYPE_VIRTIO_MMIO)) { 317 VirtIOMMIOProxy *mmio = VIRTIO_MMIO(OBJECT(dev)); 318 VirtioBusState *mmio_virtio_bus = &mmio->bus; 319 BusState *mmio_bus = &mmio_virtio_bus->parent_obj; 320 321 if (!QTAILQ_EMPTY(&mmio_bus->children)) { 322 gchar *mmio_cmdline = microvm_get_mmio_cmdline(mmio_bus->name); 323 if (mmio_cmdline) { 324 char *newcmd = g_strjoin(NULL, cmdline, mmio_cmdline, NULL); 325 g_free(mmio_cmdline); 326 g_free(cmdline); 327 cmdline = newcmd; 328 } 329 } 330 } 331 } 332 333 fw_cfg_modify_i32(x86ms->fw_cfg, FW_CFG_CMDLINE_SIZE, strlen(cmdline) + 1); 334 fw_cfg_modify_string(x86ms->fw_cfg, FW_CFG_CMDLINE_DATA, cmdline); 335 336 g_free(cmdline); 337 } 338 339 static void microvm_machine_state_init(MachineState *machine) 340 { 341 MicrovmMachineState *mms = MICROVM_MACHINE(machine); 342 X86MachineState *x86ms = X86_MACHINE(machine); 343 Error *local_err = NULL; 344 345 microvm_memory_init(mms); 346 347 x86_cpus_init(x86ms, CPU_VERSION_LATEST); 348 if (local_err) { 349 error_report_err(local_err); 350 exit(1); 351 } 352 353 microvm_devices_init(mms); 354 } 355 356 static void microvm_machine_reset(MachineState *machine) 357 { 358 MicrovmMachineState *mms = MICROVM_MACHINE(machine); 359 CPUState *cs; 360 X86CPU *cpu; 361 362 if (machine->kernel_filename != NULL && 363 mms->auto_kernel_cmdline && !mms->kernel_cmdline_fixed) { 364 microvm_fix_kernel_cmdline(machine); 365 mms->kernel_cmdline_fixed = true; 366 } 367 368 qemu_devices_reset(); 369 370 CPU_FOREACH(cs) { 371 cpu = X86_CPU(cs); 372 373 if (cpu->apic_state) { 374 device_reset(cpu->apic_state); 375 } 376 } 377 } 378 379 static void microvm_machine_get_pic(Object *obj, Visitor *v, const char *name, 380 void *opaque, Error **errp) 381 { 382 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 383 OnOffAuto pic = mms->pic; 384 385 visit_type_OnOffAuto(v, name, &pic, errp); 386 } 387 388 static void microvm_machine_set_pic(Object *obj, Visitor *v, const char *name, 389 void *opaque, Error **errp) 390 { 391 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 392 393 visit_type_OnOffAuto(v, name, &mms->pic, errp); 394 } 395 396 static void microvm_machine_get_pit(Object *obj, Visitor *v, const char *name, 397 void *opaque, Error **errp) 398 { 399 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 400 OnOffAuto pit = mms->pit; 401 402 visit_type_OnOffAuto(v, name, &pit, errp); 403 } 404 405 static void microvm_machine_set_pit(Object *obj, Visitor *v, const char *name, 406 void *opaque, Error **errp) 407 { 408 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 409 410 visit_type_OnOffAuto(v, name, &mms->pit, errp); 411 } 412 413 static void microvm_machine_get_rtc(Object *obj, Visitor *v, const char *name, 414 void *opaque, Error **errp) 415 { 416 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 417 OnOffAuto rtc = mms->rtc; 418 419 visit_type_OnOffAuto(v, name, &rtc, errp); 420 } 421 422 static void microvm_machine_set_rtc(Object *obj, Visitor *v, const char *name, 423 void *opaque, Error **errp) 424 { 425 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 426 427 visit_type_OnOffAuto(v, name, &mms->rtc, errp); 428 } 429 430 static bool microvm_machine_get_isa_serial(Object *obj, Error **errp) 431 { 432 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 433 434 return mms->isa_serial; 435 } 436 437 static void microvm_machine_set_isa_serial(Object *obj, bool value, 438 Error **errp) 439 { 440 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 441 442 mms->isa_serial = value; 443 } 444 445 static bool microvm_machine_get_option_roms(Object *obj, Error **errp) 446 { 447 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 448 449 return mms->option_roms; 450 } 451 452 static void microvm_machine_set_option_roms(Object *obj, bool value, 453 Error **errp) 454 { 455 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 456 457 mms->option_roms = value; 458 } 459 460 static bool microvm_machine_get_auto_kernel_cmdline(Object *obj, Error **errp) 461 { 462 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 463 464 return mms->auto_kernel_cmdline; 465 } 466 467 static void microvm_machine_set_auto_kernel_cmdline(Object *obj, bool value, 468 Error **errp) 469 { 470 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 471 472 mms->auto_kernel_cmdline = value; 473 } 474 475 static void microvm_machine_initfn(Object *obj) 476 { 477 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 478 479 /* Configuration */ 480 mms->pic = ON_OFF_AUTO_AUTO; 481 mms->pit = ON_OFF_AUTO_AUTO; 482 mms->rtc = ON_OFF_AUTO_AUTO; 483 mms->isa_serial = true; 484 mms->option_roms = true; 485 mms->auto_kernel_cmdline = true; 486 487 /* State */ 488 mms->kernel_cmdline_fixed = false; 489 } 490 491 static void microvm_class_init(ObjectClass *oc, void *data) 492 { 493 MachineClass *mc = MACHINE_CLASS(oc); 494 495 mc->init = microvm_machine_state_init; 496 497 mc->family = "microvm_i386"; 498 mc->desc = "microvm (i386)"; 499 mc->units_per_default_bus = 1; 500 mc->no_floppy = 1; 501 mc->max_cpus = 288; 502 mc->has_hotpluggable_cpus = false; 503 mc->auto_enable_numa_with_memhp = false; 504 mc->default_cpu_type = TARGET_DEFAULT_CPU_TYPE; 505 mc->nvdimm_supported = false; 506 507 /* Avoid relying too much on kernel components */ 508 mc->default_kernel_irqchip_split = true; 509 510 /* Machine class handlers */ 511 mc->reset = microvm_machine_reset; 512 513 object_class_property_add(oc, MICROVM_MACHINE_PIC, "OnOffAuto", 514 microvm_machine_get_pic, 515 microvm_machine_set_pic, 516 NULL, NULL, &error_abort); 517 object_class_property_set_description(oc, MICROVM_MACHINE_PIC, 518 "Enable i8259 PIC", &error_abort); 519 520 object_class_property_add(oc, MICROVM_MACHINE_PIT, "OnOffAuto", 521 microvm_machine_get_pit, 522 microvm_machine_set_pit, 523 NULL, NULL, &error_abort); 524 object_class_property_set_description(oc, MICROVM_MACHINE_PIT, 525 "Enable i8254 PIT", &error_abort); 526 527 object_class_property_add(oc, MICROVM_MACHINE_RTC, "OnOffAuto", 528 microvm_machine_get_rtc, 529 microvm_machine_set_rtc, 530 NULL, NULL, &error_abort); 531 object_class_property_set_description(oc, MICROVM_MACHINE_RTC, 532 "Enable MC146818 RTC", &error_abort); 533 534 object_class_property_add_bool(oc, MICROVM_MACHINE_ISA_SERIAL, 535 microvm_machine_get_isa_serial, 536 microvm_machine_set_isa_serial, 537 &error_abort); 538 object_class_property_set_description(oc, MICROVM_MACHINE_ISA_SERIAL, 539 "Set off to disable the instantiation an ISA serial port", 540 &error_abort); 541 542 object_class_property_add_bool(oc, MICROVM_MACHINE_OPTION_ROMS, 543 microvm_machine_get_option_roms, 544 microvm_machine_set_option_roms, 545 &error_abort); 546 object_class_property_set_description(oc, MICROVM_MACHINE_OPTION_ROMS, 547 "Set off to disable loading option ROMs", &error_abort); 548 549 object_class_property_add_bool(oc, MICROVM_MACHINE_AUTO_KERNEL_CMDLINE, 550 microvm_machine_get_auto_kernel_cmdline, 551 microvm_machine_set_auto_kernel_cmdline, 552 &error_abort); 553 object_class_property_set_description(oc, 554 MICROVM_MACHINE_AUTO_KERNEL_CMDLINE, 555 "Set off to disable adding virtio-mmio devices to the kernel cmdline", 556 &error_abort); 557 } 558 559 static const TypeInfo microvm_machine_info = { 560 .name = TYPE_MICROVM_MACHINE, 561 .parent = TYPE_X86_MACHINE, 562 .instance_size = sizeof(MicrovmMachineState), 563 .instance_init = microvm_machine_initfn, 564 .class_size = sizeof(MicrovmMachineClass), 565 .class_init = microvm_class_init, 566 .interfaces = (InterfaceInfo[]) { 567 { } 568 }, 569 }; 570 571 static void microvm_machine_init(void) 572 { 573 type_register_static(µvm_machine_info); 574 } 575 type_init(microvm_machine_init); 576