1 /* 2 * Copyright (c) 2018 Intel Corporation 3 * Copyright (c) 2019 Red Hat, Inc. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms and conditions of the GNU General Public License, 7 * version 2 or later, as published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program. If not, see <http://www.gnu.org/licenses/>. 16 */ 17 18 #include "qemu/osdep.h" 19 #include "qemu/error-report.h" 20 #include "qemu/cutils.h" 21 #include "qemu/units.h" 22 #include "qapi/error.h" 23 #include "qapi/visitor.h" 24 #include "qapi/qapi-visit-common.h" 25 #include "sysemu/sysemu.h" 26 #include "sysemu/cpus.h" 27 #include "sysemu/numa.h" 28 #include "sysemu/reset.h" 29 30 #include "hw/loader.h" 31 #include "hw/irq.h" 32 #include "hw/kvm/clock.h" 33 #include "hw/i386/microvm.h" 34 #include "hw/i386/x86.h" 35 #include "hw/i386/pc.h" 36 #include "target/i386/cpu.h" 37 #include "hw/timer/i8254.h" 38 #include "hw/rtc/mc146818rtc.h" 39 #include "hw/char/serial.h" 40 #include "hw/i386/topology.h" 41 #include "hw/i386/e820_memory_layout.h" 42 #include "hw/i386/fw_cfg.h" 43 #include "hw/virtio/virtio-mmio.h" 44 45 #include "cpu.h" 46 #include "elf.h" 47 #include "kvm_i386.h" 48 #include "hw/xen/start_info.h" 49 50 #define MICROVM_BIOS_FILENAME "bios-microvm.bin" 51 52 static void microvm_set_rtc(MicrovmMachineState *mms, ISADevice *s) 53 { 54 X86MachineState *x86ms = X86_MACHINE(mms); 55 int val; 56 57 val = MIN(x86ms->below_4g_mem_size / KiB, 640); 58 rtc_set_memory(s, 0x15, val); 59 rtc_set_memory(s, 0x16, val >> 8); 60 /* extended memory (next 64MiB) */ 61 if (x86ms->below_4g_mem_size > 1 * MiB) { 62 val = (x86ms->below_4g_mem_size - 1 * MiB) / KiB; 63 } else { 64 val = 0; 65 } 66 if (val > 65535) { 67 val = 65535; 68 } 69 rtc_set_memory(s, 0x17, val); 70 rtc_set_memory(s, 0x18, val >> 8); 71 rtc_set_memory(s, 0x30, val); 72 rtc_set_memory(s, 0x31, val >> 8); 73 /* memory between 16MiB and 4GiB */ 74 if (x86ms->below_4g_mem_size > 16 * MiB) { 75 val = (x86ms->below_4g_mem_size - 16 * MiB) / (64 * KiB); 76 } else { 77 val = 0; 78 } 79 if (val > 65535) { 80 val = 65535; 81 } 82 rtc_set_memory(s, 0x34, val); 83 rtc_set_memory(s, 0x35, val >> 8); 84 /* memory above 4GiB */ 85 val = x86ms->above_4g_mem_size / 65536; 86 rtc_set_memory(s, 0x5b, val); 87 rtc_set_memory(s, 0x5c, val >> 8); 88 rtc_set_memory(s, 0x5d, val >> 16); 89 } 90 91 static void microvm_gsi_handler(void *opaque, int n, int level) 92 { 93 GSIState *s = opaque; 94 95 qemu_set_irq(s->ioapic_irq[n], level); 96 } 97 98 static void microvm_devices_init(MicrovmMachineState *mms) 99 { 100 X86MachineState *x86ms = X86_MACHINE(mms); 101 ISABus *isa_bus; 102 ISADevice *rtc_state; 103 GSIState *gsi_state; 104 int i; 105 106 /* Core components */ 107 108 gsi_state = g_malloc0(sizeof(*gsi_state)); 109 if (mms->pic == ON_OFF_AUTO_ON || mms->pic == ON_OFF_AUTO_AUTO) { 110 x86ms->gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS); 111 } else { 112 x86ms->gsi = qemu_allocate_irqs(microvm_gsi_handler, 113 gsi_state, GSI_NUM_PINS); 114 } 115 116 isa_bus = isa_bus_new(NULL, get_system_memory(), get_system_io(), 117 &error_abort); 118 isa_bus_irqs(isa_bus, x86ms->gsi); 119 120 ioapic_init_gsi(gsi_state, "machine"); 121 122 kvmclock_create(); 123 124 for (i = 0; i < VIRTIO_NUM_TRANSPORTS; i++) { 125 sysbus_create_simple("virtio-mmio", 126 VIRTIO_MMIO_BASE + i * 512, 127 x86ms->gsi[VIRTIO_IRQ_BASE + i]); 128 } 129 130 /* Optional and legacy devices */ 131 132 if (mms->pic == ON_OFF_AUTO_ON || mms->pic == ON_OFF_AUTO_AUTO) { 133 qemu_irq *i8259; 134 135 i8259 = i8259_init(isa_bus, pc_allocate_cpu_irq()); 136 for (i = 0; i < ISA_NUM_IRQS; i++) { 137 gsi_state->i8259_irq[i] = i8259[i]; 138 } 139 g_free(i8259); 140 } 141 142 if (mms->pit == ON_OFF_AUTO_ON || mms->pit == ON_OFF_AUTO_AUTO) { 143 if (kvm_pit_in_kernel()) { 144 kvm_pit_init(isa_bus, 0x40); 145 } else { 146 i8254_pit_init(isa_bus, 0x40, 0, NULL); 147 } 148 } 149 150 if (mms->rtc == ON_OFF_AUTO_ON || 151 (mms->rtc == ON_OFF_AUTO_AUTO && !kvm_enabled())) { 152 rtc_state = mc146818_rtc_init(isa_bus, 2000, NULL); 153 microvm_set_rtc(mms, rtc_state); 154 } 155 156 if (mms->isa_serial) { 157 serial_hds_isa_init(isa_bus, 0, 1); 158 } 159 160 if (bios_name == NULL) { 161 bios_name = MICROVM_BIOS_FILENAME; 162 } 163 x86_bios_rom_init(get_system_memory(), true); 164 } 165 166 static void microvm_memory_init(MicrovmMachineState *mms) 167 { 168 MachineState *machine = MACHINE(mms); 169 X86MachineState *x86ms = X86_MACHINE(mms); 170 MemoryRegion *ram, *ram_below_4g, *ram_above_4g; 171 MemoryRegion *system_memory = get_system_memory(); 172 FWCfgState *fw_cfg; 173 ram_addr_t lowmem; 174 int i; 175 176 /* 177 * Check whether RAM fits below 4G (leaving 1/2 GByte for IO memory 178 * and 256 Mbytes for PCI Express Enhanced Configuration Access Mapping 179 * also known as MMCFG). 180 * If it doesn't, we need to split it in chunks below and above 4G. 181 * In any case, try to make sure that guest addresses aligned at 182 * 1G boundaries get mapped to host addresses aligned at 1G boundaries. 183 */ 184 if (machine->ram_size >= 0xb0000000) { 185 lowmem = 0x80000000; 186 } else { 187 lowmem = 0xb0000000; 188 } 189 190 /* 191 * Handle the machine opt max-ram-below-4g. It is basically doing 192 * min(qemu limit, user limit). 193 */ 194 if (!x86ms->max_ram_below_4g) { 195 x86ms->max_ram_below_4g = 4 * GiB; 196 } 197 if (lowmem > x86ms->max_ram_below_4g) { 198 lowmem = x86ms->max_ram_below_4g; 199 if (machine->ram_size - lowmem > lowmem && 200 lowmem & (1 * GiB - 1)) { 201 warn_report("There is possibly poor performance as the ram size " 202 " (0x%" PRIx64 ") is more then twice the size of" 203 " max-ram-below-4g (%"PRIu64") and" 204 " max-ram-below-4g is not a multiple of 1G.", 205 (uint64_t)machine->ram_size, x86ms->max_ram_below_4g); 206 } 207 } 208 209 if (machine->ram_size > lowmem) { 210 x86ms->above_4g_mem_size = machine->ram_size - lowmem; 211 x86ms->below_4g_mem_size = lowmem; 212 } else { 213 x86ms->above_4g_mem_size = 0; 214 x86ms->below_4g_mem_size = machine->ram_size; 215 } 216 217 ram = g_malloc(sizeof(*ram)); 218 memory_region_allocate_system_memory(ram, NULL, "microvm.ram", 219 machine->ram_size); 220 221 ram_below_4g = g_malloc(sizeof(*ram_below_4g)); 222 memory_region_init_alias(ram_below_4g, NULL, "ram-below-4g", ram, 223 0, x86ms->below_4g_mem_size); 224 memory_region_add_subregion(system_memory, 0, ram_below_4g); 225 226 e820_add_entry(0, x86ms->below_4g_mem_size, E820_RAM); 227 228 if (x86ms->above_4g_mem_size > 0) { 229 ram_above_4g = g_malloc(sizeof(*ram_above_4g)); 230 memory_region_init_alias(ram_above_4g, NULL, "ram-above-4g", ram, 231 x86ms->below_4g_mem_size, 232 x86ms->above_4g_mem_size); 233 memory_region_add_subregion(system_memory, 0x100000000ULL, 234 ram_above_4g); 235 e820_add_entry(0x100000000ULL, x86ms->above_4g_mem_size, E820_RAM); 236 } 237 238 fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4, 239 &address_space_memory); 240 241 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, machine->smp.cpus); 242 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, machine->smp.max_cpus); 243 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)machine->ram_size); 244 fw_cfg_add_i32(fw_cfg, FW_CFG_IRQ0_OVERRIDE, kvm_allows_irq0_override()); 245 fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE, 246 &e820_reserve, sizeof(e820_reserve)); 247 fw_cfg_add_file(fw_cfg, "etc/e820", e820_table, 248 sizeof(struct e820_entry) * e820_get_num_entries()); 249 250 rom_set_fw(fw_cfg); 251 252 if (machine->kernel_filename != NULL) { 253 x86_load_linux(x86ms, fw_cfg, 0, true, true); 254 } 255 256 if (mms->option_roms) { 257 for (i = 0; i < nb_option_roms; i++) { 258 rom_add_option(option_rom[i].name, option_rom[i].bootindex); 259 } 260 } 261 262 x86ms->fw_cfg = fw_cfg; 263 x86ms->ioapic_as = &address_space_memory; 264 } 265 266 static gchar *microvm_get_mmio_cmdline(gchar *name) 267 { 268 gchar *cmdline; 269 gchar *separator; 270 long int index; 271 int ret; 272 273 separator = g_strrstr(name, "."); 274 if (!separator) { 275 return NULL; 276 } 277 278 if (qemu_strtol(separator + 1, NULL, 10, &index) != 0) { 279 return NULL; 280 } 281 282 cmdline = g_malloc0(VIRTIO_CMDLINE_MAXLEN); 283 ret = g_snprintf(cmdline, VIRTIO_CMDLINE_MAXLEN, 284 " virtio_mmio.device=512@0x%lx:%ld", 285 VIRTIO_MMIO_BASE + index * 512, 286 VIRTIO_IRQ_BASE + index); 287 if (ret < 0 || ret >= VIRTIO_CMDLINE_MAXLEN) { 288 g_free(cmdline); 289 return NULL; 290 } 291 292 return cmdline; 293 } 294 295 static void microvm_fix_kernel_cmdline(MachineState *machine) 296 { 297 X86MachineState *x86ms = X86_MACHINE(machine); 298 BusState *bus; 299 BusChild *kid; 300 char *cmdline; 301 302 /* 303 * Find MMIO transports with attached devices, and add them to the kernel 304 * command line. 305 * 306 * Yes, this is a hack, but one that heavily improves the UX without 307 * introducing any significant issues. 308 */ 309 cmdline = g_strdup(machine->kernel_cmdline); 310 bus = sysbus_get_default(); 311 QTAILQ_FOREACH(kid, &bus->children, sibling) { 312 DeviceState *dev = kid->child; 313 ObjectClass *class = object_get_class(OBJECT(dev)); 314 315 if (class == object_class_by_name(TYPE_VIRTIO_MMIO)) { 316 VirtIOMMIOProxy *mmio = VIRTIO_MMIO(OBJECT(dev)); 317 VirtioBusState *mmio_virtio_bus = &mmio->bus; 318 BusState *mmio_bus = &mmio_virtio_bus->parent_obj; 319 320 if (!QTAILQ_EMPTY(&mmio_bus->children)) { 321 gchar *mmio_cmdline = microvm_get_mmio_cmdline(mmio_bus->name); 322 if (mmio_cmdline) { 323 char *newcmd = g_strjoin(NULL, cmdline, mmio_cmdline, NULL); 324 g_free(mmio_cmdline); 325 g_free(cmdline); 326 cmdline = newcmd; 327 } 328 } 329 } 330 } 331 332 fw_cfg_modify_i32(x86ms->fw_cfg, FW_CFG_CMDLINE_SIZE, strlen(cmdline) + 1); 333 fw_cfg_modify_string(x86ms->fw_cfg, FW_CFG_CMDLINE_DATA, cmdline); 334 } 335 336 static void microvm_machine_state_init(MachineState *machine) 337 { 338 MicrovmMachineState *mms = MICROVM_MACHINE(machine); 339 X86MachineState *x86ms = X86_MACHINE(machine); 340 Error *local_err = NULL; 341 342 microvm_memory_init(mms); 343 344 x86_cpus_init(x86ms, CPU_VERSION_LATEST); 345 if (local_err) { 346 error_report_err(local_err); 347 exit(1); 348 } 349 350 microvm_devices_init(mms); 351 } 352 353 static void microvm_machine_reset(MachineState *machine) 354 { 355 MicrovmMachineState *mms = MICROVM_MACHINE(machine); 356 CPUState *cs; 357 X86CPU *cpu; 358 359 if (machine->kernel_filename != NULL && 360 mms->auto_kernel_cmdline && !mms->kernel_cmdline_fixed) { 361 microvm_fix_kernel_cmdline(machine); 362 mms->kernel_cmdline_fixed = true; 363 } 364 365 qemu_devices_reset(); 366 367 CPU_FOREACH(cs) { 368 cpu = X86_CPU(cs); 369 370 if (cpu->apic_state) { 371 device_reset(cpu->apic_state); 372 } 373 } 374 } 375 376 static void microvm_machine_get_pic(Object *obj, Visitor *v, const char *name, 377 void *opaque, Error **errp) 378 { 379 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 380 OnOffAuto pic = mms->pic; 381 382 visit_type_OnOffAuto(v, name, &pic, errp); 383 } 384 385 static void microvm_machine_set_pic(Object *obj, Visitor *v, const char *name, 386 void *opaque, Error **errp) 387 { 388 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 389 390 visit_type_OnOffAuto(v, name, &mms->pic, errp); 391 } 392 393 static void microvm_machine_get_pit(Object *obj, Visitor *v, const char *name, 394 void *opaque, Error **errp) 395 { 396 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 397 OnOffAuto pit = mms->pit; 398 399 visit_type_OnOffAuto(v, name, &pit, errp); 400 } 401 402 static void microvm_machine_set_pit(Object *obj, Visitor *v, const char *name, 403 void *opaque, Error **errp) 404 { 405 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 406 407 visit_type_OnOffAuto(v, name, &mms->pit, errp); 408 } 409 410 static void microvm_machine_get_rtc(Object *obj, Visitor *v, const char *name, 411 void *opaque, Error **errp) 412 { 413 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 414 OnOffAuto rtc = mms->rtc; 415 416 visit_type_OnOffAuto(v, name, &rtc, errp); 417 } 418 419 static void microvm_machine_set_rtc(Object *obj, Visitor *v, const char *name, 420 void *opaque, Error **errp) 421 { 422 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 423 424 visit_type_OnOffAuto(v, name, &mms->rtc, errp); 425 } 426 427 static bool microvm_machine_get_isa_serial(Object *obj, Error **errp) 428 { 429 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 430 431 return mms->isa_serial; 432 } 433 434 static void microvm_machine_set_isa_serial(Object *obj, bool value, 435 Error **errp) 436 { 437 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 438 439 mms->isa_serial = value; 440 } 441 442 static bool microvm_machine_get_option_roms(Object *obj, Error **errp) 443 { 444 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 445 446 return mms->option_roms; 447 } 448 449 static void microvm_machine_set_option_roms(Object *obj, bool value, 450 Error **errp) 451 { 452 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 453 454 mms->option_roms = value; 455 } 456 457 static bool microvm_machine_get_auto_kernel_cmdline(Object *obj, Error **errp) 458 { 459 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 460 461 return mms->auto_kernel_cmdline; 462 } 463 464 static void microvm_machine_set_auto_kernel_cmdline(Object *obj, bool value, 465 Error **errp) 466 { 467 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 468 469 mms->auto_kernel_cmdline = value; 470 } 471 472 static void microvm_machine_initfn(Object *obj) 473 { 474 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 475 476 /* Configuration */ 477 mms->pic = ON_OFF_AUTO_AUTO; 478 mms->pit = ON_OFF_AUTO_AUTO; 479 mms->rtc = ON_OFF_AUTO_AUTO; 480 mms->isa_serial = true; 481 mms->option_roms = true; 482 mms->auto_kernel_cmdline = true; 483 484 /* State */ 485 mms->kernel_cmdline_fixed = false; 486 } 487 488 static void microvm_class_init(ObjectClass *oc, void *data) 489 { 490 MachineClass *mc = MACHINE_CLASS(oc); 491 492 mc->init = microvm_machine_state_init; 493 494 mc->family = "microvm_i386"; 495 mc->desc = "microvm (i386)"; 496 mc->units_per_default_bus = 1; 497 mc->no_floppy = 1; 498 mc->max_cpus = 288; 499 mc->has_hotpluggable_cpus = false; 500 mc->auto_enable_numa_with_memhp = false; 501 mc->default_cpu_type = TARGET_DEFAULT_CPU_TYPE; 502 mc->nvdimm_supported = false; 503 504 /* Avoid relying too much on kernel components */ 505 mc->default_kernel_irqchip_split = true; 506 507 /* Machine class handlers */ 508 mc->reset = microvm_machine_reset; 509 510 object_class_property_add(oc, MICROVM_MACHINE_PIC, "OnOffAuto", 511 microvm_machine_get_pic, 512 microvm_machine_set_pic, 513 NULL, NULL, &error_abort); 514 object_class_property_set_description(oc, MICROVM_MACHINE_PIC, 515 "Enable i8259 PIC", &error_abort); 516 517 object_class_property_add(oc, MICROVM_MACHINE_PIT, "OnOffAuto", 518 microvm_machine_get_pit, 519 microvm_machine_set_pit, 520 NULL, NULL, &error_abort); 521 object_class_property_set_description(oc, MICROVM_MACHINE_PIT, 522 "Enable i8254 PIT", &error_abort); 523 524 object_class_property_add(oc, MICROVM_MACHINE_RTC, "OnOffAuto", 525 microvm_machine_get_rtc, 526 microvm_machine_set_rtc, 527 NULL, NULL, &error_abort); 528 object_class_property_set_description(oc, MICROVM_MACHINE_RTC, 529 "Enable MC146818 RTC", &error_abort); 530 531 object_class_property_add_bool(oc, MICROVM_MACHINE_ISA_SERIAL, 532 microvm_machine_get_isa_serial, 533 microvm_machine_set_isa_serial, 534 &error_abort); 535 object_class_property_set_description(oc, MICROVM_MACHINE_ISA_SERIAL, 536 "Set off to disable the instantiation an ISA serial port", 537 &error_abort); 538 539 object_class_property_add_bool(oc, MICROVM_MACHINE_OPTION_ROMS, 540 microvm_machine_get_option_roms, 541 microvm_machine_set_option_roms, 542 &error_abort); 543 object_class_property_set_description(oc, MICROVM_MACHINE_OPTION_ROMS, 544 "Set off to disable loading option ROMs", &error_abort); 545 546 object_class_property_add_bool(oc, MICROVM_MACHINE_AUTO_KERNEL_CMDLINE, 547 microvm_machine_get_auto_kernel_cmdline, 548 microvm_machine_set_auto_kernel_cmdline, 549 &error_abort); 550 object_class_property_set_description(oc, 551 MICROVM_MACHINE_AUTO_KERNEL_CMDLINE, 552 "Set off to disable adding virtio-mmio devices to the kernel cmdline", 553 &error_abort); 554 } 555 556 static const TypeInfo microvm_machine_info = { 557 .name = TYPE_MICROVM_MACHINE, 558 .parent = TYPE_X86_MACHINE, 559 .instance_size = sizeof(MicrovmMachineState), 560 .instance_init = microvm_machine_initfn, 561 .class_size = sizeof(MicrovmMachineClass), 562 .class_init = microvm_class_init, 563 .interfaces = (InterfaceInfo[]) { 564 { } 565 }, 566 }; 567 568 static void microvm_machine_init(void) 569 { 570 type_register_static(µvm_machine_info); 571 } 572 type_init(microvm_machine_init); 573