1 /* 2 * Copyright (c) 2018 Intel Corporation 3 * Copyright (c) 2019 Red Hat, Inc. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms and conditions of the GNU General Public License, 7 * version 2 or later, as published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program. If not, see <http://www.gnu.org/licenses/>. 16 */ 17 18 #include "qemu/osdep.h" 19 #include "qemu/error-report.h" 20 #include "qemu/cutils.h" 21 #include "qemu/units.h" 22 #include "qapi/error.h" 23 #include "qapi/visitor.h" 24 #include "qapi/qapi-visit-common.h" 25 #include "sysemu/sysemu.h" 26 #include "sysemu/cpus.h" 27 #include "sysemu/numa.h" 28 #include "sysemu/reset.h" 29 30 #include "hw/loader.h" 31 #include "hw/irq.h" 32 #include "hw/kvm/clock.h" 33 #include "hw/i386/microvm.h" 34 #include "hw/i386/x86.h" 35 #include "target/i386/cpu.h" 36 #include "hw/intc/i8259.h" 37 #include "hw/timer/i8254.h" 38 #include "hw/rtc/mc146818rtc.h" 39 #include "hw/char/serial.h" 40 #include "hw/i386/topology.h" 41 #include "hw/i386/e820_memory_layout.h" 42 #include "hw/i386/fw_cfg.h" 43 #include "hw/virtio/virtio-mmio.h" 44 45 #include "cpu.h" 46 #include "elf.h" 47 #include "kvm_i386.h" 48 #include "hw/xen/start_info.h" 49 50 #define MICROVM_BIOS_FILENAME "bios-microvm.bin" 51 52 static void microvm_set_rtc(MicrovmMachineState *mms, ISADevice *s) 53 { 54 X86MachineState *x86ms = X86_MACHINE(mms); 55 int val; 56 57 val = MIN(x86ms->below_4g_mem_size / KiB, 640); 58 rtc_set_memory(s, 0x15, val); 59 rtc_set_memory(s, 0x16, val >> 8); 60 /* extended memory (next 64MiB) */ 61 if (x86ms->below_4g_mem_size > 1 * MiB) { 62 val = (x86ms->below_4g_mem_size - 1 * MiB) / KiB; 63 } else { 64 val = 0; 65 } 66 if (val > 65535) { 67 val = 65535; 68 } 69 rtc_set_memory(s, 0x17, val); 70 rtc_set_memory(s, 0x18, val >> 8); 71 rtc_set_memory(s, 0x30, val); 72 rtc_set_memory(s, 0x31, val >> 8); 73 /* memory between 16MiB and 4GiB */ 74 if (x86ms->below_4g_mem_size > 16 * MiB) { 75 val = (x86ms->below_4g_mem_size - 16 * MiB) / (64 * KiB); 76 } else { 77 val = 0; 78 } 79 if (val > 65535) { 80 val = 65535; 81 } 82 rtc_set_memory(s, 0x34, val); 83 rtc_set_memory(s, 0x35, val >> 8); 84 /* memory above 4GiB */ 85 val = x86ms->above_4g_mem_size / 65536; 86 rtc_set_memory(s, 0x5b, val); 87 rtc_set_memory(s, 0x5c, val >> 8); 88 rtc_set_memory(s, 0x5d, val >> 16); 89 } 90 91 static void microvm_gsi_handler(void *opaque, int n, int level) 92 { 93 GSIState *s = opaque; 94 95 qemu_set_irq(s->ioapic_irq[n], level); 96 } 97 98 static void microvm_devices_init(MicrovmMachineState *mms) 99 { 100 X86MachineState *x86ms = X86_MACHINE(mms); 101 ISABus *isa_bus; 102 ISADevice *rtc_state; 103 GSIState *gsi_state; 104 int i; 105 106 /* Core components */ 107 108 gsi_state = g_malloc0(sizeof(*gsi_state)); 109 if (mms->pic == ON_OFF_AUTO_ON || mms->pic == ON_OFF_AUTO_AUTO) { 110 x86ms->gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS); 111 } else { 112 x86ms->gsi = qemu_allocate_irqs(microvm_gsi_handler, 113 gsi_state, GSI_NUM_PINS); 114 } 115 116 isa_bus = isa_bus_new(NULL, get_system_memory(), get_system_io(), 117 &error_abort); 118 isa_bus_irqs(isa_bus, x86ms->gsi); 119 120 ioapic_init_gsi(gsi_state, "machine"); 121 122 kvmclock_create(); 123 124 for (i = 0; i < VIRTIO_NUM_TRANSPORTS; i++) { 125 sysbus_create_simple("virtio-mmio", 126 VIRTIO_MMIO_BASE + i * 512, 127 x86ms->gsi[VIRTIO_IRQ_BASE + i]); 128 } 129 130 /* Optional and legacy devices */ 131 132 if (mms->pic == ON_OFF_AUTO_ON || mms->pic == ON_OFF_AUTO_AUTO) { 133 qemu_irq *i8259; 134 135 i8259 = i8259_init(isa_bus, x86_allocate_cpu_irq()); 136 for (i = 0; i < ISA_NUM_IRQS; i++) { 137 gsi_state->i8259_irq[i] = i8259[i]; 138 } 139 g_free(i8259); 140 } 141 142 if (mms->pit == ON_OFF_AUTO_ON || mms->pit == ON_OFF_AUTO_AUTO) { 143 if (kvm_pit_in_kernel()) { 144 kvm_pit_init(isa_bus, 0x40); 145 } else { 146 i8254_pit_init(isa_bus, 0x40, 0, NULL); 147 } 148 } 149 150 if (mms->rtc == ON_OFF_AUTO_ON || 151 (mms->rtc == ON_OFF_AUTO_AUTO && !kvm_enabled())) { 152 rtc_state = mc146818_rtc_init(isa_bus, 2000, NULL); 153 microvm_set_rtc(mms, rtc_state); 154 } 155 156 if (mms->isa_serial) { 157 serial_hds_isa_init(isa_bus, 0, 1); 158 } 159 160 if (bios_name == NULL) { 161 bios_name = MICROVM_BIOS_FILENAME; 162 } 163 x86_bios_rom_init(get_system_memory(), true); 164 } 165 166 static void microvm_memory_init(MicrovmMachineState *mms) 167 { 168 MachineState *machine = MACHINE(mms); 169 X86MachineState *x86ms = X86_MACHINE(mms); 170 MemoryRegion *ram_below_4g, *ram_above_4g; 171 MemoryRegion *system_memory = get_system_memory(); 172 FWCfgState *fw_cfg; 173 ram_addr_t lowmem = 0xc0000000; /* 3G */ 174 int i; 175 176 if (machine->ram_size > lowmem) { 177 x86ms->above_4g_mem_size = machine->ram_size - lowmem; 178 x86ms->below_4g_mem_size = lowmem; 179 } else { 180 x86ms->above_4g_mem_size = 0; 181 x86ms->below_4g_mem_size = machine->ram_size; 182 } 183 184 ram_below_4g = g_malloc(sizeof(*ram_below_4g)); 185 memory_region_init_alias(ram_below_4g, NULL, "ram-below-4g", machine->ram, 186 0, x86ms->below_4g_mem_size); 187 memory_region_add_subregion(system_memory, 0, ram_below_4g); 188 189 e820_add_entry(0, x86ms->below_4g_mem_size, E820_RAM); 190 191 if (x86ms->above_4g_mem_size > 0) { 192 ram_above_4g = g_malloc(sizeof(*ram_above_4g)); 193 memory_region_init_alias(ram_above_4g, NULL, "ram-above-4g", 194 machine->ram, 195 x86ms->below_4g_mem_size, 196 x86ms->above_4g_mem_size); 197 memory_region_add_subregion(system_memory, 0x100000000ULL, 198 ram_above_4g); 199 e820_add_entry(0x100000000ULL, x86ms->above_4g_mem_size, E820_RAM); 200 } 201 202 fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4, 203 &address_space_memory); 204 205 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, machine->smp.cpus); 206 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, machine->smp.max_cpus); 207 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)machine->ram_size); 208 fw_cfg_add_i32(fw_cfg, FW_CFG_IRQ0_OVERRIDE, kvm_allows_irq0_override()); 209 fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE, 210 &e820_reserve, sizeof(e820_reserve)); 211 fw_cfg_add_file(fw_cfg, "etc/e820", e820_table, 212 sizeof(struct e820_entry) * e820_get_num_entries()); 213 214 rom_set_fw(fw_cfg); 215 216 if (machine->kernel_filename != NULL) { 217 x86_load_linux(x86ms, fw_cfg, 0, true, true); 218 } 219 220 if (mms->option_roms) { 221 for (i = 0; i < nb_option_roms; i++) { 222 rom_add_option(option_rom[i].name, option_rom[i].bootindex); 223 } 224 } 225 226 x86ms->fw_cfg = fw_cfg; 227 x86ms->ioapic_as = &address_space_memory; 228 } 229 230 static gchar *microvm_get_mmio_cmdline(gchar *name) 231 { 232 gchar *cmdline; 233 gchar *separator; 234 long int index; 235 int ret; 236 237 separator = g_strrstr(name, "."); 238 if (!separator) { 239 return NULL; 240 } 241 242 if (qemu_strtol(separator + 1, NULL, 10, &index) != 0) { 243 return NULL; 244 } 245 246 cmdline = g_malloc0(VIRTIO_CMDLINE_MAXLEN); 247 ret = g_snprintf(cmdline, VIRTIO_CMDLINE_MAXLEN, 248 " virtio_mmio.device=512@0x%lx:%ld", 249 VIRTIO_MMIO_BASE + index * 512, 250 VIRTIO_IRQ_BASE + index); 251 if (ret < 0 || ret >= VIRTIO_CMDLINE_MAXLEN) { 252 g_free(cmdline); 253 return NULL; 254 } 255 256 return cmdline; 257 } 258 259 static void microvm_fix_kernel_cmdline(MachineState *machine) 260 { 261 X86MachineState *x86ms = X86_MACHINE(machine); 262 BusState *bus; 263 BusChild *kid; 264 char *cmdline; 265 266 /* 267 * Find MMIO transports with attached devices, and add them to the kernel 268 * command line. 269 * 270 * Yes, this is a hack, but one that heavily improves the UX without 271 * introducing any significant issues. 272 */ 273 cmdline = g_strdup(machine->kernel_cmdline); 274 bus = sysbus_get_default(); 275 QTAILQ_FOREACH(kid, &bus->children, sibling) { 276 DeviceState *dev = kid->child; 277 ObjectClass *class = object_get_class(OBJECT(dev)); 278 279 if (class == object_class_by_name(TYPE_VIRTIO_MMIO)) { 280 VirtIOMMIOProxy *mmio = VIRTIO_MMIO(OBJECT(dev)); 281 VirtioBusState *mmio_virtio_bus = &mmio->bus; 282 BusState *mmio_bus = &mmio_virtio_bus->parent_obj; 283 284 if (!QTAILQ_EMPTY(&mmio_bus->children)) { 285 gchar *mmio_cmdline = microvm_get_mmio_cmdline(mmio_bus->name); 286 if (mmio_cmdline) { 287 char *newcmd = g_strjoin(NULL, cmdline, mmio_cmdline, NULL); 288 g_free(mmio_cmdline); 289 g_free(cmdline); 290 cmdline = newcmd; 291 } 292 } 293 } 294 } 295 296 fw_cfg_modify_i32(x86ms->fw_cfg, FW_CFG_CMDLINE_SIZE, strlen(cmdline) + 1); 297 fw_cfg_modify_string(x86ms->fw_cfg, FW_CFG_CMDLINE_DATA, cmdline); 298 299 g_free(cmdline); 300 } 301 302 static void microvm_machine_state_init(MachineState *machine) 303 { 304 MicrovmMachineState *mms = MICROVM_MACHINE(machine); 305 X86MachineState *x86ms = X86_MACHINE(machine); 306 Error *local_err = NULL; 307 308 microvm_memory_init(mms); 309 310 x86_cpus_init(x86ms, CPU_VERSION_LATEST); 311 if (local_err) { 312 error_report_err(local_err); 313 exit(1); 314 } 315 316 microvm_devices_init(mms); 317 } 318 319 static void microvm_machine_reset(MachineState *machine) 320 { 321 MicrovmMachineState *mms = MICROVM_MACHINE(machine); 322 CPUState *cs; 323 X86CPU *cpu; 324 325 if (machine->kernel_filename != NULL && 326 mms->auto_kernel_cmdline && !mms->kernel_cmdline_fixed) { 327 microvm_fix_kernel_cmdline(machine); 328 mms->kernel_cmdline_fixed = true; 329 } 330 331 qemu_devices_reset(); 332 333 CPU_FOREACH(cs) { 334 cpu = X86_CPU(cs); 335 336 if (cpu->apic_state) { 337 device_legacy_reset(cpu->apic_state); 338 } 339 } 340 } 341 342 static void microvm_machine_get_pic(Object *obj, Visitor *v, const char *name, 343 void *opaque, Error **errp) 344 { 345 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 346 OnOffAuto pic = mms->pic; 347 348 visit_type_OnOffAuto(v, name, &pic, errp); 349 } 350 351 static void microvm_machine_set_pic(Object *obj, Visitor *v, const char *name, 352 void *opaque, Error **errp) 353 { 354 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 355 356 visit_type_OnOffAuto(v, name, &mms->pic, errp); 357 } 358 359 static void microvm_machine_get_pit(Object *obj, Visitor *v, const char *name, 360 void *opaque, Error **errp) 361 { 362 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 363 OnOffAuto pit = mms->pit; 364 365 visit_type_OnOffAuto(v, name, &pit, errp); 366 } 367 368 static void microvm_machine_set_pit(Object *obj, Visitor *v, const char *name, 369 void *opaque, Error **errp) 370 { 371 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 372 373 visit_type_OnOffAuto(v, name, &mms->pit, errp); 374 } 375 376 static void microvm_machine_get_rtc(Object *obj, Visitor *v, const char *name, 377 void *opaque, Error **errp) 378 { 379 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 380 OnOffAuto rtc = mms->rtc; 381 382 visit_type_OnOffAuto(v, name, &rtc, errp); 383 } 384 385 static void microvm_machine_set_rtc(Object *obj, Visitor *v, const char *name, 386 void *opaque, Error **errp) 387 { 388 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 389 390 visit_type_OnOffAuto(v, name, &mms->rtc, errp); 391 } 392 393 static bool microvm_machine_get_isa_serial(Object *obj, Error **errp) 394 { 395 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 396 397 return mms->isa_serial; 398 } 399 400 static void microvm_machine_set_isa_serial(Object *obj, bool value, 401 Error **errp) 402 { 403 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 404 405 mms->isa_serial = value; 406 } 407 408 static bool microvm_machine_get_option_roms(Object *obj, Error **errp) 409 { 410 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 411 412 return mms->option_roms; 413 } 414 415 static void microvm_machine_set_option_roms(Object *obj, bool value, 416 Error **errp) 417 { 418 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 419 420 mms->option_roms = value; 421 } 422 423 static bool microvm_machine_get_auto_kernel_cmdline(Object *obj, Error **errp) 424 { 425 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 426 427 return mms->auto_kernel_cmdline; 428 } 429 430 static void microvm_machine_set_auto_kernel_cmdline(Object *obj, bool value, 431 Error **errp) 432 { 433 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 434 435 mms->auto_kernel_cmdline = value; 436 } 437 438 static void microvm_machine_initfn(Object *obj) 439 { 440 MicrovmMachineState *mms = MICROVM_MACHINE(obj); 441 442 /* Configuration */ 443 mms->pic = ON_OFF_AUTO_AUTO; 444 mms->pit = ON_OFF_AUTO_AUTO; 445 mms->rtc = ON_OFF_AUTO_AUTO; 446 mms->isa_serial = true; 447 mms->option_roms = true; 448 mms->auto_kernel_cmdline = true; 449 450 /* State */ 451 mms->kernel_cmdline_fixed = false; 452 } 453 454 static void microvm_class_init(ObjectClass *oc, void *data) 455 { 456 MachineClass *mc = MACHINE_CLASS(oc); 457 458 mc->init = microvm_machine_state_init; 459 460 mc->family = "microvm_i386"; 461 mc->desc = "microvm (i386)"; 462 mc->units_per_default_bus = 1; 463 mc->no_floppy = 1; 464 mc->max_cpus = 288; 465 mc->has_hotpluggable_cpus = false; 466 mc->auto_enable_numa_with_memhp = false; 467 mc->default_cpu_type = TARGET_DEFAULT_CPU_TYPE; 468 mc->nvdimm_supported = false; 469 mc->default_ram_id = "microvm.ram"; 470 471 /* Avoid relying too much on kernel components */ 472 mc->default_kernel_irqchip_split = true; 473 474 /* Machine class handlers */ 475 mc->reset = microvm_machine_reset; 476 477 object_class_property_add(oc, MICROVM_MACHINE_PIC, "OnOffAuto", 478 microvm_machine_get_pic, 479 microvm_machine_set_pic, 480 NULL, NULL); 481 object_class_property_set_description(oc, MICROVM_MACHINE_PIC, 482 "Enable i8259 PIC"); 483 484 object_class_property_add(oc, MICROVM_MACHINE_PIT, "OnOffAuto", 485 microvm_machine_get_pit, 486 microvm_machine_set_pit, 487 NULL, NULL); 488 object_class_property_set_description(oc, MICROVM_MACHINE_PIT, 489 "Enable i8254 PIT"); 490 491 object_class_property_add(oc, MICROVM_MACHINE_RTC, "OnOffAuto", 492 microvm_machine_get_rtc, 493 microvm_machine_set_rtc, 494 NULL, NULL); 495 object_class_property_set_description(oc, MICROVM_MACHINE_RTC, 496 "Enable MC146818 RTC"); 497 498 object_class_property_add_bool(oc, MICROVM_MACHINE_ISA_SERIAL, 499 microvm_machine_get_isa_serial, 500 microvm_machine_set_isa_serial); 501 object_class_property_set_description(oc, MICROVM_MACHINE_ISA_SERIAL, 502 "Set off to disable the instantiation an ISA serial port"); 503 504 object_class_property_add_bool(oc, MICROVM_MACHINE_OPTION_ROMS, 505 microvm_machine_get_option_roms, 506 microvm_machine_set_option_roms); 507 object_class_property_set_description(oc, MICROVM_MACHINE_OPTION_ROMS, 508 "Set off to disable loading option ROMs"); 509 510 object_class_property_add_bool(oc, MICROVM_MACHINE_AUTO_KERNEL_CMDLINE, 511 microvm_machine_get_auto_kernel_cmdline, 512 microvm_machine_set_auto_kernel_cmdline); 513 object_class_property_set_description(oc, 514 MICROVM_MACHINE_AUTO_KERNEL_CMDLINE, 515 "Set off to disable adding virtio-mmio devices to the kernel cmdline"); 516 } 517 518 static const TypeInfo microvm_machine_info = { 519 .name = TYPE_MICROVM_MACHINE, 520 .parent = TYPE_X86_MACHINE, 521 .instance_size = sizeof(MicrovmMachineState), 522 .instance_init = microvm_machine_initfn, 523 .class_size = sizeof(MicrovmMachineClass), 524 .class_init = microvm_class_init, 525 .interfaces = (InterfaceInfo[]) { 526 { } 527 }, 528 }; 529 530 static void microvm_machine_init(void) 531 { 532 type_register_static(µvm_machine_info); 533 } 534 type_init(microvm_machine_init); 535