1 /* Support for generating ACPI tables and passing them to Guests 2 * 3 * Copyright (C) 2008-2010 Kevin O'Connor <kevin@koconnor.net> 4 * Copyright (C) 2006 Fabrice Bellard 5 * Copyright (C) 2013 Red Hat Inc 6 * 7 * Author: Michael S. Tsirkin <mst@redhat.com> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 19 * You should have received a copy of the GNU General Public License along 20 * with this program; if not, see <http://www.gnu.org/licenses/>. 21 */ 22 23 #include "acpi-build.h" 24 #include <stddef.h> 25 #include <glib.h> 26 #include "qemu-common.h" 27 #include "qemu/bitmap.h" 28 #include "qemu/range.h" 29 #include "hw/pci/pci.h" 30 #include "qom/cpu.h" 31 #include "hw/i386/pc.h" 32 #include "target-i386/cpu.h" 33 #include "hw/timer/hpet.h" 34 #include "hw/i386/acpi-defs.h" 35 #include "hw/acpi/acpi.h" 36 #include "hw/nvram/fw_cfg.h" 37 #include "bios-linker-loader.h" 38 #include "hw/loader.h" 39 40 /* Supported chipsets: */ 41 #include "hw/acpi/piix4.h" 42 #include "hw/i386/ich9.h" 43 #include "hw/pci/pci_bus.h" 44 #include "hw/pci-host/q35.h" 45 46 #include "hw/i386/q35-acpi-dsdt.hex" 47 #include "hw/i386/acpi-dsdt.hex" 48 49 #include "qapi/qmp/qint.h" 50 #include "qom/qom-qobject.h" 51 52 typedef struct AcpiCpuInfo { 53 DECLARE_BITMAP(found_cpus, MAX_CPUMASK_BITS + 1); 54 } AcpiCpuInfo; 55 56 typedef struct AcpiMcfgInfo { 57 uint64_t mcfg_base; 58 uint32_t mcfg_size; 59 } AcpiMcfgInfo; 60 61 typedef struct AcpiPmInfo { 62 bool s3_disabled; 63 bool s4_disabled; 64 uint8_t s4_val; 65 uint16_t sci_int; 66 uint8_t acpi_enable_cmd; 67 uint8_t acpi_disable_cmd; 68 uint32_t gpe0_blk; 69 uint32_t gpe0_blk_len; 70 uint32_t io_base; 71 } AcpiPmInfo; 72 73 typedef struct AcpiMiscInfo { 74 bool has_hpet; 75 DECLARE_BITMAP(slot_hotplug_enable, PCI_SLOT_MAX); 76 const unsigned char *dsdt_code; 77 unsigned dsdt_size; 78 uint16_t pvpanic_port; 79 } AcpiMiscInfo; 80 81 static void acpi_get_dsdt(AcpiMiscInfo *info) 82 { 83 Object *piix = piix4_pm_find(); 84 Object *lpc = ich9_lpc_find(); 85 assert(!!piix != !!lpc); 86 87 if (piix) { 88 info->dsdt_code = AcpiDsdtAmlCode; 89 info->dsdt_size = sizeof AcpiDsdtAmlCode; 90 } 91 if (lpc) { 92 info->dsdt_code = Q35AcpiDsdtAmlCode; 93 info->dsdt_size = sizeof Q35AcpiDsdtAmlCode; 94 } 95 } 96 97 static 98 int acpi_add_cpu_info(Object *o, void *opaque) 99 { 100 AcpiCpuInfo *cpu = opaque; 101 uint64_t apic_id; 102 103 if (object_dynamic_cast(o, TYPE_CPU)) { 104 apic_id = object_property_get_int(o, "apic-id", NULL); 105 assert(apic_id <= MAX_CPUMASK_BITS); 106 107 set_bit(apic_id, cpu->found_cpus); 108 } 109 110 object_child_foreach(o, acpi_add_cpu_info, opaque); 111 return 0; 112 } 113 114 static void acpi_get_cpu_info(AcpiCpuInfo *cpu) 115 { 116 Object *root = object_get_root(); 117 118 memset(cpu->found_cpus, 0, sizeof cpu->found_cpus); 119 object_child_foreach(root, acpi_add_cpu_info, cpu); 120 } 121 122 static void acpi_get_pm_info(AcpiPmInfo *pm) 123 { 124 Object *piix = piix4_pm_find(); 125 Object *lpc = ich9_lpc_find(); 126 Object *obj = NULL; 127 QObject *o; 128 129 if (piix) { 130 obj = piix; 131 } 132 if (lpc) { 133 obj = lpc; 134 } 135 assert(obj); 136 137 /* Fill in optional s3/s4 related properties */ 138 o = object_property_get_qobject(obj, ACPI_PM_PROP_S3_DISABLED, NULL); 139 if (o) { 140 pm->s3_disabled = qint_get_int(qobject_to_qint(o)); 141 } else { 142 pm->s3_disabled = false; 143 } 144 o = object_property_get_qobject(obj, ACPI_PM_PROP_S4_DISABLED, NULL); 145 if (o) { 146 pm->s4_disabled = qint_get_int(qobject_to_qint(o)); 147 } else { 148 pm->s4_disabled = false; 149 } 150 o = object_property_get_qobject(obj, ACPI_PM_PROP_S4_VAL, NULL); 151 if (o) { 152 pm->s4_val = qint_get_int(qobject_to_qint(o)); 153 } else { 154 pm->s4_val = false; 155 } 156 157 /* Fill in mandatory properties */ 158 pm->sci_int = object_property_get_int(obj, ACPI_PM_PROP_SCI_INT, NULL); 159 160 pm->acpi_enable_cmd = object_property_get_int(obj, 161 ACPI_PM_PROP_ACPI_ENABLE_CMD, 162 NULL); 163 pm->acpi_disable_cmd = object_property_get_int(obj, 164 ACPI_PM_PROP_ACPI_DISABLE_CMD, 165 NULL); 166 pm->io_base = object_property_get_int(obj, ACPI_PM_PROP_PM_IO_BASE, 167 NULL); 168 pm->gpe0_blk = object_property_get_int(obj, ACPI_PM_PROP_GPE0_BLK, 169 NULL); 170 pm->gpe0_blk_len = object_property_get_int(obj, ACPI_PM_PROP_GPE0_BLK_LEN, 171 NULL); 172 } 173 174 static void acpi_get_hotplug_info(AcpiMiscInfo *misc) 175 { 176 int i; 177 PCIBus *bus = find_i440fx(); 178 179 if (!bus) { 180 /* Only PIIX supports ACPI hotplug */ 181 memset(misc->slot_hotplug_enable, 0, sizeof misc->slot_hotplug_enable); 182 return; 183 } 184 185 memset(misc->slot_hotplug_enable, 0xff, 186 DIV_ROUND_UP(PCI_SLOT_MAX, BITS_PER_BYTE)); 187 188 for (i = 0; i < ARRAY_SIZE(bus->devices); ++i) { 189 PCIDeviceClass *pc; 190 PCIDevice *pdev = bus->devices[i]; 191 192 if (!pdev) { 193 continue; 194 } 195 196 pc = PCI_DEVICE_GET_CLASS(pdev); 197 198 if (pc->no_hotplug) { 199 int slot = PCI_SLOT(i); 200 201 clear_bit(slot, misc->slot_hotplug_enable); 202 } 203 } 204 } 205 206 static void acpi_get_misc_info(AcpiMiscInfo *info) 207 { 208 info->has_hpet = hpet_find(); 209 info->pvpanic_port = pvpanic_port(); 210 } 211 212 static void acpi_get_pci_info(PcPciInfo *info) 213 { 214 Object *pci_host; 215 bool ambiguous; 216 217 pci_host = object_resolve_path_type("", TYPE_PCI_HOST_BRIDGE, &ambiguous); 218 g_assert(!ambiguous); 219 g_assert(pci_host); 220 221 info->w32.begin = object_property_get_int(pci_host, 222 PCI_HOST_PROP_PCI_HOLE_START, 223 NULL); 224 info->w32.end = object_property_get_int(pci_host, 225 PCI_HOST_PROP_PCI_HOLE_END, 226 NULL); 227 info->w64.begin = object_property_get_int(pci_host, 228 PCI_HOST_PROP_PCI_HOLE64_START, 229 NULL); 230 info->w64.end = object_property_get_int(pci_host, 231 PCI_HOST_PROP_PCI_HOLE64_END, 232 NULL); 233 } 234 235 #define ACPI_BUILD_APPNAME "Bochs" 236 #define ACPI_BUILD_APPNAME6 "BOCHS " 237 #define ACPI_BUILD_APPNAME4 "BXPC" 238 239 #define ACPI_BUILD_DPRINTF(level, fmt, ...) do {} while (0) 240 241 #define ACPI_BUILD_TABLE_FILE "etc/acpi/tables" 242 #define ACPI_BUILD_RSDP_FILE "etc/acpi/rsdp" 243 244 static void 245 build_header(GArray *linker, GArray *table_data, 246 AcpiTableHeader *h, uint32_t sig, int len, uint8_t rev) 247 { 248 h->signature = cpu_to_le32(sig); 249 h->length = cpu_to_le32(len); 250 h->revision = rev; 251 memcpy(h->oem_id, ACPI_BUILD_APPNAME6, 6); 252 memcpy(h->oem_table_id, ACPI_BUILD_APPNAME4, 4); 253 memcpy(h->oem_table_id + 4, (void *)&sig, 4); 254 h->oem_revision = cpu_to_le32(1); 255 memcpy(h->asl_compiler_id, ACPI_BUILD_APPNAME4, 4); 256 h->asl_compiler_revision = cpu_to_le32(1); 257 h->checksum = 0; 258 /* Checksum to be filled in by Guest linker */ 259 bios_linker_loader_add_checksum(linker, ACPI_BUILD_TABLE_FILE, 260 table_data->data, h, len, &h->checksum); 261 } 262 263 static inline GArray *build_alloc_array(void) 264 { 265 return g_array_new(false, true /* clear */, 1); 266 } 267 268 static inline void build_free_array(GArray *array) 269 { 270 g_array_free(array, true); 271 } 272 273 static inline void build_prepend_byte(GArray *array, uint8_t val) 274 { 275 g_array_prepend_val(array, val); 276 } 277 278 static inline void build_append_byte(GArray *array, uint8_t val) 279 { 280 g_array_append_val(array, val); 281 } 282 283 static inline void build_append_array(GArray *array, GArray *val) 284 { 285 g_array_append_vals(array, val->data, val->len); 286 } 287 288 static void build_append_nameseg(GArray *array, const char *format, ...) 289 { 290 /* It would be nicer to use g_string_vprintf but it's only there in 2.22 */ 291 char s[] = "XXXX"; 292 int len; 293 va_list args; 294 295 va_start(args, format); 296 len = vsnprintf(s, sizeof s, format, args); 297 va_end(args); 298 299 assert(len == 4); 300 g_array_append_vals(array, s, len); 301 } 302 303 /* 5.4 Definition Block Encoding */ 304 enum { 305 PACKAGE_LENGTH_1BYTE_SHIFT = 6, /* Up to 63 - use extra 2 bits. */ 306 PACKAGE_LENGTH_2BYTE_SHIFT = 4, 307 PACKAGE_LENGTH_3BYTE_SHIFT = 12, 308 PACKAGE_LENGTH_4BYTE_SHIFT = 20, 309 }; 310 311 static void build_prepend_package_length(GArray *package, unsigned min_bytes) 312 { 313 uint8_t byte; 314 unsigned length = package->len; 315 unsigned length_bytes; 316 317 if (length + 1 < (1 << PACKAGE_LENGTH_1BYTE_SHIFT)) { 318 length_bytes = 1; 319 } else if (length + 2 < (1 << PACKAGE_LENGTH_3BYTE_SHIFT)) { 320 length_bytes = 2; 321 } else if (length + 3 < (1 << PACKAGE_LENGTH_4BYTE_SHIFT)) { 322 length_bytes = 3; 323 } else { 324 length_bytes = 4; 325 } 326 327 /* Force length to at least min_bytes. 328 * This wastes memory but that's how bios did it. 329 */ 330 length_bytes = MAX(length_bytes, min_bytes); 331 332 /* PkgLength is the length of the inclusive length of the data. */ 333 length += length_bytes; 334 335 switch (length_bytes) { 336 case 1: 337 byte = length; 338 build_prepend_byte(package, byte); 339 return; 340 case 4: 341 byte = length >> PACKAGE_LENGTH_4BYTE_SHIFT; 342 build_prepend_byte(package, byte); 343 length &= (1 << PACKAGE_LENGTH_4BYTE_SHIFT) - 1; 344 /* fall through */ 345 case 3: 346 byte = length >> PACKAGE_LENGTH_3BYTE_SHIFT; 347 build_prepend_byte(package, byte); 348 length &= (1 << PACKAGE_LENGTH_3BYTE_SHIFT) - 1; 349 /* fall through */ 350 case 2: 351 byte = length >> PACKAGE_LENGTH_2BYTE_SHIFT; 352 build_prepend_byte(package, byte); 353 length &= (1 << PACKAGE_LENGTH_2BYTE_SHIFT) - 1; 354 /* fall through */ 355 } 356 /* 357 * Most significant two bits of byte zero indicate how many following bytes 358 * are in PkgLength encoding. 359 */ 360 byte = ((length_bytes - 1) << PACKAGE_LENGTH_1BYTE_SHIFT) | length; 361 build_prepend_byte(package, byte); 362 } 363 364 static void build_package(GArray *package, uint8_t op, unsigned min_bytes) 365 { 366 build_prepend_package_length(package, min_bytes); 367 build_prepend_byte(package, op); 368 } 369 370 static void build_append_value(GArray *table, uint32_t value, int size) 371 { 372 uint8_t prefix; 373 int i; 374 375 switch (size) { 376 case 1: 377 prefix = 0x0A; /* BytePrefix */ 378 break; 379 case 2: 380 prefix = 0x0B; /* WordPrefix */ 381 break; 382 case 4: 383 prefix = 0x0C; /* DWordPrefix */ 384 break; 385 default: 386 assert(0); 387 return; 388 } 389 build_append_byte(table, prefix); 390 for (i = 0; i < size; ++i) { 391 build_append_byte(table, value & 0xFF); 392 value = value >> 8; 393 } 394 } 395 396 static void build_append_notify_target(GArray *method, GArray *target_name, 397 uint32_t value, int size) 398 { 399 GArray *notify = build_alloc_array(); 400 uint8_t op = 0xA0; /* IfOp */ 401 402 build_append_byte(notify, 0x93); /* LEqualOp */ 403 build_append_byte(notify, 0x68); /* Arg0Op */ 404 build_append_value(notify, value, size); 405 build_append_byte(notify, 0x86); /* NotifyOp */ 406 build_append_array(notify, target_name); 407 build_append_byte(notify, 0x69); /* Arg1Op */ 408 409 /* Pack it up */ 410 build_package(notify, op, 1); 411 412 build_append_array(method, notify); 413 414 build_free_array(notify); 415 } 416 417 #define ACPI_PORT_SMI_CMD 0x00b2 /* TODO: this is APM_CNT_IOPORT */ 418 419 static inline void *acpi_data_push(GArray *table_data, unsigned size) 420 { 421 unsigned off = table_data->len; 422 g_array_set_size(table_data, off + size); 423 return table_data->data + off; 424 } 425 426 static unsigned acpi_data_len(GArray *table) 427 { 428 #if GLIB_CHECK_VERSION(2, 14, 0) 429 assert(g_array_get_element_size(table) == 1); 430 #endif 431 return table->len; 432 } 433 434 static void acpi_align_size(GArray *blob, unsigned align) 435 { 436 /* Align size to multiple of given size. This reduces the chance 437 * we need to change size in the future (breaking cross version migration). 438 */ 439 g_array_set_size(blob, (ROUND_UP(acpi_data_len(blob), align) + 440 g_array_get_element_size(blob) - 1) / 441 g_array_get_element_size(blob)); 442 } 443 444 /* Get pointer within table in a safe manner */ 445 #define ACPI_BUILD_PTR(table, size, off, type) \ 446 ((type *)(acpi_data_get_ptr(table, size, off, sizeof(type)))) 447 448 static inline void *acpi_data_get_ptr(uint8_t *table_data, unsigned table_size, 449 unsigned off, unsigned size) 450 { 451 assert(off + size > off); 452 assert(off + size <= table_size); 453 return table_data + off; 454 } 455 456 static inline void acpi_add_table(GArray *table_offsets, GArray *table_data) 457 { 458 uint32_t offset = cpu_to_le32(table_data->len); 459 g_array_append_val(table_offsets, offset); 460 } 461 462 /* FACS */ 463 static void 464 build_facs(GArray *table_data, GArray *linker, PcGuestInfo *guest_info) 465 { 466 AcpiFacsDescriptorRev1 *facs = acpi_data_push(table_data, sizeof *facs); 467 facs->signature = cpu_to_le32(ACPI_FACS_SIGNATURE); 468 facs->length = cpu_to_le32(sizeof(*facs)); 469 } 470 471 /* Load chipset information in FADT */ 472 static void fadt_setup(AcpiFadtDescriptorRev1 *fadt, AcpiPmInfo *pm) 473 { 474 fadt->model = 1; 475 fadt->reserved1 = 0; 476 fadt->sci_int = cpu_to_le16(pm->sci_int); 477 fadt->smi_cmd = cpu_to_le32(ACPI_PORT_SMI_CMD); 478 fadt->acpi_enable = pm->acpi_enable_cmd; 479 fadt->acpi_disable = pm->acpi_disable_cmd; 480 /* EVT, CNT, TMR offset matches hw/acpi/core.c */ 481 fadt->pm1a_evt_blk = cpu_to_le32(pm->io_base); 482 fadt->pm1a_cnt_blk = cpu_to_le32(pm->io_base + 0x04); 483 fadt->pm_tmr_blk = cpu_to_le32(pm->io_base + 0x08); 484 fadt->gpe0_blk = cpu_to_le32(pm->gpe0_blk); 485 /* EVT, CNT, TMR length matches hw/acpi/core.c */ 486 fadt->pm1_evt_len = 4; 487 fadt->pm1_cnt_len = 2; 488 fadt->pm_tmr_len = 4; 489 fadt->gpe0_blk_len = pm->gpe0_blk_len; 490 fadt->plvl2_lat = cpu_to_le16(0xfff); /* C2 state not supported */ 491 fadt->plvl3_lat = cpu_to_le16(0xfff); /* C3 state not supported */ 492 fadt->flags = cpu_to_le32((1 << ACPI_FADT_F_WBINVD) | 493 (1 << ACPI_FADT_F_PROC_C1) | 494 (1 << ACPI_FADT_F_SLP_BUTTON) | 495 (1 << ACPI_FADT_F_RTC_S4)); 496 fadt->flags |= cpu_to_le32(1 << ACPI_FADT_F_USE_PLATFORM_CLOCK); 497 } 498 499 500 /* FADT */ 501 static void 502 build_fadt(GArray *table_data, GArray *linker, AcpiPmInfo *pm, 503 unsigned facs, unsigned dsdt) 504 { 505 AcpiFadtDescriptorRev1 *fadt = acpi_data_push(table_data, sizeof(*fadt)); 506 507 fadt->firmware_ctrl = cpu_to_le32(facs); 508 /* FACS address to be filled by Guest linker */ 509 bios_linker_loader_add_pointer(linker, ACPI_BUILD_TABLE_FILE, 510 ACPI_BUILD_TABLE_FILE, 511 table_data, &fadt->firmware_ctrl, 512 sizeof fadt->firmware_ctrl); 513 514 fadt->dsdt = cpu_to_le32(dsdt); 515 /* DSDT address to be filled by Guest linker */ 516 bios_linker_loader_add_pointer(linker, ACPI_BUILD_TABLE_FILE, 517 ACPI_BUILD_TABLE_FILE, 518 table_data, &fadt->dsdt, 519 sizeof fadt->dsdt); 520 521 fadt_setup(fadt, pm); 522 523 build_header(linker, table_data, 524 (void *)fadt, ACPI_FACP_SIGNATURE, sizeof(*fadt), 1); 525 } 526 527 static void 528 build_madt(GArray *table_data, GArray *linker, AcpiCpuInfo *cpu, 529 PcGuestInfo *guest_info) 530 { 531 int madt_start = table_data->len; 532 533 AcpiMultipleApicTable *madt; 534 AcpiMadtIoApic *io_apic; 535 AcpiMadtIntsrcovr *intsrcovr; 536 AcpiMadtLocalNmi *local_nmi; 537 int i; 538 539 madt = acpi_data_push(table_data, sizeof *madt); 540 madt->local_apic_address = cpu_to_le32(APIC_DEFAULT_ADDRESS); 541 madt->flags = cpu_to_le32(1); 542 543 for (i = 0; i < guest_info->apic_id_limit; i++) { 544 AcpiMadtProcessorApic *apic = acpi_data_push(table_data, sizeof *apic); 545 apic->type = ACPI_APIC_PROCESSOR; 546 apic->length = sizeof(*apic); 547 apic->processor_id = i; 548 apic->local_apic_id = i; 549 if (test_bit(i, cpu->found_cpus)) { 550 apic->flags = cpu_to_le32(1); 551 } else { 552 apic->flags = cpu_to_le32(0); 553 } 554 } 555 io_apic = acpi_data_push(table_data, sizeof *io_apic); 556 io_apic->type = ACPI_APIC_IO; 557 io_apic->length = sizeof(*io_apic); 558 #define ACPI_BUILD_IOAPIC_ID 0x0 559 io_apic->io_apic_id = ACPI_BUILD_IOAPIC_ID; 560 io_apic->address = cpu_to_le32(IO_APIC_DEFAULT_ADDRESS); 561 io_apic->interrupt = cpu_to_le32(0); 562 563 if (guest_info->apic_xrupt_override) { 564 intsrcovr = acpi_data_push(table_data, sizeof *intsrcovr); 565 intsrcovr->type = ACPI_APIC_XRUPT_OVERRIDE; 566 intsrcovr->length = sizeof(*intsrcovr); 567 intsrcovr->source = 0; 568 intsrcovr->gsi = cpu_to_le32(2); 569 intsrcovr->flags = cpu_to_le16(0); /* conforms to bus specifications */ 570 } 571 for (i = 1; i < 16; i++) { 572 #define ACPI_BUILD_PCI_IRQS ((1<<5) | (1<<9) | (1<<10) | (1<<11)) 573 if (!(ACPI_BUILD_PCI_IRQS & (1 << i))) { 574 /* No need for a INT source override structure. */ 575 continue; 576 } 577 intsrcovr = acpi_data_push(table_data, sizeof *intsrcovr); 578 intsrcovr->type = ACPI_APIC_XRUPT_OVERRIDE; 579 intsrcovr->length = sizeof(*intsrcovr); 580 intsrcovr->source = i; 581 intsrcovr->gsi = cpu_to_le32(i); 582 intsrcovr->flags = cpu_to_le16(0xd); /* active high, level triggered */ 583 } 584 585 local_nmi = acpi_data_push(table_data, sizeof *local_nmi); 586 local_nmi->type = ACPI_APIC_LOCAL_NMI; 587 local_nmi->length = sizeof(*local_nmi); 588 local_nmi->processor_id = 0xff; /* all processors */ 589 local_nmi->flags = cpu_to_le16(0); 590 local_nmi->lint = 1; /* ACPI_LINT1 */ 591 592 build_header(linker, table_data, 593 (void *)(table_data->data + madt_start), ACPI_APIC_SIGNATURE, 594 table_data->len - madt_start, 1); 595 } 596 597 /* Encode a hex value */ 598 static inline char acpi_get_hex(uint32_t val) 599 { 600 val &= 0x0f; 601 return (val <= 9) ? ('0' + val) : ('A' + val - 10); 602 } 603 604 #include "hw/i386/ssdt-proc.hex" 605 606 /* 0x5B 0x83 ProcessorOp PkgLength NameString ProcID */ 607 #define ACPI_PROC_OFFSET_CPUHEX (*ssdt_proc_name - *ssdt_proc_start + 2) 608 #define ACPI_PROC_OFFSET_CPUID1 (*ssdt_proc_name - *ssdt_proc_start + 4) 609 #define ACPI_PROC_OFFSET_CPUID2 (*ssdt_proc_id - *ssdt_proc_start) 610 #define ACPI_PROC_SIZEOF (*ssdt_proc_end - *ssdt_proc_start) 611 #define ACPI_PROC_AML (ssdp_proc_aml + *ssdt_proc_start) 612 613 /* 0x5B 0x82 DeviceOp PkgLength NameString */ 614 #define ACPI_PCIHP_OFFSET_HEX (*ssdt_pcihp_name - *ssdt_pcihp_start + 1) 615 #define ACPI_PCIHP_OFFSET_ID (*ssdt_pcihp_id - *ssdt_pcihp_start) 616 #define ACPI_PCIHP_OFFSET_ADR (*ssdt_pcihp_adr - *ssdt_pcihp_start) 617 #define ACPI_PCIHP_OFFSET_EJ0 (*ssdt_pcihp_ej0 - *ssdt_pcihp_start) 618 #define ACPI_PCIHP_SIZEOF (*ssdt_pcihp_end - *ssdt_pcihp_start) 619 #define ACPI_PCIHP_AML (ssdp_pcihp_aml + *ssdt_pcihp_start) 620 621 #define ACPI_SSDT_SIGNATURE 0x54445353 /* SSDT */ 622 #define ACPI_SSDT_HEADER_LENGTH 36 623 624 #include "hw/i386/ssdt-misc.hex" 625 #include "hw/i386/ssdt-pcihp.hex" 626 627 static void 628 build_append_notify(GArray *device, const char *name, 629 const char *format, int skip, int count) 630 { 631 int i; 632 GArray *method = build_alloc_array(); 633 uint8_t op = 0x14; /* MethodOp */ 634 635 build_append_nameseg(method, name); 636 build_append_byte(method, 0x02); /* MethodFlags: ArgCount */ 637 for (i = skip; i < count; i++) { 638 GArray *target = build_alloc_array(); 639 build_append_nameseg(target, format, i); 640 assert(i < 256); /* Fits in 1 byte */ 641 build_append_notify_target(method, target, i, 1); 642 build_free_array(target); 643 } 644 build_package(method, op, 2); 645 646 build_append_array(device, method); 647 build_free_array(method); 648 } 649 650 static void patch_pcihp(int slot, uint8_t *ssdt_ptr, uint32_t eject) 651 { 652 ssdt_ptr[ACPI_PCIHP_OFFSET_HEX] = acpi_get_hex(slot >> 4); 653 ssdt_ptr[ACPI_PCIHP_OFFSET_HEX + 1] = acpi_get_hex(slot); 654 ssdt_ptr[ACPI_PCIHP_OFFSET_ID] = slot; 655 ssdt_ptr[ACPI_PCIHP_OFFSET_ADR + 2] = slot; 656 657 /* Runtime patching of ACPI_EJ0: to disable hotplug for a slot, 658 * replace the method name: _EJ0 by ACPI_EJ0_. 659 */ 660 /* Sanity check */ 661 assert(!memcmp(ssdt_ptr + ACPI_PCIHP_OFFSET_EJ0, "_EJ0", 4)); 662 663 if (!eject) { 664 memcpy(ssdt_ptr + ACPI_PCIHP_OFFSET_EJ0, "EJ0_", 4); 665 } 666 } 667 668 static void patch_pci_windows(PcPciInfo *pci, uint8_t *start, unsigned size) 669 { 670 *ACPI_BUILD_PTR(start, size, acpi_pci32_start[0], uint32_t) = 671 cpu_to_le32(pci->w32.begin); 672 673 *ACPI_BUILD_PTR(start, size, acpi_pci32_end[0], uint32_t) = 674 cpu_to_le32(pci->w32.end - 1); 675 676 if (pci->w64.end || pci->w64.begin) { 677 *ACPI_BUILD_PTR(start, size, acpi_pci64_valid[0], uint8_t) = 1; 678 *ACPI_BUILD_PTR(start, size, acpi_pci64_start[0], uint64_t) = 679 cpu_to_le64(pci->w64.begin); 680 *ACPI_BUILD_PTR(start, size, acpi_pci64_end[0], uint64_t) = 681 cpu_to_le64(pci->w64.end - 1); 682 *ACPI_BUILD_PTR(start, size, acpi_pci64_length[0], uint64_t) = 683 cpu_to_le64(pci->w64.end - pci->w64.begin); 684 } else { 685 *ACPI_BUILD_PTR(start, size, acpi_pci64_valid[0], uint8_t) = 0; 686 } 687 } 688 689 static void 690 build_ssdt(GArray *table_data, GArray *linker, 691 AcpiCpuInfo *cpu, AcpiPmInfo *pm, AcpiMiscInfo *misc, 692 PcPciInfo *pci, PcGuestInfo *guest_info) 693 { 694 int acpi_cpus = MIN(0xff, guest_info->apic_id_limit); 695 int ssdt_start = table_data->len; 696 uint8_t *ssdt_ptr; 697 int i; 698 699 /* Copy header and patch values in the S3_ / S4_ / S5_ packages */ 700 ssdt_ptr = acpi_data_push(table_data, sizeof(ssdp_misc_aml)); 701 memcpy(ssdt_ptr, ssdp_misc_aml, sizeof(ssdp_misc_aml)); 702 if (pm->s3_disabled) { 703 ssdt_ptr[acpi_s3_name[0]] = 'X'; 704 } 705 if (pm->s4_disabled) { 706 ssdt_ptr[acpi_s4_name[0]] = 'X'; 707 } else { 708 ssdt_ptr[acpi_s4_pkg[0] + 1] = ssdt_ptr[acpi_s4_pkg[0] + 3] = 709 pm->s4_val; 710 } 711 712 patch_pci_windows(pci, ssdt_ptr, sizeof(ssdp_misc_aml)); 713 714 *(uint16_t *)(ssdt_ptr + *ssdt_isa_pest) = 715 cpu_to_le16(misc->pvpanic_port); 716 717 { 718 GArray *sb_scope = build_alloc_array(); 719 uint8_t op = 0x10; /* ScopeOp */ 720 721 build_append_nameseg(sb_scope, "_SB_"); 722 723 /* build Processor object for each processor */ 724 for (i = 0; i < acpi_cpus; i++) { 725 uint8_t *proc = acpi_data_push(sb_scope, ACPI_PROC_SIZEOF); 726 memcpy(proc, ACPI_PROC_AML, ACPI_PROC_SIZEOF); 727 proc[ACPI_PROC_OFFSET_CPUHEX] = acpi_get_hex(i >> 4); 728 proc[ACPI_PROC_OFFSET_CPUHEX+1] = acpi_get_hex(i); 729 proc[ACPI_PROC_OFFSET_CPUID1] = i; 730 proc[ACPI_PROC_OFFSET_CPUID2] = i; 731 } 732 733 /* build this code: 734 * Method(NTFY, 2) {If (LEqual(Arg0, 0x00)) {Notify(CP00, Arg1)} ...} 735 */ 736 /* Arg0 = Processor ID = APIC ID */ 737 build_append_notify(sb_scope, "NTFY", "CP%0.02X", 0, acpi_cpus); 738 739 /* build "Name(CPON, Package() { One, One, ..., Zero, Zero, ... })" */ 740 build_append_byte(sb_scope, 0x08); /* NameOp */ 741 build_append_nameseg(sb_scope, "CPON"); 742 743 { 744 GArray *package = build_alloc_array(); 745 uint8_t op = 0x12; /* PackageOp */ 746 747 build_append_byte(package, acpi_cpus); /* NumElements */ 748 for (i = 0; i < acpi_cpus; i++) { 749 uint8_t b = test_bit(i, cpu->found_cpus) ? 0x01 : 0x00; 750 build_append_byte(package, b); 751 } 752 753 build_package(package, op, 2); 754 build_append_array(sb_scope, package); 755 build_free_array(package); 756 } 757 758 { 759 GArray *pci0 = build_alloc_array(); 760 uint8_t op = 0x10; /* ScopeOp */; 761 762 build_append_nameseg(pci0, "PCI0"); 763 764 /* build Device object for each slot */ 765 for (i = 1; i < PCI_SLOT_MAX; i++) { 766 bool eject = test_bit(i, misc->slot_hotplug_enable); 767 void *pcihp = acpi_data_push(pci0, ACPI_PCIHP_SIZEOF); 768 769 memcpy(pcihp, ACPI_PCIHP_AML, ACPI_PCIHP_SIZEOF); 770 patch_pcihp(i, pcihp, eject); 771 } 772 773 build_append_notify(pci0, "PCNT", "S%0.02X_", 1, PCI_SLOT_MAX); 774 build_package(pci0, op, 3); 775 build_append_array(sb_scope, pci0); 776 build_free_array(pci0); 777 } 778 779 build_package(sb_scope, op, 3); 780 build_append_array(table_data, sb_scope); 781 build_free_array(sb_scope); 782 } 783 784 build_header(linker, table_data, 785 (void *)(table_data->data + ssdt_start), 786 ACPI_SSDT_SIGNATURE, table_data->len - ssdt_start, 1); 787 } 788 789 static void 790 build_hpet(GArray *table_data, GArray *linker) 791 { 792 Acpi20Hpet *hpet; 793 794 hpet = acpi_data_push(table_data, sizeof(*hpet)); 795 /* Note timer_block_id value must be kept in sync with value advertised by 796 * emulated hpet 797 */ 798 hpet->timer_block_id = cpu_to_le32(0x8086a201); 799 hpet->addr.address = cpu_to_le64(HPET_BASE); 800 build_header(linker, table_data, 801 (void *)hpet, ACPI_HPET_SIGNATURE, sizeof(*hpet), 1); 802 } 803 804 static void 805 acpi_build_srat_memory(AcpiSratMemoryAffinity *numamem, 806 uint64_t base, uint64_t len, int node, int enabled) 807 { 808 numamem->type = ACPI_SRAT_MEMORY; 809 numamem->length = sizeof(*numamem); 810 memset(numamem->proximity, 0, 4); 811 numamem->proximity[0] = node; 812 numamem->flags = cpu_to_le32(!!enabled); 813 numamem->base_addr = cpu_to_le64(base); 814 numamem->range_length = cpu_to_le64(len); 815 } 816 817 static void 818 build_srat(GArray *table_data, GArray *linker, 819 AcpiCpuInfo *cpu, PcGuestInfo *guest_info) 820 { 821 AcpiSystemResourceAffinityTable *srat; 822 AcpiSratProcessorAffinity *core; 823 AcpiSratMemoryAffinity *numamem; 824 825 int i; 826 uint64_t curnode; 827 int srat_start, numa_start, slots; 828 uint64_t mem_len, mem_base, next_base; 829 830 srat_start = table_data->len; 831 832 srat = acpi_data_push(table_data, sizeof *srat); 833 srat->reserved1 = cpu_to_le32(1); 834 core = (void *)(srat + 1); 835 836 for (i = 0; i < guest_info->apic_id_limit; ++i) { 837 core = acpi_data_push(table_data, sizeof *core); 838 core->type = ACPI_SRAT_PROCESSOR; 839 core->length = sizeof(*core); 840 core->local_apic_id = i; 841 curnode = guest_info->node_cpu[i]; 842 core->proximity_lo = curnode; 843 memset(core->proximity_hi, 0, 3); 844 core->local_sapic_eid = 0; 845 if (test_bit(i, cpu->found_cpus)) { 846 core->flags = cpu_to_le32(1); 847 } else { 848 core->flags = cpu_to_le32(0); 849 } 850 } 851 852 853 /* the memory map is a bit tricky, it contains at least one hole 854 * from 640k-1M and possibly another one from 3.5G-4G. 855 */ 856 next_base = 0; 857 numa_start = table_data->len; 858 859 numamem = acpi_data_push(table_data, sizeof *numamem); 860 acpi_build_srat_memory(numamem, 0, 640*1024, 0, 1); 861 next_base = 1024 * 1024; 862 for (i = 1; i < guest_info->numa_nodes + 1; ++i) { 863 mem_base = next_base; 864 mem_len = guest_info->node_mem[i - 1]; 865 if (i == 1) { 866 mem_len -= 1024 * 1024; 867 } 868 next_base = mem_base + mem_len; 869 870 /* Cut out the ACPI_PCI hole */ 871 if (mem_base <= guest_info->ram_size && 872 next_base > guest_info->ram_size) { 873 mem_len -= next_base - guest_info->ram_size; 874 if (mem_len > 0) { 875 numamem = acpi_data_push(table_data, sizeof *numamem); 876 acpi_build_srat_memory(numamem, mem_base, mem_len, i-1, 1); 877 } 878 mem_base = 1ULL << 32; 879 mem_len = next_base - guest_info->ram_size; 880 next_base += (1ULL << 32) - guest_info->ram_size; 881 } 882 numamem = acpi_data_push(table_data, sizeof *numamem); 883 acpi_build_srat_memory(numamem, mem_base, mem_len, i - 1, 1); 884 } 885 slots = (table_data->len - numa_start) / sizeof *numamem; 886 for (; slots < guest_info->numa_nodes + 2; slots++) { 887 numamem = acpi_data_push(table_data, sizeof *numamem); 888 acpi_build_srat_memory(numamem, 0, 0, 0, 0); 889 } 890 891 build_header(linker, table_data, 892 (void *)(table_data->data + srat_start), 893 ACPI_SRAT_SIGNATURE, 894 table_data->len - srat_start, 1); 895 } 896 897 static void 898 build_mcfg_q35(GArray *table_data, GArray *linker, AcpiMcfgInfo *info) 899 { 900 AcpiTableMcfg *mcfg; 901 uint32_t sig; 902 int len = sizeof(*mcfg) + 1 * sizeof(mcfg->allocation[0]); 903 904 mcfg = acpi_data_push(table_data, len); 905 mcfg->allocation[0].address = cpu_to_le64(info->mcfg_base); 906 /* Only a single allocation so no need to play with segments */ 907 mcfg->allocation[0].pci_segment = cpu_to_le16(0); 908 mcfg->allocation[0].start_bus_number = 0; 909 mcfg->allocation[0].end_bus_number = PCIE_MMCFG_BUS(info->mcfg_size - 1); 910 911 /* MCFG is used for ECAM which can be enabled or disabled by guest. 912 * To avoid table size changes (which create migration issues), 913 * always create the table even if there are no allocations, 914 * but set the signature to a reserved value in this case. 915 * ACPI spec requires OSPMs to ignore such tables. 916 */ 917 if (info->mcfg_base == PCIE_BASE_ADDR_UNMAPPED) { 918 sig = ACPI_RSRV_SIGNATURE; 919 } else { 920 sig = ACPI_MCFG_SIGNATURE; 921 } 922 build_header(linker, table_data, (void *)mcfg, sig, len, 1); 923 } 924 925 static void 926 build_dsdt(GArray *table_data, GArray *linker, AcpiMiscInfo *misc) 927 { 928 void *dsdt; 929 assert(misc->dsdt_code && misc->dsdt_size); 930 dsdt = acpi_data_push(table_data, misc->dsdt_size); 931 memcpy(dsdt, misc->dsdt_code, misc->dsdt_size); 932 } 933 934 /* Build final rsdt table */ 935 static void 936 build_rsdt(GArray *table_data, GArray *linker, GArray *table_offsets) 937 { 938 AcpiRsdtDescriptorRev1 *rsdt; 939 size_t rsdt_len; 940 int i; 941 942 rsdt_len = sizeof(*rsdt) + sizeof(uint32_t) * table_offsets->len; 943 rsdt = acpi_data_push(table_data, rsdt_len); 944 memcpy(rsdt->table_offset_entry, table_offsets->data, 945 sizeof(uint32_t) * table_offsets->len); 946 for (i = 0; i < table_offsets->len; ++i) { 947 /* rsdt->table_offset_entry to be filled by Guest linker */ 948 bios_linker_loader_add_pointer(linker, 949 ACPI_BUILD_TABLE_FILE, 950 ACPI_BUILD_TABLE_FILE, 951 table_data, &rsdt->table_offset_entry[i], 952 sizeof(uint32_t)); 953 } 954 build_header(linker, table_data, 955 (void *)rsdt, ACPI_RSDT_SIGNATURE, rsdt_len, 1); 956 } 957 958 static GArray * 959 build_rsdp(GArray *rsdp_table, GArray *linker, unsigned rsdt) 960 { 961 AcpiRsdpDescriptor *rsdp = acpi_data_push(rsdp_table, sizeof *rsdp); 962 963 bios_linker_loader_alloc(linker, ACPI_BUILD_RSDP_FILE, 1, 964 true /* fseg memory */); 965 966 rsdp->signature = cpu_to_le64(ACPI_RSDP_SIGNATURE); 967 memcpy(rsdp->oem_id, ACPI_BUILD_APPNAME6, 6); 968 rsdp->rsdt_physical_address = cpu_to_le32(rsdt); 969 /* Address to be filled by Guest linker */ 970 bios_linker_loader_add_pointer(linker, ACPI_BUILD_RSDP_FILE, 971 ACPI_BUILD_TABLE_FILE, 972 rsdp_table, &rsdp->rsdt_physical_address, 973 sizeof rsdp->rsdt_physical_address); 974 rsdp->checksum = 0; 975 /* Checksum to be filled by Guest linker */ 976 bios_linker_loader_add_checksum(linker, ACPI_BUILD_RSDP_FILE, 977 rsdp, rsdp, sizeof *rsdp, &rsdp->checksum); 978 979 return rsdp_table; 980 } 981 982 typedef 983 struct AcpiBuildTables { 984 GArray *table_data; 985 GArray *rsdp; 986 GArray *linker; 987 } AcpiBuildTables; 988 989 static inline void acpi_build_tables_init(AcpiBuildTables *tables) 990 { 991 tables->rsdp = g_array_new(false, true /* clear */, 1); 992 tables->table_data = g_array_new(false, true /* clear */, 1); 993 tables->linker = bios_linker_loader_init(); 994 } 995 996 static inline void acpi_build_tables_cleanup(AcpiBuildTables *tables, bool mfre) 997 { 998 void *linker_data = bios_linker_loader_cleanup(tables->linker); 999 if (mfre) { 1000 g_free(linker_data); 1001 } 1002 g_array_free(tables->rsdp, mfre); 1003 g_array_free(tables->table_data, mfre); 1004 } 1005 1006 typedef 1007 struct AcpiBuildState { 1008 /* Copy of table in RAM (for patching). */ 1009 uint8_t *table_ram; 1010 uint32_t table_size; 1011 /* Is table patched? */ 1012 uint8_t patched; 1013 PcGuestInfo *guest_info; 1014 } AcpiBuildState; 1015 1016 static bool acpi_get_mcfg(AcpiMcfgInfo *mcfg) 1017 { 1018 Object *pci_host; 1019 QObject *o; 1020 bool ambiguous; 1021 1022 pci_host = object_resolve_path_type("", TYPE_PCI_HOST_BRIDGE, &ambiguous); 1023 g_assert(!ambiguous); 1024 g_assert(pci_host); 1025 1026 o = object_property_get_qobject(pci_host, PCIE_HOST_MCFG_BASE, NULL); 1027 if (!o) { 1028 return false; 1029 } 1030 mcfg->mcfg_base = qint_get_int(qobject_to_qint(o)); 1031 1032 o = object_property_get_qobject(pci_host, PCIE_HOST_MCFG_SIZE, NULL); 1033 assert(o); 1034 mcfg->mcfg_size = qint_get_int(qobject_to_qint(o)); 1035 return true; 1036 } 1037 1038 static 1039 void acpi_build(PcGuestInfo *guest_info, AcpiBuildTables *tables) 1040 { 1041 GArray *table_offsets; 1042 unsigned facs, dsdt, rsdt; 1043 AcpiCpuInfo cpu; 1044 AcpiPmInfo pm; 1045 AcpiMiscInfo misc; 1046 AcpiMcfgInfo mcfg; 1047 PcPciInfo pci; 1048 uint8_t *u; 1049 1050 acpi_get_cpu_info(&cpu); 1051 acpi_get_pm_info(&pm); 1052 acpi_get_dsdt(&misc); 1053 acpi_get_hotplug_info(&misc); 1054 acpi_get_misc_info(&misc); 1055 acpi_get_pci_info(&pci); 1056 1057 table_offsets = g_array_new(false, true /* clear */, 1058 sizeof(uint32_t)); 1059 ACPI_BUILD_DPRINTF(3, "init ACPI tables\n"); 1060 1061 bios_linker_loader_alloc(tables->linker, ACPI_BUILD_TABLE_FILE, 1062 64 /* Ensure FACS is aligned */, 1063 false /* high memory */); 1064 1065 /* 1066 * FACS is pointed to by FADT. 1067 * We place it first since it's the only table that has alignment 1068 * requirements. 1069 */ 1070 facs = tables->table_data->len; 1071 build_facs(tables->table_data, tables->linker, guest_info); 1072 1073 /* DSDT is pointed to by FADT */ 1074 dsdt = tables->table_data->len; 1075 build_dsdt(tables->table_data, tables->linker, &misc); 1076 1077 /* ACPI tables pointed to by RSDT */ 1078 acpi_add_table(table_offsets, tables->table_data); 1079 build_fadt(tables->table_data, tables->linker, &pm, facs, dsdt); 1080 acpi_add_table(table_offsets, tables->table_data); 1081 1082 build_ssdt(tables->table_data, tables->linker, &cpu, &pm, &misc, &pci, 1083 guest_info); 1084 acpi_add_table(table_offsets, tables->table_data); 1085 1086 build_madt(tables->table_data, tables->linker, &cpu, guest_info); 1087 acpi_add_table(table_offsets, tables->table_data); 1088 if (misc.has_hpet) { 1089 build_hpet(tables->table_data, tables->linker); 1090 } 1091 if (guest_info->numa_nodes) { 1092 acpi_add_table(table_offsets, tables->table_data); 1093 build_srat(tables->table_data, tables->linker, &cpu, guest_info); 1094 } 1095 if (acpi_get_mcfg(&mcfg)) { 1096 acpi_add_table(table_offsets, tables->table_data); 1097 build_mcfg_q35(tables->table_data, tables->linker, &mcfg); 1098 } 1099 1100 /* Add tables supplied by user (if any) */ 1101 for (u = acpi_table_first(); u; u = acpi_table_next(u)) { 1102 unsigned len = acpi_table_len(u); 1103 1104 acpi_add_table(table_offsets, tables->table_data); 1105 g_array_append_vals(tables->table_data, u, len); 1106 } 1107 1108 /* RSDT is pointed to by RSDP */ 1109 rsdt = tables->table_data->len; 1110 build_rsdt(tables->table_data, tables->linker, table_offsets); 1111 1112 /* RSDP is in FSEG memory, so allocate it separately */ 1113 build_rsdp(tables->rsdp, tables->linker, rsdt); 1114 1115 /* We'll expose it all to Guest so align size to reduce 1116 * chance of size changes. 1117 * RSDP is small so it's easy to keep it immutable, no need to 1118 * bother with alignment. 1119 */ 1120 acpi_align_size(tables->table_data, 0x1000); 1121 1122 acpi_align_size(tables->linker, 0x1000); 1123 1124 /* Cleanup memory that's no longer used. */ 1125 g_array_free(table_offsets, true); 1126 } 1127 1128 static void acpi_build_update(void *build_opaque, uint32_t offset) 1129 { 1130 AcpiBuildState *build_state = build_opaque; 1131 AcpiBuildTables tables; 1132 1133 /* No state to update or already patched? Nothing to do. */ 1134 if (!build_state || build_state->patched) { 1135 return; 1136 } 1137 build_state->patched = 1; 1138 1139 acpi_build_tables_init(&tables); 1140 1141 acpi_build(build_state->guest_info, &tables); 1142 1143 assert(acpi_data_len(tables.table_data) == build_state->table_size); 1144 memcpy(build_state->table_ram, tables.table_data->data, 1145 build_state->table_size); 1146 1147 acpi_build_tables_cleanup(&tables, true); 1148 } 1149 1150 static void acpi_build_reset(void *build_opaque) 1151 { 1152 AcpiBuildState *build_state = build_opaque; 1153 build_state->patched = 0; 1154 } 1155 1156 static void *acpi_add_rom_blob(AcpiBuildState *build_state, GArray *blob, 1157 const char *name) 1158 { 1159 return rom_add_blob(name, blob->data, acpi_data_len(blob), -1, name, 1160 acpi_build_update, build_state); 1161 } 1162 1163 static const VMStateDescription vmstate_acpi_build = { 1164 .name = "acpi_build", 1165 .version_id = 1, 1166 .minimum_version_id = 1, 1167 .minimum_version_id_old = 1, 1168 .fields = (VMStateField[]) { 1169 VMSTATE_UINT8(patched, AcpiBuildState), 1170 VMSTATE_END_OF_LIST() 1171 }, 1172 }; 1173 1174 void acpi_setup(PcGuestInfo *guest_info) 1175 { 1176 AcpiBuildTables tables; 1177 AcpiBuildState *build_state; 1178 1179 if (!guest_info->fw_cfg) { 1180 ACPI_BUILD_DPRINTF(3, "No fw cfg. Bailing out.\n"); 1181 return; 1182 } 1183 1184 if (!guest_info->has_acpi_build) { 1185 ACPI_BUILD_DPRINTF(3, "ACPI build disabled. Bailing out.\n"); 1186 return; 1187 } 1188 1189 if (!acpi_enabled) { 1190 ACPI_BUILD_DPRINTF(3, "ACPI disabled. Bailing out.\n"); 1191 return; 1192 } 1193 1194 build_state = g_malloc0(sizeof *build_state); 1195 1196 build_state->guest_info = guest_info; 1197 1198 acpi_build_tables_init(&tables); 1199 acpi_build(build_state->guest_info, &tables); 1200 1201 /* Now expose it all to Guest */ 1202 build_state->table_ram = acpi_add_rom_blob(build_state, tables.table_data, 1203 ACPI_BUILD_TABLE_FILE); 1204 build_state->table_size = acpi_data_len(tables.table_data); 1205 1206 acpi_add_rom_blob(NULL, tables.linker, "etc/table-loader"); 1207 1208 /* 1209 * RSDP is small so it's easy to keep it immutable, no need to 1210 * bother with ROM blobs. 1211 */ 1212 fw_cfg_add_file(guest_info->fw_cfg, ACPI_BUILD_RSDP_FILE, 1213 tables.rsdp->data, acpi_data_len(tables.rsdp)); 1214 1215 qemu_register_reset(acpi_build_reset, build_state); 1216 acpi_build_reset(build_state); 1217 vmstate_register(NULL, 0, &vmstate_acpi_build, build_state); 1218 1219 /* Cleanup tables but don't free the memory: we track it 1220 * in build_state. 1221 */ 1222 acpi_build_tables_cleanup(&tables, false); 1223 } 1224