1 /* 2 * QEMU I2C bus interface. 3 * 4 * Copyright (c) 2007 CodeSourcery. 5 * Written by Paul Brook 6 * 7 * This code is licensed under the LGPL. 8 */ 9 10 #include "qemu/osdep.h" 11 #include "hw/i2c/i2c.h" 12 #include "hw/qdev-properties.h" 13 #include "migration/vmstate.h" 14 #include "qapi/error.h" 15 #include "qemu/module.h" 16 #include "qemu/main-loop.h" 17 #include "trace.h" 18 19 #define I2C_BROADCAST 0x00 20 21 static Property i2c_props[] = { 22 DEFINE_PROP_UINT8("address", struct I2CSlave, address, 0), 23 DEFINE_PROP_END_OF_LIST(), 24 }; 25 26 static const TypeInfo i2c_bus_info = { 27 .name = TYPE_I2C_BUS, 28 .parent = TYPE_BUS, 29 .instance_size = sizeof(I2CBus), 30 }; 31 32 static int i2c_bus_pre_save(void *opaque) 33 { 34 I2CBus *bus = opaque; 35 36 bus->saved_address = -1; 37 if (!QLIST_EMPTY(&bus->current_devs)) { 38 if (!bus->broadcast) { 39 bus->saved_address = QLIST_FIRST(&bus->current_devs)->elt->address; 40 } else { 41 bus->saved_address = I2C_BROADCAST; 42 } 43 } 44 45 return 0; 46 } 47 48 static const VMStateDescription vmstate_i2c_bus = { 49 .name = "i2c_bus", 50 .version_id = 1, 51 .minimum_version_id = 1, 52 .pre_save = i2c_bus_pre_save, 53 .fields = (VMStateField[]) { 54 VMSTATE_UINT8(saved_address, I2CBus), 55 VMSTATE_END_OF_LIST() 56 } 57 }; 58 59 /* Create a new I2C bus. */ 60 I2CBus *i2c_init_bus(DeviceState *parent, const char *name) 61 { 62 I2CBus *bus; 63 64 bus = I2C_BUS(qbus_new(TYPE_I2C_BUS, parent, name)); 65 QLIST_INIT(&bus->current_devs); 66 QSIMPLEQ_INIT(&bus->pending_masters); 67 vmstate_register(NULL, VMSTATE_INSTANCE_ID_ANY, &vmstate_i2c_bus, bus); 68 return bus; 69 } 70 71 void i2c_slave_set_address(I2CSlave *dev, uint8_t address) 72 { 73 dev->address = address; 74 } 75 76 /* Return nonzero if bus is busy. */ 77 int i2c_bus_busy(I2CBus *bus) 78 { 79 return !QLIST_EMPTY(&bus->current_devs) || bus->bh; 80 } 81 82 bool i2c_scan_bus(I2CBus *bus, uint8_t address, bool broadcast, 83 I2CNodeList *current_devs) 84 { 85 BusChild *kid; 86 87 QTAILQ_FOREACH(kid, &bus->qbus.children, sibling) { 88 DeviceState *qdev = kid->child; 89 I2CSlave *candidate = I2C_SLAVE(qdev); 90 I2CSlaveClass *sc = I2C_SLAVE_GET_CLASS(candidate); 91 92 if (sc->match_and_add(candidate, address, broadcast, current_devs)) { 93 if (!broadcast) { 94 return true; 95 } 96 } 97 } 98 99 /* 100 * If broadcast was true, and the list was full or empty, return true. If 101 * broadcast was false, return false. 102 */ 103 return broadcast; 104 } 105 106 /* TODO: Make this handle multiple masters. */ 107 /* 108 * Start or continue an i2c transaction. When this is called for the 109 * first time or after an i2c_end_transfer(), if it returns an error 110 * the bus transaction is terminated (or really never started). If 111 * this is called after another i2c_start_transfer() without an 112 * intervening i2c_end_transfer(), and it returns an error, the 113 * transaction will not be terminated. The caller must do it. 114 * 115 * This corresponds with the way real hardware works. The SMBus 116 * protocol uses a start transfer to switch from write to read mode 117 * without releasing the bus. If that fails, the bus is still 118 * in a transaction. 119 * 120 * @event must be I2C_START_RECV or I2C_START_SEND. 121 */ 122 static int i2c_do_start_transfer(I2CBus *bus, uint8_t address, 123 enum i2c_event event) 124 { 125 I2CSlaveClass *sc; 126 I2CNode *node; 127 bool bus_scanned = false; 128 129 if (address == I2C_BROADCAST) { 130 /* 131 * This is a broadcast, the current_devs will be all the devices of the 132 * bus. 133 */ 134 bus->broadcast = true; 135 } 136 137 /* 138 * If there are already devices in the list, that means we are in 139 * the middle of a transaction and we shouldn't rescan the bus. 140 * 141 * This happens with any SMBus transaction, even on a pure I2C 142 * device. The interface does a transaction start without 143 * terminating the previous transaction. 144 */ 145 if (QLIST_EMPTY(&bus->current_devs)) { 146 /* Disregard whether devices were found. */ 147 (void)i2c_scan_bus(bus, address, bus->broadcast, &bus->current_devs); 148 bus_scanned = true; 149 } 150 151 if (QLIST_EMPTY(&bus->current_devs)) { 152 return 1; 153 } 154 155 QLIST_FOREACH(node, &bus->current_devs, next) { 156 I2CSlave *s = node->elt; 157 int rv; 158 159 sc = I2C_SLAVE_GET_CLASS(s); 160 /* If the bus is already busy, assume this is a repeated 161 start condition. */ 162 163 if (sc->event) { 164 trace_i2c_event("start", s->address); 165 rv = sc->event(s, event); 166 if (rv && !bus->broadcast) { 167 if (bus_scanned) { 168 /* First call, terminate the transfer. */ 169 i2c_end_transfer(bus); 170 } 171 return rv; 172 } 173 } 174 } 175 return 0; 176 } 177 178 int i2c_start_transfer(I2CBus *bus, uint8_t address, bool is_recv) 179 { 180 return i2c_do_start_transfer(bus, address, is_recv 181 ? I2C_START_RECV 182 : I2C_START_SEND); 183 } 184 185 void i2c_bus_master(I2CBus *bus, QEMUBH *bh) 186 { 187 if (i2c_bus_busy(bus)) { 188 I2CPendingMaster *node = g_new(struct I2CPendingMaster, 1); 189 node->bh = bh; 190 191 QSIMPLEQ_INSERT_TAIL(&bus->pending_masters, node, entry); 192 193 return; 194 } 195 196 bus->bh = bh; 197 qemu_bh_schedule(bus->bh); 198 } 199 200 void i2c_bus_release(I2CBus *bus) 201 { 202 bus->bh = NULL; 203 } 204 205 int i2c_start_recv(I2CBus *bus, uint8_t address) 206 { 207 return i2c_do_start_transfer(bus, address, I2C_START_RECV); 208 } 209 210 int i2c_start_send(I2CBus *bus, uint8_t address) 211 { 212 return i2c_do_start_transfer(bus, address, I2C_START_SEND); 213 } 214 215 void i2c_end_transfer(I2CBus *bus) 216 { 217 I2CSlaveClass *sc; 218 I2CNode *node, *next; 219 220 QLIST_FOREACH_SAFE(node, &bus->current_devs, next, next) { 221 I2CSlave *s = node->elt; 222 sc = I2C_SLAVE_GET_CLASS(s); 223 if (sc->event) { 224 trace_i2c_event("finish", s->address); 225 sc->event(s, I2C_FINISH); 226 } 227 QLIST_REMOVE(node, next); 228 g_free(node); 229 } 230 bus->broadcast = false; 231 232 if (!QSIMPLEQ_EMPTY(&bus->pending_masters)) { 233 I2CPendingMaster *node = QSIMPLEQ_FIRST(&bus->pending_masters); 234 bus->bh = node->bh; 235 236 QSIMPLEQ_REMOVE_HEAD(&bus->pending_masters, entry); 237 g_free(node); 238 239 qemu_bh_schedule(bus->bh); 240 } 241 } 242 243 int i2c_send(I2CBus *bus, uint8_t data) 244 { 245 I2CSlaveClass *sc; 246 I2CSlave *s; 247 I2CNode *node; 248 int ret = 0; 249 250 QLIST_FOREACH(node, &bus->current_devs, next) { 251 s = node->elt; 252 sc = I2C_SLAVE_GET_CLASS(s); 253 if (sc->send) { 254 trace_i2c_send(s->address, data); 255 ret = ret || sc->send(s, data); 256 } else { 257 ret = -1; 258 } 259 } 260 261 return ret ? -1 : 0; 262 } 263 264 uint8_t i2c_recv(I2CBus *bus) 265 { 266 uint8_t data = 0xff; 267 I2CSlaveClass *sc; 268 I2CSlave *s; 269 270 if (!QLIST_EMPTY(&bus->current_devs) && !bus->broadcast) { 271 sc = I2C_SLAVE_GET_CLASS(QLIST_FIRST(&bus->current_devs)->elt); 272 if (sc->recv) { 273 s = QLIST_FIRST(&bus->current_devs)->elt; 274 data = sc->recv(s); 275 trace_i2c_recv(s->address, data); 276 } 277 } 278 279 return data; 280 } 281 282 void i2c_nack(I2CBus *bus) 283 { 284 I2CSlaveClass *sc; 285 I2CNode *node; 286 287 if (QLIST_EMPTY(&bus->current_devs)) { 288 return; 289 } 290 291 QLIST_FOREACH(node, &bus->current_devs, next) { 292 sc = I2C_SLAVE_GET_CLASS(node->elt); 293 if (sc->event) { 294 trace_i2c_event("nack", node->elt->address); 295 sc->event(node->elt, I2C_NACK); 296 } 297 } 298 } 299 300 static int i2c_slave_post_load(void *opaque, int version_id) 301 { 302 I2CSlave *dev = opaque; 303 I2CBus *bus; 304 I2CNode *node; 305 306 bus = I2C_BUS(qdev_get_parent_bus(DEVICE(dev))); 307 if ((bus->saved_address == dev->address) || 308 (bus->saved_address == I2C_BROADCAST)) { 309 node = g_new(struct I2CNode, 1); 310 node->elt = dev; 311 QLIST_INSERT_HEAD(&bus->current_devs, node, next); 312 } 313 return 0; 314 } 315 316 const VMStateDescription vmstate_i2c_slave = { 317 .name = "I2CSlave", 318 .version_id = 1, 319 .minimum_version_id = 1, 320 .post_load = i2c_slave_post_load, 321 .fields = (VMStateField[]) { 322 VMSTATE_UINT8(address, I2CSlave), 323 VMSTATE_END_OF_LIST() 324 } 325 }; 326 327 I2CSlave *i2c_slave_new(const char *name, uint8_t addr) 328 { 329 DeviceState *dev; 330 331 dev = qdev_new(name); 332 qdev_prop_set_uint8(dev, "address", addr); 333 return I2C_SLAVE(dev); 334 } 335 336 bool i2c_slave_realize_and_unref(I2CSlave *dev, I2CBus *bus, Error **errp) 337 { 338 return qdev_realize_and_unref(&dev->qdev, &bus->qbus, errp); 339 } 340 341 I2CSlave *i2c_slave_create_simple(I2CBus *bus, const char *name, uint8_t addr) 342 { 343 I2CSlave *dev = i2c_slave_new(name, addr); 344 345 i2c_slave_realize_and_unref(dev, bus, &error_abort); 346 347 return dev; 348 } 349 350 static bool i2c_slave_match(I2CSlave *candidate, uint8_t address, 351 bool broadcast, I2CNodeList *current_devs) 352 { 353 if ((candidate->address == address) || (broadcast)) { 354 I2CNode *node = g_new(struct I2CNode, 1); 355 node->elt = candidate; 356 QLIST_INSERT_HEAD(current_devs, node, next); 357 return true; 358 } 359 360 /* Not found and not broadcast. */ 361 return false; 362 } 363 364 static void i2c_slave_class_init(ObjectClass *klass, void *data) 365 { 366 DeviceClass *k = DEVICE_CLASS(klass); 367 I2CSlaveClass *sc = I2C_SLAVE_CLASS(klass); 368 set_bit(DEVICE_CATEGORY_MISC, k->categories); 369 k->bus_type = TYPE_I2C_BUS; 370 device_class_set_props(k, i2c_props); 371 sc->match_and_add = i2c_slave_match; 372 } 373 374 static const TypeInfo i2c_slave_type_info = { 375 .name = TYPE_I2C_SLAVE, 376 .parent = TYPE_DEVICE, 377 .instance_size = sizeof(I2CSlave), 378 .abstract = true, 379 .class_size = sizeof(I2CSlaveClass), 380 .class_init = i2c_slave_class_init, 381 }; 382 383 static void i2c_slave_register_types(void) 384 { 385 type_register_static(&i2c_bus_info); 386 type_register_static(&i2c_slave_type_info); 387 } 388 389 type_init(i2c_slave_register_types) 390