1 /* 2 * Bit-Bang i2c emulation extracted from 3 * Marvell MV88W8618 / Freecom MusicPal emulation. 4 * 5 * Copyright (c) 2008 Jan Kiszka 6 * 7 * This code is licensed under the GNU GPL v2. 8 * 9 * Contributions after 2012-01-13 are licensed under the terms of the 10 * GNU GPL, version 2 or (at your option) any later version. 11 */ 12 13 #include "qemu/osdep.h" 14 #include "hw/irq.h" 15 #include "hw/i2c/bitbang_i2c.h" 16 #include "hw/sysbus.h" 17 #include "qemu/module.h" 18 #include "qom/object.h" 19 20 //#define DEBUG_BITBANG_I2C 21 22 #ifdef DEBUG_BITBANG_I2C 23 #define DPRINTF(fmt, ...) \ 24 do { printf("bitbang_i2c: " fmt , ## __VA_ARGS__); } while (0) 25 #else 26 #define DPRINTF(fmt, ...) do {} while(0) 27 #endif 28 29 static void bitbang_i2c_set_state(bitbang_i2c_interface *i2c, 30 bitbang_i2c_state state) 31 { 32 i2c->state = state; 33 } 34 35 static void bitbang_i2c_enter_stop(bitbang_i2c_interface *i2c) 36 { 37 DPRINTF("STOP\n"); 38 if (i2c->current_addr >= 0) 39 i2c_end_transfer(i2c->bus); 40 i2c->current_addr = -1; 41 bitbang_i2c_set_state(i2c, STOPPED); 42 } 43 44 /* Set device data pin. */ 45 static int bitbang_i2c_ret(bitbang_i2c_interface *i2c, int level) 46 { 47 i2c->device_out = level; 48 //DPRINTF("%d %d %d\n", i2c->last_clock, i2c->last_data, i2c->device_out); 49 return level & i2c->last_data; 50 } 51 52 /* Leave device data pin unodified. */ 53 static int bitbang_i2c_nop(bitbang_i2c_interface *i2c) 54 { 55 return bitbang_i2c_ret(i2c, i2c->device_out); 56 } 57 58 /* Returns data line level. */ 59 int bitbang_i2c_set(bitbang_i2c_interface *i2c, int line, int level) 60 { 61 int data; 62 63 if (level != 0 && level != 1) { 64 abort(); 65 } 66 67 if (line == BITBANG_I2C_SDA) { 68 if (level == i2c->last_data) { 69 return bitbang_i2c_nop(i2c); 70 } 71 i2c->last_data = level; 72 if (i2c->last_clock == 0) { 73 return bitbang_i2c_nop(i2c); 74 } 75 if (level == 0) { 76 DPRINTF("START\n"); 77 /* START condition. */ 78 bitbang_i2c_set_state(i2c, SENDING_BIT7); 79 i2c->current_addr = -1; 80 } else { 81 /* STOP condition. */ 82 bitbang_i2c_enter_stop(i2c); 83 } 84 return bitbang_i2c_ret(i2c, 1); 85 } 86 87 data = i2c->last_data; 88 if (i2c->last_clock == level) { 89 return bitbang_i2c_nop(i2c); 90 } 91 i2c->last_clock = level; 92 if (level == 0) { 93 /* State is set/read at the start of the clock pulse. 94 release the data line at the end. */ 95 return bitbang_i2c_ret(i2c, 1); 96 } 97 switch (i2c->state) { 98 case STOPPED: 99 case SENT_NACK: 100 return bitbang_i2c_ret(i2c, 1); 101 102 case SENDING_BIT7 ... SENDING_BIT0: 103 i2c->buffer = (i2c->buffer << 1) | data; 104 /* will end up in WAITING_FOR_ACK */ 105 bitbang_i2c_set_state(i2c, i2c->state + 1); 106 return bitbang_i2c_ret(i2c, 1); 107 108 case WAITING_FOR_ACK: 109 { 110 int ret; 111 112 if (i2c->current_addr < 0) { 113 i2c->current_addr = i2c->buffer; 114 DPRINTF("Address 0x%02x\n", i2c->current_addr); 115 ret = i2c_start_transfer(i2c->bus, i2c->current_addr >> 1, 116 i2c->current_addr & 1); 117 } else { 118 DPRINTF("Sent 0x%02x\n", i2c->buffer); 119 ret = i2c_send(i2c->bus, i2c->buffer); 120 } 121 if (ret) { 122 /* NACK (either addressing a nonexistent device, or the 123 * device we were sending to decided to NACK us). 124 */ 125 DPRINTF("Got NACK\n"); 126 bitbang_i2c_set_state(i2c, SENT_NACK); 127 bitbang_i2c_enter_stop(i2c); 128 return bitbang_i2c_ret(i2c, 1); 129 } 130 if (i2c->current_addr & 1) { 131 bitbang_i2c_set_state(i2c, RECEIVING_BIT7); 132 } else { 133 bitbang_i2c_set_state(i2c, SENDING_BIT7); 134 } 135 return bitbang_i2c_ret(i2c, 0); 136 } 137 case RECEIVING_BIT7: 138 i2c->buffer = i2c_recv(i2c->bus); 139 DPRINTF("RX byte 0x%02x\n", i2c->buffer); 140 /* Fall through... */ 141 case RECEIVING_BIT6 ... RECEIVING_BIT0: 142 data = i2c->buffer >> 7; 143 /* will end up in SENDING_ACK */ 144 bitbang_i2c_set_state(i2c, i2c->state + 1); 145 i2c->buffer <<= 1; 146 return bitbang_i2c_ret(i2c, data); 147 148 case SENDING_ACK: 149 if (data != 0) { 150 DPRINTF("NACKED\n"); 151 bitbang_i2c_set_state(i2c, SENT_NACK); 152 i2c_nack(i2c->bus); 153 } else { 154 DPRINTF("ACKED\n"); 155 bitbang_i2c_set_state(i2c, RECEIVING_BIT7); 156 } 157 return bitbang_i2c_ret(i2c, 1); 158 } 159 abort(); 160 } 161 162 void bitbang_i2c_init(bitbang_i2c_interface *s, I2CBus *bus) 163 { 164 s->bus = bus; 165 s->last_data = 1; 166 s->last_clock = 1; 167 s->device_out = 1; 168 } 169 170 /* GPIO interface. */ 171 172 OBJECT_DECLARE_SIMPLE_TYPE(GPIOI2CState, GPIO_I2C) 173 174 struct GPIOI2CState { 175 /*< private >*/ 176 SysBusDevice parent_obj; 177 /*< public >*/ 178 179 bitbang_i2c_interface bitbang; 180 int last_level; 181 qemu_irq out; 182 }; 183 184 static void bitbang_i2c_gpio_set(void *opaque, int irq, int level) 185 { 186 GPIOI2CState *s = opaque; 187 188 level = bitbang_i2c_set(&s->bitbang, irq, level); 189 if (level != s->last_level) { 190 s->last_level = level; 191 qemu_set_irq(s->out, level); 192 } 193 } 194 195 static void gpio_i2c_init(Object *obj) 196 { 197 DeviceState *dev = DEVICE(obj); 198 GPIOI2CState *s = GPIO_I2C(obj); 199 I2CBus *bus; 200 201 bus = i2c_init_bus(dev, "i2c"); 202 bitbang_i2c_init(&s->bitbang, bus); 203 204 qdev_init_gpio_in(dev, bitbang_i2c_gpio_set, 2); 205 qdev_init_gpio_out(dev, &s->out, 1); 206 } 207 208 static void gpio_i2c_class_init(ObjectClass *klass, void *data) 209 { 210 DeviceClass *dc = DEVICE_CLASS(klass); 211 212 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); 213 dc->desc = "Virtual GPIO to I2C bridge"; 214 } 215 216 static const TypeInfo gpio_i2c_info = { 217 .name = TYPE_GPIO_I2C, 218 .parent = TYPE_SYS_BUS_DEVICE, 219 .instance_size = sizeof(GPIOI2CState), 220 .instance_init = gpio_i2c_init, 221 .class_init = gpio_i2c_class_init, 222 }; 223 224 static void bitbang_i2c_register_types(void) 225 { 226 type_register_static(&gpio_i2c_info); 227 } 228 229 type_init(bitbang_i2c_register_types) 230