xref: /openbmc/qemu/hw/i2c/bitbang_i2c.c (revision 500eb6db)
1 /*
2  * Bit-Bang i2c emulation extracted from
3  * Marvell MV88W8618 / Freecom MusicPal emulation.
4  *
5  * Copyright (c) 2008 Jan Kiszka
6  *
7  * This code is licensed under the GNU GPL v2.
8  *
9  * Contributions after 2012-01-13 are licensed under the terms of the
10  * GNU GPL, version 2 or (at your option) any later version.
11  */
12 
13 #include "qemu/osdep.h"
14 #include "hw/hw.h"
15 #include "bitbang_i2c.h"
16 #include "hw/sysbus.h"
17 #include "qemu/module.h"
18 
19 //#define DEBUG_BITBANG_I2C
20 
21 #ifdef DEBUG_BITBANG_I2C
22 #define DPRINTF(fmt, ...) \
23 do { printf("bitbang_i2c: " fmt , ## __VA_ARGS__); } while (0)
24 #else
25 #define DPRINTF(fmt, ...) do {} while(0)
26 #endif
27 
28 typedef enum bitbang_i2c_state {
29     STOPPED = 0,
30     SENDING_BIT7,
31     SENDING_BIT6,
32     SENDING_BIT5,
33     SENDING_BIT4,
34     SENDING_BIT3,
35     SENDING_BIT2,
36     SENDING_BIT1,
37     SENDING_BIT0,
38     WAITING_FOR_ACK,
39     RECEIVING_BIT7,
40     RECEIVING_BIT6,
41     RECEIVING_BIT5,
42     RECEIVING_BIT4,
43     RECEIVING_BIT3,
44     RECEIVING_BIT2,
45     RECEIVING_BIT1,
46     RECEIVING_BIT0,
47     SENDING_ACK,
48     SENT_NACK
49 } bitbang_i2c_state;
50 
51 struct bitbang_i2c_interface {
52     I2CBus *bus;
53     bitbang_i2c_state state;
54     int last_data;
55     int last_clock;
56     int device_out;
57     uint8_t buffer;
58     int current_addr;
59 };
60 
61 static void bitbang_i2c_enter_stop(bitbang_i2c_interface *i2c)
62 {
63     DPRINTF("STOP\n");
64     if (i2c->current_addr >= 0)
65         i2c_end_transfer(i2c->bus);
66     i2c->current_addr = -1;
67     i2c->state = STOPPED;
68 }
69 
70 /* Set device data pin.  */
71 static int bitbang_i2c_ret(bitbang_i2c_interface *i2c, int level)
72 {
73     i2c->device_out = level;
74     //DPRINTF("%d %d %d\n", i2c->last_clock, i2c->last_data, i2c->device_out);
75     return level & i2c->last_data;
76 }
77 
78 /* Leave device data pin unodified.  */
79 static int bitbang_i2c_nop(bitbang_i2c_interface *i2c)
80 {
81     return bitbang_i2c_ret(i2c, i2c->device_out);
82 }
83 
84 /* Returns data line level.  */
85 int bitbang_i2c_set(bitbang_i2c_interface *i2c, int line, int level)
86 {
87     int data;
88 
89     if (level != 0 && level != 1) {
90         abort();
91     }
92 
93     if (line == BITBANG_I2C_SDA) {
94         if (level == i2c->last_data) {
95             return bitbang_i2c_nop(i2c);
96         }
97         i2c->last_data = level;
98         if (i2c->last_clock == 0) {
99             return bitbang_i2c_nop(i2c);
100         }
101         if (level == 0) {
102             DPRINTF("START\n");
103             /* START condition.  */
104             i2c->state = SENDING_BIT7;
105             i2c->current_addr = -1;
106         } else {
107             /* STOP condition.  */
108             bitbang_i2c_enter_stop(i2c);
109         }
110         return bitbang_i2c_ret(i2c, 1);
111     }
112 
113     data = i2c->last_data;
114     if (i2c->last_clock == level) {
115         return bitbang_i2c_nop(i2c);
116     }
117     i2c->last_clock = level;
118     if (level == 0) {
119         /* State is set/read at the start of the clock pulse.
120            release the data line at the end.  */
121         return bitbang_i2c_ret(i2c, 1);
122     }
123     switch (i2c->state) {
124     case STOPPED:
125     case SENT_NACK:
126         return bitbang_i2c_ret(i2c, 1);
127 
128     case SENDING_BIT7 ... SENDING_BIT0:
129         i2c->buffer = (i2c->buffer << 1) | data;
130         /* will end up in WAITING_FOR_ACK */
131         i2c->state++;
132         return bitbang_i2c_ret(i2c, 1);
133 
134     case WAITING_FOR_ACK:
135     {
136         int ret;
137 
138         if (i2c->current_addr < 0) {
139             i2c->current_addr = i2c->buffer;
140             DPRINTF("Address 0x%02x\n", i2c->current_addr);
141             ret = i2c_start_transfer(i2c->bus, i2c->current_addr >> 1,
142                                      i2c->current_addr & 1);
143         } else {
144             DPRINTF("Sent 0x%02x\n", i2c->buffer);
145             ret = i2c_send(i2c->bus, i2c->buffer);
146         }
147         if (ret) {
148             /* NACK (either addressing a nonexistent device, or the
149              * device we were sending to decided to NACK us).
150              */
151             DPRINTF("Got NACK\n");
152             bitbang_i2c_enter_stop(i2c);
153             return bitbang_i2c_ret(i2c, 1);
154         }
155         if (i2c->current_addr & 1) {
156             i2c->state = RECEIVING_BIT7;
157         } else {
158             i2c->state = SENDING_BIT7;
159         }
160         return bitbang_i2c_ret(i2c, 0);
161     }
162     case RECEIVING_BIT7:
163         i2c->buffer = i2c_recv(i2c->bus);
164         DPRINTF("RX byte 0x%02x\n", i2c->buffer);
165         /* Fall through... */
166     case RECEIVING_BIT6 ... RECEIVING_BIT0:
167         data = i2c->buffer >> 7;
168         /* will end up in SENDING_ACK */
169         i2c->state++;
170         i2c->buffer <<= 1;
171         return bitbang_i2c_ret(i2c, data);
172 
173     case SENDING_ACK:
174         i2c->state = RECEIVING_BIT7;
175         if (data != 0) {
176             DPRINTF("NACKED\n");
177             i2c->state = SENT_NACK;
178             i2c_nack(i2c->bus);
179         } else {
180             DPRINTF("ACKED\n");
181         }
182         return bitbang_i2c_ret(i2c, 1);
183     }
184     abort();
185 }
186 
187 bitbang_i2c_interface *bitbang_i2c_init(I2CBus *bus)
188 {
189     bitbang_i2c_interface *s;
190 
191     s = g_malloc0(sizeof(bitbang_i2c_interface));
192 
193     s->bus = bus;
194     s->last_data = 1;
195     s->last_clock = 1;
196     s->device_out = 1;
197 
198     return s;
199 }
200 
201 /* GPIO interface.  */
202 
203 #define TYPE_GPIO_I2C "gpio_i2c"
204 #define GPIO_I2C(obj) OBJECT_CHECK(GPIOI2CState, (obj), TYPE_GPIO_I2C)
205 
206 typedef struct GPIOI2CState {
207     SysBusDevice parent_obj;
208 
209     MemoryRegion dummy_iomem;
210     bitbang_i2c_interface *bitbang;
211     int last_level;
212     qemu_irq out;
213 } GPIOI2CState;
214 
215 static void bitbang_i2c_gpio_set(void *opaque, int irq, int level)
216 {
217     GPIOI2CState *s = opaque;
218 
219     level = bitbang_i2c_set(s->bitbang, irq, level);
220     if (level != s->last_level) {
221         s->last_level = level;
222         qemu_set_irq(s->out, level);
223     }
224 }
225 
226 static void gpio_i2c_init(Object *obj)
227 {
228     DeviceState *dev = DEVICE(obj);
229     GPIOI2CState *s = GPIO_I2C(obj);
230     SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
231     I2CBus *bus;
232 
233     memory_region_init(&s->dummy_iomem, obj, "gpio_i2c", 0);
234     sysbus_init_mmio(sbd, &s->dummy_iomem);
235 
236     bus = i2c_init_bus(dev, "i2c");
237     s->bitbang = bitbang_i2c_init(bus);
238 
239     qdev_init_gpio_in(dev, bitbang_i2c_gpio_set, 2);
240     qdev_init_gpio_out(dev, &s->out, 1);
241 }
242 
243 static void gpio_i2c_class_init(ObjectClass *klass, void *data)
244 {
245     DeviceClass *dc = DEVICE_CLASS(klass);
246 
247     set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
248     dc->desc = "Virtual GPIO to I2C bridge";
249 }
250 
251 static const TypeInfo gpio_i2c_info = {
252     .name          = TYPE_GPIO_I2C,
253     .parent        = TYPE_SYS_BUS_DEVICE,
254     .instance_size = sizeof(GPIOI2CState),
255     .instance_init = gpio_i2c_init,
256     .class_init    = gpio_i2c_class_init,
257 };
258 
259 static void bitbang_i2c_register_types(void)
260 {
261     type_register_static(&gpio_i2c_info);
262 }
263 
264 type_init(bitbang_i2c_register_types)
265