1 /* 2 * Bit-Bang i2c emulation extracted from 3 * Marvell MV88W8618 / Freecom MusicPal emulation. 4 * 5 * Copyright (c) 2008 Jan Kiszka 6 * 7 * This code is licensed under the GNU GPL v2. 8 * 9 * Contributions after 2012-01-13 are licensed under the terms of the 10 * GNU GPL, version 2 or (at your option) any later version. 11 */ 12 13 #include "qemu/osdep.h" 14 #include "hw/irq.h" 15 #include "hw/i2c/bitbang_i2c.h" 16 #include "hw/sysbus.h" 17 #include "qemu/module.h" 18 #include "qom/object.h" 19 #include "trace.h" 20 21 //#define DEBUG_BITBANG_I2C 22 23 #ifdef DEBUG_BITBANG_I2C 24 #define DPRINTF(fmt, ...) \ 25 do { printf("bitbang_i2c: " fmt , ## __VA_ARGS__); } while (0) 26 #else 27 #define DPRINTF(fmt, ...) do {} while(0) 28 #endif 29 30 /* bitbang_i2c_state enum to name */ 31 static const char * const sname[] = { 32 #define NAME(e) [e] = stringify(e) 33 NAME(STOPPED), 34 [SENDING_BIT7] = "SENDING_BIT7 (START)", 35 NAME(SENDING_BIT6), 36 NAME(SENDING_BIT5), 37 NAME(SENDING_BIT4), 38 NAME(SENDING_BIT3), 39 NAME(SENDING_BIT2), 40 NAME(SENDING_BIT1), 41 NAME(SENDING_BIT0), 42 NAME(WAITING_FOR_ACK), 43 [RECEIVING_BIT7] = "RECEIVING_BIT7 (ACK)", 44 NAME(RECEIVING_BIT6), 45 NAME(RECEIVING_BIT5), 46 NAME(RECEIVING_BIT4), 47 NAME(RECEIVING_BIT3), 48 NAME(RECEIVING_BIT2), 49 NAME(RECEIVING_BIT1), 50 NAME(RECEIVING_BIT0), 51 NAME(SENDING_ACK), 52 NAME(SENT_NACK) 53 #undef NAME 54 }; 55 56 static void bitbang_i2c_set_state(bitbang_i2c_interface *i2c, 57 bitbang_i2c_state state) 58 { 59 trace_bitbang_i2c_state(sname[i2c->state], sname[state]); 60 i2c->state = state; 61 } 62 63 static void bitbang_i2c_enter_stop(bitbang_i2c_interface *i2c) 64 { 65 if (i2c->current_addr >= 0) 66 i2c_end_transfer(i2c->bus); 67 i2c->current_addr = -1; 68 bitbang_i2c_set_state(i2c, STOPPED); 69 } 70 71 /* Set device data pin. */ 72 static int bitbang_i2c_ret(bitbang_i2c_interface *i2c, int level) 73 { 74 i2c->device_out = level; 75 //DPRINTF("%d %d %d\n", i2c->last_clock, i2c->last_data, i2c->device_out); 76 return level & i2c->last_data; 77 } 78 79 /* Leave device data pin unodified. */ 80 static int bitbang_i2c_nop(bitbang_i2c_interface *i2c) 81 { 82 return bitbang_i2c_ret(i2c, i2c->device_out); 83 } 84 85 /* Returns data line level. */ 86 int bitbang_i2c_set(bitbang_i2c_interface *i2c, int line, int level) 87 { 88 int data; 89 90 if (level != 0 && level != 1) { 91 abort(); 92 } 93 94 if (line == BITBANG_I2C_SDA) { 95 if (level == i2c->last_data) { 96 return bitbang_i2c_nop(i2c); 97 } 98 i2c->last_data = level; 99 if (i2c->last_clock == 0) { 100 return bitbang_i2c_nop(i2c); 101 } 102 if (level == 0) { 103 /* START condition. */ 104 bitbang_i2c_set_state(i2c, SENDING_BIT7); 105 i2c->current_addr = -1; 106 } else { 107 /* STOP condition. */ 108 bitbang_i2c_enter_stop(i2c); 109 } 110 return bitbang_i2c_ret(i2c, 1); 111 } 112 113 data = i2c->last_data; 114 if (i2c->last_clock == level) { 115 return bitbang_i2c_nop(i2c); 116 } 117 i2c->last_clock = level; 118 if (level == 0) { 119 /* State is set/read at the start of the clock pulse. 120 release the data line at the end. */ 121 return bitbang_i2c_ret(i2c, 1); 122 } 123 switch (i2c->state) { 124 case STOPPED: 125 case SENT_NACK: 126 return bitbang_i2c_ret(i2c, 1); 127 128 case SENDING_BIT7 ... SENDING_BIT0: 129 i2c->buffer = (i2c->buffer << 1) | data; 130 /* will end up in WAITING_FOR_ACK */ 131 bitbang_i2c_set_state(i2c, i2c->state + 1); 132 return bitbang_i2c_ret(i2c, 1); 133 134 case WAITING_FOR_ACK: 135 { 136 int ret; 137 138 if (i2c->current_addr < 0) { 139 i2c->current_addr = i2c->buffer; 140 DPRINTF("Address 0x%02x\n", i2c->current_addr); 141 ret = i2c_start_transfer(i2c->bus, i2c->current_addr >> 1, 142 i2c->current_addr & 1); 143 } else { 144 DPRINTF("Sent 0x%02x\n", i2c->buffer); 145 ret = i2c_send(i2c->bus, i2c->buffer); 146 } 147 if (ret) { 148 /* NACK (either addressing a nonexistent device, or the 149 * device we were sending to decided to NACK us). 150 */ 151 bitbang_i2c_set_state(i2c, SENT_NACK); 152 bitbang_i2c_enter_stop(i2c); 153 return bitbang_i2c_ret(i2c, 1); 154 } 155 if (i2c->current_addr & 1) { 156 bitbang_i2c_set_state(i2c, RECEIVING_BIT7); 157 } else { 158 bitbang_i2c_set_state(i2c, SENDING_BIT7); 159 } 160 return bitbang_i2c_ret(i2c, 0); 161 } 162 case RECEIVING_BIT7: 163 i2c->buffer = i2c_recv(i2c->bus); 164 DPRINTF("RX byte 0x%02x\n", i2c->buffer); 165 /* Fall through... */ 166 case RECEIVING_BIT6 ... RECEIVING_BIT0: 167 data = i2c->buffer >> 7; 168 /* will end up in SENDING_ACK */ 169 bitbang_i2c_set_state(i2c, i2c->state + 1); 170 i2c->buffer <<= 1; 171 return bitbang_i2c_ret(i2c, data); 172 173 case SENDING_ACK: 174 if (data != 0) { 175 bitbang_i2c_set_state(i2c, SENT_NACK); 176 i2c_nack(i2c->bus); 177 } else { 178 bitbang_i2c_set_state(i2c, RECEIVING_BIT7); 179 } 180 return bitbang_i2c_ret(i2c, 1); 181 } 182 abort(); 183 } 184 185 void bitbang_i2c_init(bitbang_i2c_interface *s, I2CBus *bus) 186 { 187 s->bus = bus; 188 s->last_data = 1; 189 s->last_clock = 1; 190 s->device_out = 1; 191 } 192 193 /* GPIO interface. */ 194 195 OBJECT_DECLARE_SIMPLE_TYPE(GPIOI2CState, GPIO_I2C) 196 197 struct GPIOI2CState { 198 /*< private >*/ 199 SysBusDevice parent_obj; 200 /*< public >*/ 201 202 bitbang_i2c_interface bitbang; 203 int last_level; 204 qemu_irq out; 205 }; 206 207 static void bitbang_i2c_gpio_set(void *opaque, int irq, int level) 208 { 209 GPIOI2CState *s = opaque; 210 211 level = bitbang_i2c_set(&s->bitbang, irq, level); 212 if (level != s->last_level) { 213 s->last_level = level; 214 qemu_set_irq(s->out, level); 215 } 216 } 217 218 static void gpio_i2c_init(Object *obj) 219 { 220 DeviceState *dev = DEVICE(obj); 221 GPIOI2CState *s = GPIO_I2C(obj); 222 I2CBus *bus; 223 224 bus = i2c_init_bus(dev, "i2c"); 225 bitbang_i2c_init(&s->bitbang, bus); 226 227 qdev_init_gpio_in(dev, bitbang_i2c_gpio_set, 2); 228 qdev_init_gpio_out(dev, &s->out, 1); 229 } 230 231 static void gpio_i2c_class_init(ObjectClass *klass, void *data) 232 { 233 DeviceClass *dc = DEVICE_CLASS(klass); 234 235 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); 236 dc->desc = "Virtual GPIO to I2C bridge"; 237 } 238 239 static const TypeInfo gpio_i2c_info = { 240 .name = TYPE_GPIO_I2C, 241 .parent = TYPE_SYS_BUS_DEVICE, 242 .instance_size = sizeof(GPIOI2CState), 243 .instance_init = gpio_i2c_init, 244 .class_init = gpio_i2c_class_init, 245 }; 246 247 static void bitbang_i2c_register_types(void) 248 { 249 type_register_static(&gpio_i2c_info); 250 } 251 252 type_init(bitbang_i2c_register_types) 253