1 /* 2 * Bit-Bang i2c emulation extracted from 3 * Marvell MV88W8618 / Freecom MusicPal emulation. 4 * 5 * Copyright (c) 2008 Jan Kiszka 6 * 7 * This code is licensed under the GNU GPL v2. 8 * 9 * Contributions after 2012-01-13 are licensed under the terms of the 10 * GNU GPL, version 2 or (at your option) any later version. 11 */ 12 #include "qemu/osdep.h" 13 #include "hw/hw.h" 14 #include "bitbang_i2c.h" 15 #include "hw/sysbus.h" 16 17 //#define DEBUG_BITBANG_I2C 18 19 #ifdef DEBUG_BITBANG_I2C 20 #define DPRINTF(fmt, ...) \ 21 do { printf("bitbang_i2c: " fmt , ## __VA_ARGS__); } while (0) 22 #else 23 #define DPRINTF(fmt, ...) do {} while(0) 24 #endif 25 26 typedef enum bitbang_i2c_state { 27 STOPPED = 0, 28 SENDING_BIT7, 29 SENDING_BIT6, 30 SENDING_BIT5, 31 SENDING_BIT4, 32 SENDING_BIT3, 33 SENDING_BIT2, 34 SENDING_BIT1, 35 SENDING_BIT0, 36 WAITING_FOR_ACK, 37 RECEIVING_BIT7, 38 RECEIVING_BIT6, 39 RECEIVING_BIT5, 40 RECEIVING_BIT4, 41 RECEIVING_BIT3, 42 RECEIVING_BIT2, 43 RECEIVING_BIT1, 44 RECEIVING_BIT0, 45 SENDING_ACK, 46 SENT_NACK 47 } bitbang_i2c_state; 48 49 struct bitbang_i2c_interface { 50 I2CBus *bus; 51 bitbang_i2c_state state; 52 int last_data; 53 int last_clock; 54 int device_out; 55 uint8_t buffer; 56 int current_addr; 57 }; 58 59 static void bitbang_i2c_enter_stop(bitbang_i2c_interface *i2c) 60 { 61 DPRINTF("STOP\n"); 62 if (i2c->current_addr >= 0) 63 i2c_end_transfer(i2c->bus); 64 i2c->current_addr = -1; 65 i2c->state = STOPPED; 66 } 67 68 /* Set device data pin. */ 69 static int bitbang_i2c_ret(bitbang_i2c_interface *i2c, int level) 70 { 71 i2c->device_out = level; 72 //DPRINTF("%d %d %d\n", i2c->last_clock, i2c->last_data, i2c->device_out); 73 return level & i2c->last_data; 74 } 75 76 /* Leave device data pin unodified. */ 77 static int bitbang_i2c_nop(bitbang_i2c_interface *i2c) 78 { 79 return bitbang_i2c_ret(i2c, i2c->device_out); 80 } 81 82 /* Returns data line level. */ 83 int bitbang_i2c_set(bitbang_i2c_interface *i2c, int line, int level) 84 { 85 int data; 86 87 if (level != 0 && level != 1) { 88 abort(); 89 } 90 91 if (line == BITBANG_I2C_SDA) { 92 if (level == i2c->last_data) { 93 return bitbang_i2c_nop(i2c); 94 } 95 i2c->last_data = level; 96 if (i2c->last_clock == 0) { 97 return bitbang_i2c_nop(i2c); 98 } 99 if (level == 0) { 100 DPRINTF("START\n"); 101 /* START condition. */ 102 i2c->state = SENDING_BIT7; 103 i2c->current_addr = -1; 104 } else { 105 /* STOP condition. */ 106 bitbang_i2c_enter_stop(i2c); 107 } 108 return bitbang_i2c_ret(i2c, 1); 109 } 110 111 data = i2c->last_data; 112 if (i2c->last_clock == level) { 113 return bitbang_i2c_nop(i2c); 114 } 115 i2c->last_clock = level; 116 if (level == 0) { 117 /* State is set/read at the start of the clock pulse. 118 release the data line at the end. */ 119 return bitbang_i2c_ret(i2c, 1); 120 } 121 switch (i2c->state) { 122 case STOPPED: 123 case SENT_NACK: 124 return bitbang_i2c_ret(i2c, 1); 125 126 case SENDING_BIT7 ... SENDING_BIT0: 127 i2c->buffer = (i2c->buffer << 1) | data; 128 /* will end up in WAITING_FOR_ACK */ 129 i2c->state++; 130 return bitbang_i2c_ret(i2c, 1); 131 132 case WAITING_FOR_ACK: 133 if (i2c->current_addr < 0) { 134 i2c->current_addr = i2c->buffer; 135 DPRINTF("Address 0x%02x\n", i2c->current_addr); 136 i2c_start_transfer(i2c->bus, i2c->current_addr >> 1, 137 i2c->current_addr & 1); 138 } else { 139 DPRINTF("Sent 0x%02x\n", i2c->buffer); 140 i2c_send(i2c->bus, i2c->buffer); 141 } 142 if (i2c->current_addr & 1) { 143 i2c->state = RECEIVING_BIT7; 144 } else { 145 i2c->state = SENDING_BIT7; 146 } 147 return bitbang_i2c_ret(i2c, 0); 148 149 case RECEIVING_BIT7: 150 i2c->buffer = i2c_recv(i2c->bus); 151 DPRINTF("RX byte 0x%02x\n", i2c->buffer); 152 /* Fall through... */ 153 case RECEIVING_BIT6 ... RECEIVING_BIT0: 154 data = i2c->buffer >> 7; 155 /* will end up in SENDING_ACK */ 156 i2c->state++; 157 i2c->buffer <<= 1; 158 return bitbang_i2c_ret(i2c, data); 159 160 case SENDING_ACK: 161 i2c->state = RECEIVING_BIT7; 162 if (data != 0) { 163 DPRINTF("NACKED\n"); 164 i2c->state = SENT_NACK; 165 i2c_nack(i2c->bus); 166 } else { 167 DPRINTF("ACKED\n"); 168 } 169 return bitbang_i2c_ret(i2c, 1); 170 } 171 abort(); 172 } 173 174 bitbang_i2c_interface *bitbang_i2c_init(I2CBus *bus) 175 { 176 bitbang_i2c_interface *s; 177 178 s = g_malloc0(sizeof(bitbang_i2c_interface)); 179 180 s->bus = bus; 181 s->last_data = 1; 182 s->last_clock = 1; 183 s->device_out = 1; 184 185 return s; 186 } 187 188 /* GPIO interface. */ 189 190 #define TYPE_GPIO_I2C "gpio_i2c" 191 #define GPIO_I2C(obj) OBJECT_CHECK(GPIOI2CState, (obj), TYPE_GPIO_I2C) 192 193 typedef struct GPIOI2CState { 194 SysBusDevice parent_obj; 195 196 MemoryRegion dummy_iomem; 197 bitbang_i2c_interface *bitbang; 198 int last_level; 199 qemu_irq out; 200 } GPIOI2CState; 201 202 static void bitbang_i2c_gpio_set(void *opaque, int irq, int level) 203 { 204 GPIOI2CState *s = opaque; 205 206 level = bitbang_i2c_set(s->bitbang, irq, level); 207 if (level != s->last_level) { 208 s->last_level = level; 209 qemu_set_irq(s->out, level); 210 } 211 } 212 213 static void gpio_i2c_init(Object *obj) 214 { 215 DeviceState *dev = DEVICE(obj); 216 GPIOI2CState *s = GPIO_I2C(obj); 217 SysBusDevice *sbd = SYS_BUS_DEVICE(obj); 218 I2CBus *bus; 219 220 memory_region_init(&s->dummy_iomem, obj, "gpio_i2c", 0); 221 sysbus_init_mmio(sbd, &s->dummy_iomem); 222 223 bus = i2c_init_bus(dev, "i2c"); 224 s->bitbang = bitbang_i2c_init(bus); 225 226 qdev_init_gpio_in(dev, bitbang_i2c_gpio_set, 2); 227 qdev_init_gpio_out(dev, &s->out, 1); 228 } 229 230 static void gpio_i2c_class_init(ObjectClass *klass, void *data) 231 { 232 DeviceClass *dc = DEVICE_CLASS(klass); 233 234 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); 235 dc->desc = "Virtual GPIO to I2C bridge"; 236 } 237 238 static const TypeInfo gpio_i2c_info = { 239 .name = TYPE_GPIO_I2C, 240 .parent = TYPE_SYS_BUS_DEVICE, 241 .instance_size = sizeof(GPIOI2CState), 242 .instance_init = gpio_i2c_init, 243 .class_init = gpio_i2c_class_init, 244 }; 245 246 static void bitbang_i2c_register_types(void) 247 { 248 type_register_static(&gpio_i2c_info); 249 } 250 251 type_init(bitbang_i2c_register_types) 252