1 /* 2 * QEMU HPPA hardware system emulator. 3 * (C) Copyright 2018-2023 Helge Deller <deller@gmx.de> 4 * 5 * This work is licensed under the GNU GPL license version 2 or later. 6 */ 7 8 #include "qemu/osdep.h" 9 #include "qemu/datadir.h" 10 #include "cpu.h" 11 #include "elf.h" 12 #include "hw/loader.h" 13 #include "qemu/error-report.h" 14 #include "sysemu/reset.h" 15 #include "sysemu/sysemu.h" 16 #include "sysemu/runstate.h" 17 #include "hw/rtc/mc146818rtc.h" 18 #include "hw/timer/i8254.h" 19 #include "hw/char/serial.h" 20 #include "hw/char/parallel.h" 21 #include "hw/intc/i8259.h" 22 #include "hw/input/lasips2.h" 23 #include "hw/net/lasi_82596.h" 24 #include "hw/nmi.h" 25 #include "hw/usb.h" 26 #include "hw/pci/pci.h" 27 #include "hw/pci/pci_device.h" 28 #include "hw/pci-host/astro.h" 29 #include "hw/pci-host/dino.h" 30 #include "hw/misc/lasi.h" 31 #include "hppa_hardware.h" 32 #include "qemu/units.h" 33 #include "qapi/error.h" 34 #include "net/net.h" 35 #include "qemu/log.h" 36 37 #define MIN_SEABIOS_HPPA_VERSION 12 /* require at least this fw version */ 38 39 #define HPA_POWER_BUTTON (FIRMWARE_END - 0x10) 40 static hwaddr soft_power_reg; 41 42 #define enable_lasi_lan() 0 43 44 static DeviceState *lasi_dev; 45 46 static void hppa_powerdown_req(Notifier *n, void *opaque) 47 { 48 uint32_t val; 49 50 val = ldl_be_phys(&address_space_memory, soft_power_reg); 51 if ((val >> 8) == 0) { 52 /* immediately shut down when under hardware control */ 53 qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); 54 return; 55 } 56 57 /* clear bit 31 to indicate that the power switch was pressed. */ 58 val &= ~1; 59 stl_be_phys(&address_space_memory, soft_power_reg, val); 60 } 61 62 static Notifier hppa_system_powerdown_notifier = { 63 .notify = hppa_powerdown_req 64 }; 65 66 /* Fallback for unassigned PCI I/O operations. Avoids MCHK. */ 67 static uint64_t ignore_read(void *opaque, hwaddr addr, unsigned size) 68 { 69 return 0; 70 } 71 72 static void ignore_write(void *opaque, hwaddr addr, uint64_t v, unsigned size) 73 { 74 } 75 76 static const MemoryRegionOps hppa_pci_ignore_ops = { 77 .read = ignore_read, 78 .write = ignore_write, 79 .endianness = DEVICE_BIG_ENDIAN, 80 .valid = { 81 .min_access_size = 1, 82 .max_access_size = 8, 83 }, 84 .impl = { 85 .min_access_size = 1, 86 .max_access_size = 8, 87 }, 88 }; 89 90 static ISABus *hppa_isa_bus(hwaddr addr) 91 { 92 ISABus *isa_bus; 93 qemu_irq *isa_irqs; 94 MemoryRegion *isa_region; 95 96 isa_region = g_new(MemoryRegion, 1); 97 memory_region_init_io(isa_region, NULL, &hppa_pci_ignore_ops, 98 NULL, "isa-io", 0x800); 99 memory_region_add_subregion(get_system_memory(), addr, isa_region); 100 101 isa_bus = isa_bus_new(NULL, get_system_memory(), isa_region, 102 &error_abort); 103 isa_irqs = i8259_init(isa_bus, NULL); 104 isa_bus_register_input_irqs(isa_bus, isa_irqs); 105 106 return isa_bus; 107 } 108 109 /* 110 * Helper functions to emulate RTC clock and DebugOutputPort 111 */ 112 static time_t rtc_ref; 113 114 static uint64_t io_cpu_read(void *opaque, hwaddr addr, unsigned size) 115 { 116 uint64_t val = 0; 117 118 switch (addr) { 119 case 0: /* RTC clock */ 120 val = time(NULL); 121 val += rtc_ref; 122 break; 123 case 8: /* DebugOutputPort */ 124 return 0xe9; /* readback */ 125 } 126 return val; 127 } 128 129 static void io_cpu_write(void *opaque, hwaddr addr, 130 uint64_t val, unsigned size) 131 { 132 unsigned char ch; 133 Chardev *debugout; 134 135 switch (addr) { 136 case 0: /* RTC clock */ 137 rtc_ref = val - time(NULL); 138 break; 139 case 8: /* DebugOutputPort */ 140 ch = val; 141 debugout = serial_hd(0); 142 if (debugout) { 143 qemu_chr_fe_write_all(debugout->be, &ch, 1); 144 } else { 145 fprintf(stderr, "%c", ch); 146 } 147 break; 148 } 149 } 150 151 static const MemoryRegionOps hppa_io_helper_ops = { 152 .read = io_cpu_read, 153 .write = io_cpu_write, 154 .endianness = DEVICE_BIG_ENDIAN, 155 .valid = { 156 .min_access_size = 1, 157 .max_access_size = 8, 158 }, 159 .impl = { 160 .min_access_size = 1, 161 .max_access_size = 8, 162 }, 163 }; 164 165 typedef uint64_t TranslateFn(void *opaque, uint64_t addr); 166 167 static uint64_t linux_kernel_virt_to_phys(void *opaque, uint64_t addr) 168 { 169 addr &= (0x10000000 - 1); 170 return addr; 171 } 172 173 static uint64_t translate_pa10(void *dummy, uint64_t addr) 174 { 175 return (uint32_t)addr; 176 } 177 178 static uint64_t translate_pa20(void *dummy, uint64_t addr) 179 { 180 return hppa_abs_to_phys_pa2_w0(addr); 181 } 182 183 static HPPACPU *cpu[HPPA_MAX_CPUS]; 184 static uint64_t firmware_entry; 185 186 static void fw_cfg_boot_set(void *opaque, const char *boot_device, 187 Error **errp) 188 { 189 fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]); 190 } 191 192 static FWCfgState *create_fw_cfg(MachineState *ms, PCIBus *pci_bus, 193 hwaddr addr) 194 { 195 FWCfgState *fw_cfg; 196 uint64_t val; 197 const char qemu_version[] = QEMU_VERSION; 198 MachineClass *mc = MACHINE_GET_CLASS(ms); 199 int btlb_entries = HPPA_BTLB_ENTRIES(&cpu[0]->env); 200 int len; 201 202 fw_cfg = fw_cfg_init_mem(addr, addr + 4); 203 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, ms->smp.cpus); 204 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, HPPA_MAX_CPUS); 205 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, ms->ram_size); 206 207 val = cpu_to_le64(MIN_SEABIOS_HPPA_VERSION); 208 fw_cfg_add_file(fw_cfg, "/etc/firmware-min-version", 209 g_memdup(&val, sizeof(val)), sizeof(val)); 210 211 val = cpu_to_le64(HPPA_TLB_ENTRIES - btlb_entries); 212 fw_cfg_add_file(fw_cfg, "/etc/cpu/tlb_entries", 213 g_memdup(&val, sizeof(val)), sizeof(val)); 214 215 val = cpu_to_le64(btlb_entries); 216 fw_cfg_add_file(fw_cfg, "/etc/cpu/btlb_entries", 217 g_memdup(&val, sizeof(val)), sizeof(val)); 218 219 len = strlen(mc->name) + 1; 220 fw_cfg_add_file(fw_cfg, "/etc/hppa/machine", 221 g_memdup(mc->name, len), len); 222 223 val = cpu_to_le64(soft_power_reg); 224 fw_cfg_add_file(fw_cfg, "/etc/hppa/power-button-addr", 225 g_memdup(&val, sizeof(val)), sizeof(val)); 226 227 val = cpu_to_le64(CPU_HPA + 16); 228 fw_cfg_add_file(fw_cfg, "/etc/hppa/rtc-addr", 229 g_memdup(&val, sizeof(val)), sizeof(val)); 230 231 val = cpu_to_le64(CPU_HPA + 24); 232 fw_cfg_add_file(fw_cfg, "/etc/hppa/DebugOutputPort", 233 g_memdup(&val, sizeof(val)), sizeof(val)); 234 235 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ms->boot_config.order[0]); 236 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg); 237 238 fw_cfg_add_file(fw_cfg, "/etc/qemu-version", 239 g_memdup(qemu_version, sizeof(qemu_version)), 240 sizeof(qemu_version)); 241 242 fw_cfg_add_extra_pci_roots(pci_bus, fw_cfg); 243 244 return fw_cfg; 245 } 246 247 static LasiState *lasi_init(void) 248 { 249 DeviceState *dev; 250 251 dev = qdev_new(TYPE_LASI_CHIP); 252 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 253 254 return LASI_CHIP(dev); 255 } 256 257 static DinoState *dino_init(MemoryRegion *addr_space) 258 { 259 DeviceState *dev; 260 261 dev = qdev_new(TYPE_DINO_PCI_HOST_BRIDGE); 262 object_property_set_link(OBJECT(dev), "memory-as", OBJECT(addr_space), 263 &error_fatal); 264 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 265 266 return DINO_PCI_HOST_BRIDGE(dev); 267 } 268 269 /* 270 * Step 1: Create CPUs and Memory 271 */ 272 static TranslateFn *machine_HP_common_init_cpus(MachineState *machine) 273 { 274 MemoryRegion *addr_space = get_system_memory(); 275 unsigned int smp_cpus = machine->smp.cpus; 276 TranslateFn *translate; 277 MemoryRegion *cpu_region; 278 uint64_t ram_max; 279 280 /* Create CPUs. */ 281 for (unsigned int i = 0; i < smp_cpus; i++) { 282 cpu[i] = HPPA_CPU(cpu_create(machine->cpu_type)); 283 } 284 285 /* 286 * For now, treat address layout as if PSW_W is clear. 287 * TODO: create a proper hppa64 board model and load elf64 firmware. 288 */ 289 if (hppa_is_pa20(&cpu[0]->env)) { 290 translate = translate_pa20; 291 ram_max = 0xf0000000; /* 3.75 GB (limited by 32-bit firmware) */ 292 } else { 293 translate = translate_pa10; 294 ram_max = 0xf0000000; /* 3.75 GB (32-bit CPU) */ 295 } 296 297 soft_power_reg = translate(NULL, HPA_POWER_BUTTON); 298 299 for (unsigned int i = 0; i < smp_cpus; i++) { 300 g_autofree char *name = g_strdup_printf("cpu%u-io-eir", i); 301 302 cpu_region = g_new(MemoryRegion, 1); 303 memory_region_init_io(cpu_region, OBJECT(cpu[i]), &hppa_io_eir_ops, 304 cpu[i], name, 4); 305 memory_region_add_subregion(addr_space, 306 translate(NULL, CPU_HPA + i * 0x1000), 307 cpu_region); 308 } 309 310 /* RTC and DebugOutputPort on CPU #0 */ 311 cpu_region = g_new(MemoryRegion, 1); 312 memory_region_init_io(cpu_region, OBJECT(cpu[0]), &hppa_io_helper_ops, 313 cpu[0], "cpu0-io-rtc", 2 * sizeof(uint64_t)); 314 memory_region_add_subregion(addr_space, translate(NULL, CPU_HPA + 16), 315 cpu_region); 316 317 /* Main memory region. */ 318 if (machine->ram_size > ram_max) { 319 info_report("Max RAM size limited to %" PRIu64 " MB", ram_max / MiB); 320 machine->ram_size = ram_max; 321 } 322 memory_region_add_subregion_overlap(addr_space, 0, machine->ram, -1); 323 324 return translate; 325 } 326 327 /* 328 * Last creation step: Add SCSI discs, NICs, graphics & load firmware 329 */ 330 static void machine_HP_common_init_tail(MachineState *machine, PCIBus *pci_bus, 331 TranslateFn *translate) 332 { 333 const char *kernel_filename = machine->kernel_filename; 334 const char *kernel_cmdline = machine->kernel_cmdline; 335 const char *initrd_filename = machine->initrd_filename; 336 MachineClass *mc = MACHINE_GET_CLASS(machine); 337 DeviceState *dev; 338 PCIDevice *pci_dev; 339 char *firmware_filename; 340 uint64_t firmware_low, firmware_high; 341 long size; 342 uint64_t kernel_entry = 0, kernel_low, kernel_high; 343 MemoryRegion *addr_space = get_system_memory(); 344 MemoryRegion *rom_region; 345 long i; 346 unsigned int smp_cpus = machine->smp.cpus; 347 SysBusDevice *s; 348 349 /* SCSI disk setup. */ 350 if (drive_get_max_bus(IF_SCSI) >= 0) { 351 dev = DEVICE(pci_create_simple(pci_bus, -1, "lsi53c895a")); 352 lsi53c8xx_handle_legacy_cmdline(dev); 353 } 354 355 /* Graphics setup. */ 356 if (machine->enable_graphics && vga_interface_type != VGA_NONE) { 357 vga_interface_created = true; 358 dev = qdev_new("artist"); 359 s = SYS_BUS_DEVICE(dev); 360 sysbus_realize_and_unref(s, &error_fatal); 361 sysbus_mmio_map(s, 0, translate(NULL, LASI_GFX_HPA)); 362 sysbus_mmio_map(s, 1, translate(NULL, ARTIST_FB_ADDR)); 363 } 364 365 /* Network setup. */ 366 if (nd_table[0].used && enable_lasi_lan()) { 367 lasi_82596_init(addr_space, translate(NULL, LASI_LAN_HPA), 368 qdev_get_gpio_in(lasi_dev, LASI_IRQ_LAN_HPA)); 369 } 370 371 for (i = 0; i < nb_nics; i++) { 372 if (!enable_lasi_lan()) { 373 pci_nic_init_nofail(&nd_table[i], pci_bus, mc->default_nic, NULL); 374 } 375 } 376 377 /* BMC board: HP Powerbar SP2 Diva (with console only) */ 378 pci_dev = pci_new(-1, "pci-serial"); 379 if (!lasi_dev) { 380 /* bind default keyboard/serial to Diva card */ 381 qdev_prop_set_chr(DEVICE(pci_dev), "chardev", serial_hd(0)); 382 } 383 qdev_prop_set_uint8(DEVICE(pci_dev), "prog_if", 0); 384 pci_realize_and_unref(pci_dev, pci_bus, &error_fatal); 385 pci_config_set_vendor_id(pci_dev->config, PCI_VENDOR_ID_HP); 386 pci_config_set_device_id(pci_dev->config, 0x1048); 387 pci_set_word(&pci_dev->config[PCI_SUBSYSTEM_VENDOR_ID], PCI_VENDOR_ID_HP); 388 pci_set_word(&pci_dev->config[PCI_SUBSYSTEM_ID], 0x1227); /* Powerbar */ 389 390 /* create a second serial PCI card when running Astro */ 391 if (serial_hd(1) && !lasi_dev) { 392 pci_dev = pci_new(-1, "pci-serial-4x"); 393 qdev_prop_set_chr(DEVICE(pci_dev), "chardev1", serial_hd(1)); 394 qdev_prop_set_chr(DEVICE(pci_dev), "chardev2", serial_hd(2)); 395 qdev_prop_set_chr(DEVICE(pci_dev), "chardev3", serial_hd(3)); 396 qdev_prop_set_chr(DEVICE(pci_dev), "chardev4", serial_hd(4)); 397 pci_realize_and_unref(pci_dev, pci_bus, &error_fatal); 398 } 399 400 /* create USB OHCI controller for USB keyboard & mouse on Astro machines */ 401 if (!lasi_dev && machine->enable_graphics) { 402 pci_create_simple(pci_bus, -1, "pci-ohci"); 403 usb_create_simple(usb_bus_find(-1), "usb-kbd"); 404 usb_create_simple(usb_bus_find(-1), "usb-mouse"); 405 } 406 407 /* register power switch emulation */ 408 qemu_register_powerdown_notifier(&hppa_system_powerdown_notifier); 409 410 /* fw_cfg configuration interface */ 411 create_fw_cfg(machine, pci_bus, translate(NULL, FW_CFG_IO_BASE)); 412 413 /* Load firmware. Given that this is not "real" firmware, 414 but one explicitly written for the emulation, we might as 415 well load it directly from an ELF image. */ 416 firmware_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, 417 machine->firmware ?: "hppa-firmware.img"); 418 if (firmware_filename == NULL) { 419 error_report("no firmware provided"); 420 exit(1); 421 } 422 423 size = load_elf(firmware_filename, NULL, translate, NULL, 424 &firmware_entry, &firmware_low, &firmware_high, NULL, 425 true, EM_PARISC, 0, 0); 426 427 if (size < 0) { 428 error_report("could not load firmware '%s'", firmware_filename); 429 exit(1); 430 } 431 qemu_log_mask(CPU_LOG_PAGE, "Firmware loaded at 0x%08" PRIx64 432 "-0x%08" PRIx64 ", entry at 0x%08" PRIx64 ".\n", 433 firmware_low, firmware_high, firmware_entry); 434 if (firmware_low < translate(NULL, FIRMWARE_START) || 435 firmware_high >= translate(NULL, FIRMWARE_END)) { 436 error_report("Firmware overlaps with memory or IO space"); 437 exit(1); 438 } 439 g_free(firmware_filename); 440 441 rom_region = g_new(MemoryRegion, 1); 442 memory_region_init_ram(rom_region, NULL, "firmware", 443 (FIRMWARE_END - FIRMWARE_START), &error_fatal); 444 memory_region_add_subregion(addr_space, 445 translate(NULL, FIRMWARE_START), rom_region); 446 447 /* Load kernel */ 448 if (kernel_filename) { 449 size = load_elf(kernel_filename, NULL, linux_kernel_virt_to_phys, 450 NULL, &kernel_entry, &kernel_low, &kernel_high, NULL, 451 true, EM_PARISC, 0, 0); 452 453 kernel_entry = linux_kernel_virt_to_phys(NULL, kernel_entry); 454 455 if (size < 0) { 456 error_report("could not load kernel '%s'", kernel_filename); 457 exit(1); 458 } 459 qemu_log_mask(CPU_LOG_PAGE, "Kernel loaded at 0x%08" PRIx64 460 "-0x%08" PRIx64 ", entry at 0x%08" PRIx64 461 ", size %" PRIu64 " kB\n", 462 kernel_low, kernel_high, kernel_entry, size / KiB); 463 464 if (kernel_cmdline) { 465 cpu[0]->env.gr[24] = 0x4000; 466 pstrcpy_targphys("cmdline", cpu[0]->env.gr[24], 467 TARGET_PAGE_SIZE, kernel_cmdline); 468 } 469 470 if (initrd_filename) { 471 ram_addr_t initrd_base; 472 int64_t initrd_size; 473 474 initrd_size = get_image_size(initrd_filename); 475 if (initrd_size < 0) { 476 error_report("could not load initial ram disk '%s'", 477 initrd_filename); 478 exit(1); 479 } 480 481 /* Load the initrd image high in memory. 482 Mirror the algorithm used by palo: 483 (1) Due to sign-extension problems and PDC, 484 put the initrd no higher than 1G. 485 (2) Reserve 64k for stack. */ 486 initrd_base = MIN(machine->ram_size, 1 * GiB); 487 initrd_base = initrd_base - 64 * KiB; 488 initrd_base = (initrd_base - initrd_size) & TARGET_PAGE_MASK; 489 490 if (initrd_base < kernel_high) { 491 error_report("kernel and initial ram disk too large!"); 492 exit(1); 493 } 494 495 load_image_targphys(initrd_filename, initrd_base, initrd_size); 496 cpu[0]->env.gr[23] = initrd_base; 497 cpu[0]->env.gr[22] = initrd_base + initrd_size; 498 } 499 } 500 501 if (!kernel_entry) { 502 /* When booting via firmware, tell firmware if we want interactive 503 * mode (kernel_entry=1), and to boot from CD (gr[24]='d') 504 * or hard disc * (gr[24]='c'). 505 */ 506 kernel_entry = machine->boot_config.has_menu ? machine->boot_config.menu : 0; 507 cpu[0]->env.gr[24] = machine->boot_config.order[0]; 508 } 509 510 /* We jump to the firmware entry routine and pass the 511 * various parameters in registers. After firmware initialization, 512 * firmware will start the Linux kernel with ramdisk and cmdline. 513 */ 514 cpu[0]->env.gr[26] = machine->ram_size; 515 cpu[0]->env.gr[25] = kernel_entry; 516 517 /* tell firmware how many SMP CPUs to present in inventory table */ 518 cpu[0]->env.gr[21] = smp_cpus; 519 520 /* tell firmware fw_cfg port */ 521 cpu[0]->env.gr[19] = FW_CFG_IO_BASE; 522 } 523 524 /* 525 * Create HP B160L workstation 526 */ 527 static void machine_HP_B160L_init(MachineState *machine) 528 { 529 DeviceState *dev, *dino_dev; 530 MemoryRegion *addr_space = get_system_memory(); 531 TranslateFn *translate; 532 ISABus *isa_bus; 533 PCIBus *pci_bus; 534 535 /* Create CPUs and RAM. */ 536 translate = machine_HP_common_init_cpus(machine); 537 538 if (hppa_is_pa20(&cpu[0]->env)) { 539 error_report("The HP B160L workstation requires a 32-bit " 540 "CPU. Use '-machine C3700' instead."); 541 exit(1); 542 } 543 544 /* Init Lasi chip */ 545 lasi_dev = DEVICE(lasi_init()); 546 memory_region_add_subregion(addr_space, translate(NULL, LASI_HPA), 547 sysbus_mmio_get_region( 548 SYS_BUS_DEVICE(lasi_dev), 0)); 549 550 /* Init Dino (PCI host bus chip). */ 551 dino_dev = DEVICE(dino_init(addr_space)); 552 memory_region_add_subregion(addr_space, translate(NULL, DINO_HPA), 553 sysbus_mmio_get_region( 554 SYS_BUS_DEVICE(dino_dev), 0)); 555 pci_bus = PCI_BUS(qdev_get_child_bus(dino_dev, "pci")); 556 assert(pci_bus); 557 558 /* Create ISA bus, needed for PS/2 kbd/mouse port emulation */ 559 isa_bus = hppa_isa_bus(translate(NULL, IDE_HPA)); 560 assert(isa_bus); 561 562 /* Serial ports: Lasi and Dino use a 7.272727 MHz clock. */ 563 serial_mm_init(addr_space, translate(NULL, LASI_UART_HPA + 0x800), 0, 564 qdev_get_gpio_in(lasi_dev, LASI_IRQ_UART_HPA), 7272727 / 16, 565 serial_hd(0), DEVICE_BIG_ENDIAN); 566 567 serial_mm_init(addr_space, translate(NULL, DINO_UART_HPA + 0x800), 0, 568 qdev_get_gpio_in(dino_dev, DINO_IRQ_RS232INT), 7272727 / 16, 569 serial_hd(1), DEVICE_BIG_ENDIAN); 570 571 /* Parallel port */ 572 parallel_mm_init(addr_space, translate(NULL, LASI_LPT_HPA + 0x800), 0, 573 qdev_get_gpio_in(lasi_dev, LASI_IRQ_LAN_HPA), 574 parallel_hds[0]); 575 576 /* PS/2 Keyboard/Mouse */ 577 dev = qdev_new(TYPE_LASIPS2); 578 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 579 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, 580 qdev_get_gpio_in(lasi_dev, LASI_IRQ_PS2KBD_HPA)); 581 memory_region_add_subregion(addr_space, 582 translate(NULL, LASI_PS2KBD_HPA), 583 sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 584 0)); 585 memory_region_add_subregion(addr_space, 586 translate(NULL, LASI_PS2KBD_HPA + 0x100), 587 sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 588 1)); 589 590 /* Add SCSI discs, NICs, graphics & load firmware */ 591 machine_HP_common_init_tail(machine, pci_bus, translate); 592 } 593 594 static AstroState *astro_init(void) 595 { 596 DeviceState *dev; 597 598 dev = qdev_new(TYPE_ASTRO_CHIP); 599 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 600 601 return ASTRO_CHIP(dev); 602 } 603 604 /* 605 * Create HP C3700 workstation 606 */ 607 static void machine_HP_C3700_init(MachineState *machine) 608 { 609 PCIBus *pci_bus; 610 AstroState *astro; 611 DeviceState *astro_dev; 612 MemoryRegion *addr_space = get_system_memory(); 613 TranslateFn *translate; 614 615 /* Create CPUs and RAM. */ 616 translate = machine_HP_common_init_cpus(machine); 617 618 if (!hppa_is_pa20(&cpu[0]->env)) { 619 error_report("The HP C3000 workstation requires a 64-bit CPU. " 620 "Use '-machine B160L' instead."); 621 exit(1); 622 } 623 624 /* Init Astro and the Elroys (PCI host bus chips). */ 625 astro = astro_init(); 626 astro_dev = DEVICE(astro); 627 memory_region_add_subregion(addr_space, translate(NULL, ASTRO_HPA), 628 sysbus_mmio_get_region( 629 SYS_BUS_DEVICE(astro_dev), 0)); 630 pci_bus = PCI_BUS(qdev_get_child_bus(DEVICE(astro->elroy[0]), "pci")); 631 assert(pci_bus); 632 633 /* Add SCSI discs, NICs, graphics & load firmware */ 634 machine_HP_common_init_tail(machine, pci_bus, translate); 635 } 636 637 static void hppa_machine_reset(MachineState *ms, ShutdownCause reason) 638 { 639 unsigned int smp_cpus = ms->smp.cpus; 640 int i; 641 642 qemu_devices_reset(reason); 643 644 /* Start all CPUs at the firmware entry point. 645 * Monarch CPU will initialize firmware, secondary CPUs 646 * will enter a small idle loop and wait for rendevouz. */ 647 for (i = 0; i < smp_cpus; i++) { 648 CPUState *cs = CPU(cpu[i]); 649 650 cpu_set_pc(cs, firmware_entry); 651 cpu[i]->env.psw = PSW_Q; 652 cpu[i]->env.gr[5] = CPU_HPA + i * 0x1000; 653 654 cs->exception_index = -1; 655 cs->halted = 0; 656 } 657 658 /* already initialized by machine_hppa_init()? */ 659 if (cpu[0]->env.gr[26] == ms->ram_size) { 660 return; 661 } 662 663 cpu[0]->env.gr[26] = ms->ram_size; 664 cpu[0]->env.gr[25] = 0; /* no firmware boot menu */ 665 cpu[0]->env.gr[24] = 'c'; 666 /* gr22/gr23 unused, no initrd while reboot. */ 667 cpu[0]->env.gr[21] = smp_cpus; 668 /* tell firmware fw_cfg port */ 669 cpu[0]->env.gr[19] = FW_CFG_IO_BASE; 670 } 671 672 static void hppa_nmi(NMIState *n, int cpu_index, Error **errp) 673 { 674 CPUState *cs; 675 676 CPU_FOREACH(cs) { 677 cpu_interrupt(cs, CPU_INTERRUPT_NMI); 678 } 679 } 680 681 static void HP_B160L_machine_init_class_init(ObjectClass *oc, void *data) 682 { 683 static const char * const valid_cpu_types[] = { 684 TYPE_HPPA_CPU, 685 NULL 686 }; 687 MachineClass *mc = MACHINE_CLASS(oc); 688 NMIClass *nc = NMI_CLASS(oc); 689 690 mc->desc = "HP B160L workstation"; 691 mc->default_cpu_type = TYPE_HPPA_CPU; 692 mc->valid_cpu_types = valid_cpu_types; 693 mc->init = machine_HP_B160L_init; 694 mc->reset = hppa_machine_reset; 695 mc->block_default_type = IF_SCSI; 696 mc->max_cpus = HPPA_MAX_CPUS; 697 mc->default_cpus = 1; 698 mc->is_default = true; 699 mc->default_ram_size = 512 * MiB; 700 mc->default_boot_order = "cd"; 701 mc->default_ram_id = "ram"; 702 mc->default_nic = "tulip"; 703 704 nc->nmi_monitor_handler = hppa_nmi; 705 } 706 707 static const TypeInfo HP_B160L_machine_init_typeinfo = { 708 .name = MACHINE_TYPE_NAME("B160L"), 709 .parent = TYPE_MACHINE, 710 .class_init = HP_B160L_machine_init_class_init, 711 .interfaces = (InterfaceInfo[]) { 712 { TYPE_NMI }, 713 { } 714 }, 715 }; 716 717 static void HP_C3700_machine_init_class_init(ObjectClass *oc, void *data) 718 { 719 static const char * const valid_cpu_types[] = { 720 TYPE_HPPA64_CPU, 721 NULL 722 }; 723 MachineClass *mc = MACHINE_CLASS(oc); 724 NMIClass *nc = NMI_CLASS(oc); 725 726 mc->desc = "HP C3700 workstation"; 727 mc->default_cpu_type = TYPE_HPPA64_CPU; 728 mc->valid_cpu_types = valid_cpu_types; 729 mc->init = machine_HP_C3700_init; 730 mc->reset = hppa_machine_reset; 731 mc->block_default_type = IF_SCSI; 732 mc->max_cpus = HPPA_MAX_CPUS; 733 mc->default_cpus = 1; 734 mc->is_default = false; 735 mc->default_ram_size = 1024 * MiB; 736 mc->default_boot_order = "cd"; 737 mc->default_ram_id = "ram"; 738 mc->default_nic = "tulip"; 739 740 nc->nmi_monitor_handler = hppa_nmi; 741 } 742 743 static const TypeInfo HP_C3700_machine_init_typeinfo = { 744 .name = MACHINE_TYPE_NAME("C3700"), 745 .parent = TYPE_MACHINE, 746 .class_init = HP_C3700_machine_init_class_init, 747 .interfaces = (InterfaceInfo[]) { 748 { TYPE_NMI }, 749 { } 750 }, 751 }; 752 753 static void hppa_machine_init_register_types(void) 754 { 755 type_register_static(&HP_B160L_machine_init_typeinfo); 756 type_register_static(&HP_C3700_machine_init_typeinfo); 757 } 758 759 type_init(hppa_machine_init_register_types) 760