1 /* 2 * QEMU HPPA hardware system emulator. 3 * (C) Copyright 2018-2023 Helge Deller <deller@gmx.de> 4 * 5 * This work is licensed under the GNU GPL license version 2 or later. 6 */ 7 8 #include "qemu/osdep.h" 9 #include "qemu/datadir.h" 10 #include "cpu.h" 11 #include "elf.h" 12 #include "hw/loader.h" 13 #include "qemu/error-report.h" 14 #include "system/reset.h" 15 #include "system/system.h" 16 #include "system/qtest.h" 17 #include "system/runstate.h" 18 #include "hw/rtc/mc146818rtc.h" 19 #include "hw/timer/i8254.h" 20 #include "hw/char/serial-mm.h" 21 #include "hw/char/parallel.h" 22 #include "hw/intc/i8259.h" 23 #include "hw/input/lasips2.h" 24 #include "hw/net/lasi_82596.h" 25 #include "hw/nmi.h" 26 #include "hw/usb.h" 27 #include "hw/pci/pci.h" 28 #include "hw/pci/pci_device.h" 29 #include "hw/pci-host/astro.h" 30 #include "hw/pci-host/dino.h" 31 #include "hw/misc/lasi.h" 32 #include "hppa_hardware.h" 33 #include "qemu/units.h" 34 #include "qapi/error.h" 35 #include "net/net.h" 36 #include "qemu/log.h" 37 38 #define MIN_SEABIOS_HPPA_VERSION 12 /* require at least this fw version */ 39 40 #define HPA_POWER_BUTTON (FIRMWARE_END - 0x10) 41 static hwaddr soft_power_reg; 42 43 #define enable_lasi_lan() 0 44 45 static DeviceState *lasi_dev; 46 47 static void hppa_powerdown_req(Notifier *n, void *opaque) 48 { 49 uint32_t val; 50 51 val = ldl_be_phys(&address_space_memory, soft_power_reg); 52 if ((val >> 8) == 0) { 53 /* immediately shut down when under hardware control */ 54 qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); 55 return; 56 } 57 58 /* clear bit 31 to indicate that the power switch was pressed. */ 59 val &= ~1; 60 stl_be_phys(&address_space_memory, soft_power_reg, val); 61 } 62 63 static Notifier hppa_system_powerdown_notifier = { 64 .notify = hppa_powerdown_req 65 }; 66 67 /* Fallback for unassigned PCI I/O operations. Avoids MCHK. */ 68 static uint64_t ignore_read(void *opaque, hwaddr addr, unsigned size) 69 { 70 return 0; 71 } 72 73 static void ignore_write(void *opaque, hwaddr addr, uint64_t v, unsigned size) 74 { 75 } 76 77 static const MemoryRegionOps hppa_pci_ignore_ops = { 78 .read = ignore_read, 79 .write = ignore_write, 80 .endianness = DEVICE_BIG_ENDIAN, 81 .valid = { 82 .min_access_size = 1, 83 .max_access_size = 8, 84 }, 85 .impl = { 86 .min_access_size = 1, 87 .max_access_size = 8, 88 }, 89 }; 90 91 static ISABus *hppa_isa_bus(hwaddr addr) 92 { 93 ISABus *isa_bus; 94 qemu_irq *isa_irqs; 95 MemoryRegion *isa_region; 96 97 isa_region = g_new(MemoryRegion, 1); 98 memory_region_init_io(isa_region, NULL, &hppa_pci_ignore_ops, 99 NULL, "isa-io", 0x800); 100 memory_region_add_subregion(get_system_memory(), addr, isa_region); 101 102 isa_bus = isa_bus_new(NULL, get_system_memory(), isa_region, 103 &error_abort); 104 isa_irqs = i8259_init(isa_bus, NULL); 105 isa_bus_register_input_irqs(isa_bus, isa_irqs); 106 107 return isa_bus; 108 } 109 110 /* 111 * Helper functions to emulate RTC clock and DebugOutputPort 112 */ 113 static time_t rtc_ref; 114 115 static uint64_t io_cpu_read(void *opaque, hwaddr addr, unsigned size) 116 { 117 uint64_t val = 0; 118 119 switch (addr) { 120 case 0: /* RTC clock */ 121 val = time(NULL); 122 val += rtc_ref; 123 break; 124 case 8: /* DebugOutputPort */ 125 return 0xe9; /* readback */ 126 } 127 return val; 128 } 129 130 static void io_cpu_write(void *opaque, hwaddr addr, 131 uint64_t val, unsigned size) 132 { 133 unsigned char ch; 134 Chardev *debugout; 135 136 switch (addr) { 137 case 0: /* RTC clock */ 138 rtc_ref = val - time(NULL); 139 break; 140 case 8: /* DebugOutputPort */ 141 ch = val; 142 debugout = serial_hd(0); 143 if (debugout) { 144 qemu_chr_fe_write_all(debugout->be, &ch, 1); 145 } else { 146 fprintf(stderr, "%c", ch); 147 } 148 break; 149 } 150 } 151 152 static const MemoryRegionOps hppa_io_helper_ops = { 153 .read = io_cpu_read, 154 .write = io_cpu_write, 155 .endianness = DEVICE_BIG_ENDIAN, 156 .valid = { 157 .min_access_size = 1, 158 .max_access_size = 8, 159 }, 160 .impl = { 161 .min_access_size = 1, 162 .max_access_size = 8, 163 }, 164 }; 165 166 typedef uint64_t TranslateFn(void *opaque, uint64_t addr); 167 168 static uint64_t linux_kernel_virt_to_phys(void *opaque, uint64_t addr) 169 { 170 addr &= (0x10000000 - 1); 171 return addr; 172 } 173 174 static uint64_t translate_pa10(void *dummy, uint64_t addr) 175 { 176 return (uint32_t)addr; 177 } 178 179 static uint64_t translate_pa20(void *dummy, uint64_t addr) 180 { 181 return hppa_abs_to_phys_pa2_w0(addr); 182 } 183 184 static HPPACPU *cpu[HPPA_MAX_CPUS]; 185 static uint64_t firmware_entry; 186 187 static void fw_cfg_boot_set(void *opaque, const char *boot_device, 188 Error **errp) 189 { 190 fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]); 191 } 192 193 static FWCfgState *create_fw_cfg(MachineState *ms, PCIBus *pci_bus, 194 hwaddr addr) 195 { 196 FWCfgState *fw_cfg; 197 uint64_t val; 198 const char qemu_version[] = QEMU_VERSION; 199 MachineClass *mc = MACHINE_GET_CLASS(ms); 200 int btlb_entries = HPPA_BTLB_ENTRIES(&cpu[0]->env); 201 int len; 202 203 fw_cfg = fw_cfg_init_mem(addr, addr + 4); 204 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, ms->smp.cpus); 205 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, HPPA_MAX_CPUS); 206 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, ms->ram_size); 207 208 val = cpu_to_le64(MIN_SEABIOS_HPPA_VERSION); 209 fw_cfg_add_file(fw_cfg, "/etc/firmware-min-version", 210 g_memdup2(&val, sizeof(val)), sizeof(val)); 211 212 val = cpu_to_le64(HPPA_TLB_ENTRIES - btlb_entries); 213 fw_cfg_add_file(fw_cfg, "/etc/cpu/tlb_entries", 214 g_memdup2(&val, sizeof(val)), sizeof(val)); 215 216 val = cpu_to_le64(btlb_entries); 217 fw_cfg_add_file(fw_cfg, "/etc/cpu/btlb_entries", 218 g_memdup2(&val, sizeof(val)), sizeof(val)); 219 220 len = strlen(mc->name) + 1; 221 fw_cfg_add_file(fw_cfg, "/etc/hppa/machine", 222 g_memdup2(mc->name, len), len); 223 224 val = cpu_to_le64(soft_power_reg); 225 fw_cfg_add_file(fw_cfg, "/etc/hppa/power-button-addr", 226 g_memdup2(&val, sizeof(val)), sizeof(val)); 227 228 val = cpu_to_le64(CPU_HPA + 16); 229 fw_cfg_add_file(fw_cfg, "/etc/hppa/rtc-addr", 230 g_memdup2(&val, sizeof(val)), sizeof(val)); 231 232 val = cpu_to_le64(CPU_HPA + 24); 233 fw_cfg_add_file(fw_cfg, "/etc/hppa/DebugOutputPort", 234 g_memdup2(&val, sizeof(val)), sizeof(val)); 235 236 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ms->boot_config.order[0]); 237 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg); 238 239 fw_cfg_add_file(fw_cfg, "/etc/qemu-version", 240 g_memdup2(qemu_version, sizeof(qemu_version)), 241 sizeof(qemu_version)); 242 243 pci_bus_add_fw_cfg_extra_pci_roots(fw_cfg, pci_bus, &error_abort); 244 245 return fw_cfg; 246 } 247 248 static LasiState *lasi_init(void) 249 { 250 DeviceState *dev; 251 252 dev = qdev_new(TYPE_LASI_CHIP); 253 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 254 255 return LASI_CHIP(dev); 256 } 257 258 static DinoState *dino_init(MemoryRegion *addr_space) 259 { 260 DeviceState *dev; 261 262 dev = qdev_new(TYPE_DINO_PCI_HOST_BRIDGE); 263 object_property_set_link(OBJECT(dev), "memory-as", OBJECT(addr_space), 264 &error_fatal); 265 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 266 267 return DINO_PCI_HOST_BRIDGE(dev); 268 } 269 270 /* 271 * Step 1: Create CPUs and Memory 272 */ 273 static TranslateFn *machine_HP_common_init_cpus(MachineState *machine) 274 { 275 MemoryRegion *addr_space = get_system_memory(); 276 unsigned int smp_cpus = machine->smp.cpus; 277 TranslateFn *translate; 278 MemoryRegion *cpu_region; 279 uint64_t ram_max; 280 281 /* Create CPUs. */ 282 for (unsigned int i = 0; i < smp_cpus; i++) { 283 cpu[i] = HPPA_CPU(cpu_create(machine->cpu_type)); 284 } 285 286 /* Initialize memory */ 287 if (hppa_is_pa20(&cpu[0]->env)) { 288 translate = translate_pa20; 289 ram_max = 256 * GiB; /* like HP rp8440 */ 290 } else { 291 translate = translate_pa10; 292 ram_max = FIRMWARE_START; /* 3.75 GB (32-bit CPU) */ 293 } 294 295 soft_power_reg = translate(NULL, HPA_POWER_BUTTON); 296 297 for (unsigned int i = 0; i < smp_cpus; i++) { 298 g_autofree char *name = g_strdup_printf("cpu%u-io-eir", i); 299 300 cpu_region = g_new(MemoryRegion, 1); 301 memory_region_init_io(cpu_region, OBJECT(cpu[i]), &hppa_io_eir_ops, 302 cpu[i], name, 4); 303 memory_region_add_subregion(addr_space, 304 translate(NULL, CPU_HPA + i * 0x1000), 305 cpu_region); 306 } 307 308 /* RTC and DebugOutputPort on CPU #0 */ 309 cpu_region = g_new(MemoryRegion, 1); 310 memory_region_init_io(cpu_region, OBJECT(cpu[0]), &hppa_io_helper_ops, 311 cpu[0], "cpu0-io-rtc", 2 * sizeof(uint64_t)); 312 memory_region_add_subregion(addr_space, translate(NULL, CPU_HPA + 16), 313 cpu_region); 314 315 /* Main memory region. */ 316 if (machine->ram_size > ram_max) { 317 info_report("Max RAM size limited to %" PRIu64 " MB", ram_max / MiB); 318 machine->ram_size = ram_max; 319 } 320 if (machine->ram_size <= FIRMWARE_START) { 321 /* contiguous memory up to 3.75 GB RAM */ 322 memory_region_add_subregion_overlap(addr_space, 0, machine->ram, -1); 323 } else { 324 /* non-contiguous: Memory above 3.75 GB is mapped at RAM_MAP_HIGH */ 325 MemoryRegion *mem_region; 326 mem_region = g_new(MemoryRegion, 2); 327 memory_region_init_alias(&mem_region[0], &addr_space->parent_obj, 328 "LowMem", machine->ram, 0, FIRMWARE_START); 329 memory_region_init_alias(&mem_region[1], &addr_space->parent_obj, 330 "HighMem", machine->ram, FIRMWARE_START, 331 machine->ram_size - FIRMWARE_START); 332 memory_region_add_subregion_overlap(addr_space, 0, &mem_region[0], -1); 333 memory_region_add_subregion_overlap(addr_space, RAM_MAP_HIGH, 334 &mem_region[1], -1); 335 } 336 337 return translate; 338 } 339 340 /* 341 * Last creation step: Add SCSI discs, NICs, graphics & load firmware 342 */ 343 static void machine_HP_common_init_tail(MachineState *machine, PCIBus *pci_bus, 344 TranslateFn *translate) 345 { 346 const char *kernel_filename = machine->kernel_filename; 347 const char *kernel_cmdline = machine->kernel_cmdline; 348 const char *initrd_filename = machine->initrd_filename; 349 const char *firmware = machine->firmware; 350 MachineClass *mc = MACHINE_GET_CLASS(machine); 351 DeviceState *dev; 352 PCIDevice *pci_dev; 353 char *firmware_filename; 354 uint64_t firmware_low, firmware_high; 355 long size; 356 uint64_t kernel_entry = 0, kernel_low, kernel_high; 357 MemoryRegion *addr_space = get_system_memory(); 358 MemoryRegion *rom_region; 359 SysBusDevice *s; 360 361 /* SCSI disk setup. */ 362 if (drive_get_max_bus(IF_SCSI) >= 0) { 363 dev = DEVICE(pci_create_simple(pci_bus, -1, "lsi53c895a")); 364 lsi53c8xx_handle_legacy_cmdline(dev); 365 } 366 367 /* Graphics setup. */ 368 if (machine->enable_graphics && vga_interface_type != VGA_NONE) { 369 vga_interface_created = true; 370 dev = qdev_new("artist"); 371 s = SYS_BUS_DEVICE(dev); 372 sysbus_realize_and_unref(s, &error_fatal); 373 sysbus_mmio_map(s, 0, translate(NULL, LASI_GFX_HPA)); 374 sysbus_mmio_map(s, 1, translate(NULL, ARTIST_FB_ADDR)); 375 } 376 377 /* Network setup. */ 378 if (lasi_dev) { 379 lasi_82596_init(addr_space, translate(NULL, LASI_LAN_HPA), 380 qdev_get_gpio_in(lasi_dev, LASI_IRQ_LAN_HPA), 381 enable_lasi_lan()); 382 } 383 384 pci_init_nic_devices(pci_bus, mc->default_nic); 385 386 /* BMC board: HP Diva GSP */ 387 dev = qdev_new("diva-gsp"); 388 if (!object_property_get_bool(OBJECT(dev), "disable", NULL)) { 389 pci_dev = pci_new_multifunction(PCI_DEVFN(2, 0), "diva-gsp"); 390 if (!lasi_dev) { 391 /* bind default keyboard/serial to Diva card */ 392 qdev_prop_set_chr(DEVICE(pci_dev), "chardev1", serial_hd(0)); 393 qdev_prop_set_chr(DEVICE(pci_dev), "chardev2", serial_hd(1)); 394 qdev_prop_set_chr(DEVICE(pci_dev), "chardev3", serial_hd(2)); 395 qdev_prop_set_chr(DEVICE(pci_dev), "chardev4", serial_hd(3)); 396 } 397 pci_realize_and_unref(pci_dev, pci_bus, &error_fatal); 398 } 399 400 /* create USB OHCI controller for USB keyboard & mouse on Astro machines */ 401 if (!lasi_dev && machine->enable_graphics && defaults_enabled()) { 402 USBBus *usb_bus; 403 404 pci_create_simple(pci_bus, -1, "pci-ohci"); 405 usb_bus = USB_BUS(object_resolve_type_unambiguous(TYPE_USB_BUS, 406 &error_abort)); 407 usb_create_simple(usb_bus, "usb-kbd"); 408 usb_create_simple(usb_bus, "usb-mouse"); 409 } 410 411 /* register power switch emulation */ 412 qemu_register_powerdown_notifier(&hppa_system_powerdown_notifier); 413 414 /* fw_cfg configuration interface */ 415 create_fw_cfg(machine, pci_bus, translate(NULL, FW_CFG_IO_BASE)); 416 417 /* Load firmware. Given that this is not "real" firmware, 418 but one explicitly written for the emulation, we might as 419 well load it directly from an ELF image. Load the 64-bit 420 firmware on 64-bit machines by default if not specified 421 on command line. */ 422 if (!qtest_enabled()) { 423 if (!firmware) { 424 firmware = lasi_dev ? "hppa-firmware.img" : "hppa-firmware64.img"; 425 } 426 firmware_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, firmware); 427 if (firmware_filename == NULL) { 428 error_report("no firmware provided"); 429 exit(1); 430 } 431 432 size = load_elf(firmware_filename, NULL, translate, NULL, 433 &firmware_entry, &firmware_low, &firmware_high, NULL, 434 ELFDATA2MSB, EM_PARISC, 0, 0); 435 436 if (size < 0) { 437 error_report("could not load firmware '%s'", firmware_filename); 438 exit(1); 439 } 440 qemu_log_mask(CPU_LOG_PAGE, "Firmware loaded at 0x%08" PRIx64 441 "-0x%08" PRIx64 ", entry at 0x%08" PRIx64 ".\n", 442 firmware_low, firmware_high, firmware_entry); 443 if (firmware_low < translate(NULL, FIRMWARE_START) || 444 firmware_high >= translate(NULL, FIRMWARE_END)) { 445 error_report("Firmware overlaps with memory or IO space"); 446 exit(1); 447 } 448 g_free(firmware_filename); 449 } 450 451 rom_region = g_new(MemoryRegion, 1); 452 memory_region_init_ram(rom_region, NULL, "firmware", 453 (FIRMWARE_END - FIRMWARE_START), &error_fatal); 454 memory_region_add_subregion(addr_space, 455 translate(NULL, FIRMWARE_START), rom_region); 456 457 /* Load kernel */ 458 if (kernel_filename) { 459 size = load_elf(kernel_filename, NULL, linux_kernel_virt_to_phys, 460 NULL, &kernel_entry, &kernel_low, &kernel_high, NULL, 461 ELFDATA2MSB, EM_PARISC, 0, 0); 462 463 kernel_entry = linux_kernel_virt_to_phys(NULL, kernel_entry); 464 465 if (size < 0) { 466 error_report("could not load kernel '%s'", kernel_filename); 467 exit(1); 468 } 469 qemu_log_mask(CPU_LOG_PAGE, "Kernel loaded at 0x%08" PRIx64 470 "-0x%08" PRIx64 ", entry at 0x%08" PRIx64 471 ", size %" PRIu64 " kB\n", 472 kernel_low, kernel_high, kernel_entry, size / KiB); 473 474 if (kernel_cmdline) { 475 cpu[0]->env.cmdline_or_bootorder = 0x4000; 476 pstrcpy_targphys("cmdline", cpu[0]->env.cmdline_or_bootorder, 477 TARGET_PAGE_SIZE, kernel_cmdline); 478 } 479 480 if (initrd_filename) { 481 ram_addr_t initrd_base; 482 int64_t initrd_size; 483 484 initrd_size = get_image_size(initrd_filename); 485 if (initrd_size < 0) { 486 error_report("could not load initial ram disk '%s'", 487 initrd_filename); 488 exit(1); 489 } 490 491 /* Load the initrd image high in memory. 492 Mirror the algorithm used by palo: 493 (1) Due to sign-extension problems and PDC, 494 put the initrd no higher than 1G. 495 (2) Reserve 64k for stack. */ 496 initrd_base = MIN(machine->ram_size, 1 * GiB); 497 initrd_base = initrd_base - 64 * KiB; 498 initrd_base = (initrd_base - initrd_size) & TARGET_PAGE_MASK; 499 500 if (initrd_base < kernel_high) { 501 error_report("kernel and initial ram disk too large!"); 502 exit(1); 503 } 504 505 load_image_targphys(initrd_filename, initrd_base, initrd_size); 506 cpu[0]->env.initrd_base = initrd_base; 507 cpu[0]->env.initrd_end = initrd_base + initrd_size; 508 } 509 } 510 511 if (!kernel_entry) { 512 /* When booting via firmware, tell firmware if we want interactive 513 * mode (kernel_entry=1), and to boot from CD (cmdline_or_bootorder='d') 514 * or hard disc (cmdline_or_bootorder='c'). 515 */ 516 kernel_entry = machine->boot_config.has_menu ? machine->boot_config.menu : 0; 517 cpu[0]->env.cmdline_or_bootorder = machine->boot_config.order[0]; 518 } 519 520 /* Keep initial kernel_entry for first boot */ 521 cpu[0]->env.kernel_entry = kernel_entry; 522 } 523 524 /* 525 * Create HP B160L workstation 526 */ 527 static void machine_HP_B160L_init(MachineState *machine) 528 { 529 DeviceState *dev, *dino_dev; 530 MemoryRegion *addr_space = get_system_memory(); 531 TranslateFn *translate; 532 ISABus *isa_bus; 533 PCIBus *pci_bus; 534 535 /* Create CPUs and RAM. */ 536 translate = machine_HP_common_init_cpus(machine); 537 538 if (hppa_is_pa20(&cpu[0]->env)) { 539 error_report("The HP B160L workstation requires a 32-bit " 540 "CPU. Use '-machine C3700' instead."); 541 exit(1); 542 } 543 544 /* Init Lasi chip */ 545 lasi_dev = DEVICE(lasi_init()); 546 memory_region_add_subregion(addr_space, translate(NULL, LASI_HPA), 547 sysbus_mmio_get_region( 548 SYS_BUS_DEVICE(lasi_dev), 0)); 549 550 /* Init Dino (PCI host bus chip). */ 551 dino_dev = DEVICE(dino_init(addr_space)); 552 memory_region_add_subregion(addr_space, translate(NULL, DINO_HPA), 553 sysbus_mmio_get_region( 554 SYS_BUS_DEVICE(dino_dev), 0)); 555 pci_bus = PCI_BUS(qdev_get_child_bus(dino_dev, "pci")); 556 assert(pci_bus); 557 558 /* Create ISA bus, needed for PS/2 kbd/mouse port emulation */ 559 isa_bus = hppa_isa_bus(translate(NULL, IDE_HPA)); 560 assert(isa_bus); 561 562 /* Serial ports: Lasi and Dino use a 7.272727 MHz clock. */ 563 serial_mm_init(addr_space, translate(NULL, LASI_UART_HPA + 0x800), 0, 564 qdev_get_gpio_in(lasi_dev, LASI_IRQ_UART_HPA), 7272727 / 16, 565 serial_hd(0), DEVICE_BIG_ENDIAN); 566 567 serial_mm_init(addr_space, translate(NULL, DINO_UART_HPA + 0x800), 0, 568 qdev_get_gpio_in(dino_dev, DINO_IRQ_RS232INT), 7272727 / 16, 569 serial_hd(1), DEVICE_BIG_ENDIAN); 570 571 /* Parallel port */ 572 parallel_mm_init(addr_space, translate(NULL, LASI_LPT_HPA + 0x800), 0, 573 qdev_get_gpio_in(lasi_dev, LASI_IRQ_LAN_HPA), 574 parallel_hds[0]); 575 576 /* PS/2 Keyboard/Mouse */ 577 dev = qdev_new(TYPE_LASIPS2); 578 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 579 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, 580 qdev_get_gpio_in(lasi_dev, LASI_IRQ_PS2KBD_HPA)); 581 memory_region_add_subregion(addr_space, 582 translate(NULL, LASI_PS2KBD_HPA), 583 sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 584 0)); 585 memory_region_add_subregion(addr_space, 586 translate(NULL, LASI_PS2KBD_HPA + 0x100), 587 sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 588 1)); 589 590 /* Add SCSI discs, NICs, graphics & load firmware */ 591 machine_HP_common_init_tail(machine, pci_bus, translate); 592 } 593 594 static AstroState *astro_init(void) 595 { 596 DeviceState *dev; 597 598 dev = qdev_new(TYPE_ASTRO_CHIP); 599 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 600 601 return ASTRO_CHIP(dev); 602 } 603 604 /* 605 * Create HP C3700 workstation 606 */ 607 static void machine_HP_C3700_init(MachineState *machine) 608 { 609 PCIBus *pci_bus; 610 AstroState *astro; 611 DeviceState *astro_dev; 612 MemoryRegion *addr_space = get_system_memory(); 613 TranslateFn *translate; 614 615 /* Create CPUs and RAM. */ 616 translate = machine_HP_common_init_cpus(machine); 617 618 if (!hppa_is_pa20(&cpu[0]->env)) { 619 error_report("The HP C3000 workstation requires a 64-bit CPU. " 620 "Use '-machine B160L' instead."); 621 exit(1); 622 } 623 624 /* Init Astro and the Elroys (PCI host bus chips). */ 625 astro = astro_init(); 626 astro_dev = DEVICE(astro); 627 memory_region_add_subregion(addr_space, translate(NULL, ASTRO_HPA), 628 sysbus_mmio_get_region( 629 SYS_BUS_DEVICE(astro_dev), 0)); 630 pci_bus = PCI_BUS(qdev_get_child_bus(DEVICE(astro->elroy[0]), "pci")); 631 assert(pci_bus); 632 633 /* Add SCSI discs, NICs, graphics & load firmware */ 634 machine_HP_common_init_tail(machine, pci_bus, translate); 635 } 636 637 static void hppa_machine_reset(MachineState *ms, ResetType type) 638 { 639 unsigned int smp_cpus = ms->smp.cpus; 640 int i; 641 642 qemu_devices_reset(type); 643 644 /* Start all CPUs at the firmware entry point. 645 * Monarch CPU will initialize firmware, secondary CPUs 646 * will enter a small idle loop and wait for rendevouz. */ 647 for (i = 0; i < smp_cpus; i++) { 648 CPUState *cs = CPU(cpu[i]); 649 650 /* reset CPU */ 651 resettable_reset(OBJECT(cs), RESET_TYPE_COLD); 652 653 cpu_set_pc(cs, firmware_entry); 654 cpu[i]->env.psw = PSW_Q; 655 cpu[i]->env.gr[5] = CPU_HPA + i * 0x1000; 656 } 657 658 cpu[0]->env.gr[26] = ms->ram_size; 659 cpu[0]->env.gr[25] = cpu[0]->env.kernel_entry; 660 cpu[0]->env.gr[24] = cpu[0]->env.cmdline_or_bootorder; 661 cpu[0]->env.gr[23] = cpu[0]->env.initrd_base; 662 cpu[0]->env.gr[22] = cpu[0]->env.initrd_end; 663 cpu[0]->env.gr[21] = smp_cpus; 664 cpu[0]->env.gr[19] = FW_CFG_IO_BASE; 665 666 /* reset static fields to avoid starting Linux kernel & initrd on reboot */ 667 cpu[0]->env.kernel_entry = 0; 668 cpu[0]->env.initrd_base = 0; 669 cpu[0]->env.initrd_end = 0; 670 cpu[0]->env.cmdline_or_bootorder = 'c'; 671 } 672 673 static void hppa_nmi(NMIState *n, int cpu_index, Error **errp) 674 { 675 CPUState *cs; 676 677 CPU_FOREACH(cs) { 678 cpu_interrupt(cs, CPU_INTERRUPT_NMI); 679 } 680 } 681 682 static void HP_B160L_machine_init_class_init(ObjectClass *oc, void *data) 683 { 684 static const char * const valid_cpu_types[] = { 685 TYPE_HPPA_CPU, 686 NULL 687 }; 688 MachineClass *mc = MACHINE_CLASS(oc); 689 NMIClass *nc = NMI_CLASS(oc); 690 691 mc->desc = "HP B160L workstation"; 692 mc->default_cpu_type = TYPE_HPPA_CPU; 693 mc->valid_cpu_types = valid_cpu_types; 694 mc->init = machine_HP_B160L_init; 695 mc->reset = hppa_machine_reset; 696 mc->block_default_type = IF_SCSI; 697 mc->max_cpus = HPPA_MAX_CPUS; 698 mc->default_cpus = 1; 699 mc->is_default = true; 700 mc->default_ram_size = 512 * MiB; 701 mc->default_boot_order = "cd"; 702 mc->default_ram_id = "ram"; 703 mc->default_nic = "tulip"; 704 705 nc->nmi_monitor_handler = hppa_nmi; 706 } 707 708 static const TypeInfo HP_B160L_machine_init_typeinfo = { 709 .name = MACHINE_TYPE_NAME("B160L"), 710 .parent = TYPE_MACHINE, 711 .class_init = HP_B160L_machine_init_class_init, 712 .interfaces = (InterfaceInfo[]) { 713 { TYPE_NMI }, 714 { } 715 }, 716 }; 717 718 static void HP_C3700_machine_init_class_init(ObjectClass *oc, void *data) 719 { 720 static const char * const valid_cpu_types[] = { 721 TYPE_HPPA64_CPU, 722 NULL 723 }; 724 MachineClass *mc = MACHINE_CLASS(oc); 725 NMIClass *nc = NMI_CLASS(oc); 726 727 mc->desc = "HP C3700 workstation"; 728 mc->default_cpu_type = TYPE_HPPA64_CPU; 729 mc->valid_cpu_types = valid_cpu_types; 730 mc->init = machine_HP_C3700_init; 731 mc->reset = hppa_machine_reset; 732 mc->block_default_type = IF_SCSI; 733 mc->max_cpus = HPPA_MAX_CPUS; 734 mc->default_cpus = 1; 735 mc->is_default = false; 736 mc->default_ram_size = 1024 * MiB; 737 mc->default_boot_order = "cd"; 738 mc->default_ram_id = "ram"; 739 mc->default_nic = "tulip"; 740 741 nc->nmi_monitor_handler = hppa_nmi; 742 } 743 744 static const TypeInfo HP_C3700_machine_init_typeinfo = { 745 .name = MACHINE_TYPE_NAME("C3700"), 746 .parent = TYPE_MACHINE, 747 .class_init = HP_C3700_machine_init_class_init, 748 .interfaces = (InterfaceInfo[]) { 749 { TYPE_NMI }, 750 { } 751 }, 752 }; 753 754 static void hppa_machine_init_register_types(void) 755 { 756 type_register_static(&HP_B160L_machine_init_typeinfo); 757 type_register_static(&HP_C3700_machine_init_typeinfo); 758 } 759 760 type_init(hppa_machine_init_register_types) 761