1 /* 2 * QEMU HPPA hardware system emulator. 3 * Copyright 2018 Helge Deller <deller@gmx.de> 4 */ 5 6 #include "qemu/osdep.h" 7 #include "qemu/datadir.h" 8 #include "cpu.h" 9 #include "elf.h" 10 #include "hw/loader.h" 11 #include "qemu/error-report.h" 12 #include "sysemu/reset.h" 13 #include "sysemu/sysemu.h" 14 #include "sysemu/runstate.h" 15 #include "hw/rtc/mc146818rtc.h" 16 #include "hw/timer/i8254.h" 17 #include "hw/char/serial.h" 18 #include "hw/char/parallel.h" 19 #include "hw/intc/i8259.h" 20 #include "hw/input/lasips2.h" 21 #include "hw/net/lasi_82596.h" 22 #include "hw/nmi.h" 23 #include "hw/pci/pci.h" 24 #include "hw/pci-host/dino.h" 25 #include "hw/misc/lasi.h" 26 #include "hppa_hardware.h" 27 #include "qemu/units.h" 28 #include "qapi/error.h" 29 #include "net/net.h" 30 #include "qemu/log.h" 31 32 #define MIN_SEABIOS_HPPA_VERSION 6 /* require at least this fw version */ 33 34 #define HPA_POWER_BUTTON (FIRMWARE_END - 0x10) 35 36 #define enable_lasi_lan() 0 37 38 39 static void hppa_powerdown_req(Notifier *n, void *opaque) 40 { 41 hwaddr soft_power_reg = HPA_POWER_BUTTON; 42 uint32_t val; 43 44 val = ldl_be_phys(&address_space_memory, soft_power_reg); 45 if ((val >> 8) == 0) { 46 /* immediately shut down when under hardware control */ 47 qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); 48 return; 49 } 50 51 /* clear bit 31 to indicate that the power switch was pressed. */ 52 val &= ~1; 53 stl_be_phys(&address_space_memory, soft_power_reg, val); 54 } 55 56 static Notifier hppa_system_powerdown_notifier = { 57 .notify = hppa_powerdown_req 58 }; 59 60 /* Fallback for unassigned PCI I/O operations. Avoids MCHK. */ 61 static uint64_t ignore_read(void *opaque, hwaddr addr, unsigned size) 62 { 63 return 0; 64 } 65 66 static void ignore_write(void *opaque, hwaddr addr, uint64_t v, unsigned size) 67 { 68 } 69 70 static const MemoryRegionOps hppa_pci_ignore_ops = { 71 .read = ignore_read, 72 .write = ignore_write, 73 .endianness = DEVICE_BIG_ENDIAN, 74 .valid = { 75 .min_access_size = 1, 76 .max_access_size = 8, 77 }, 78 .impl = { 79 .min_access_size = 1, 80 .max_access_size = 8, 81 }, 82 }; 83 84 static ISABus *hppa_isa_bus(void) 85 { 86 ISABus *isa_bus; 87 qemu_irq *isa_irqs; 88 MemoryRegion *isa_region; 89 90 isa_region = g_new(MemoryRegion, 1); 91 memory_region_init_io(isa_region, NULL, &hppa_pci_ignore_ops, 92 NULL, "isa-io", 0x800); 93 memory_region_add_subregion(get_system_memory(), IDE_HPA, 94 isa_region); 95 96 isa_bus = isa_bus_new(NULL, get_system_memory(), isa_region, 97 &error_abort); 98 isa_irqs = i8259_init(isa_bus, 99 /* qemu_allocate_irq(dino_set_isa_irq, s, 0)); */ 100 NULL); 101 isa_bus_register_input_irqs(isa_bus, isa_irqs); 102 103 return isa_bus; 104 } 105 106 static uint64_t cpu_hppa_to_phys(void *opaque, uint64_t addr) 107 { 108 addr &= (0x10000000 - 1); 109 return addr; 110 } 111 112 static HPPACPU *cpu[HPPA_MAX_CPUS]; 113 static uint64_t firmware_entry; 114 115 static void fw_cfg_boot_set(void *opaque, const char *boot_device, 116 Error **errp) 117 { 118 fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]); 119 } 120 121 static FWCfgState *create_fw_cfg(MachineState *ms) 122 { 123 FWCfgState *fw_cfg; 124 uint64_t val; 125 126 fw_cfg = fw_cfg_init_mem(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4); 127 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, ms->smp.cpus); 128 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, HPPA_MAX_CPUS); 129 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, ms->ram_size); 130 131 val = cpu_to_le64(MIN_SEABIOS_HPPA_VERSION); 132 fw_cfg_add_file(fw_cfg, "/etc/firmware-min-version", 133 g_memdup(&val, sizeof(val)), sizeof(val)); 134 135 val = cpu_to_le64(HPPA_TLB_ENTRIES); 136 fw_cfg_add_file(fw_cfg, "/etc/cpu/tlb_entries", 137 g_memdup(&val, sizeof(val)), sizeof(val)); 138 139 val = cpu_to_le64(HPPA_BTLB_ENTRIES); 140 fw_cfg_add_file(fw_cfg, "/etc/cpu/btlb_entries", 141 g_memdup(&val, sizeof(val)), sizeof(val)); 142 143 val = cpu_to_le64(HPA_POWER_BUTTON); 144 fw_cfg_add_file(fw_cfg, "/etc/power-button-addr", 145 g_memdup(&val, sizeof(val)), sizeof(val)); 146 147 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ms->boot_config.order[0]); 148 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg); 149 150 return fw_cfg; 151 } 152 153 static LasiState *lasi_init(void) 154 { 155 DeviceState *dev; 156 157 dev = qdev_new(TYPE_LASI_CHIP); 158 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 159 160 return LASI_CHIP(dev); 161 } 162 163 static DinoState *dino_init(MemoryRegion *addr_space) 164 { 165 DeviceState *dev; 166 167 dev = qdev_new(TYPE_DINO_PCI_HOST_BRIDGE); 168 object_property_set_link(OBJECT(dev), "memory-as", OBJECT(addr_space), 169 &error_fatal); 170 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 171 172 return DINO_PCI_HOST_BRIDGE(dev); 173 } 174 175 static void machine_hppa_init(MachineState *machine) 176 { 177 const char *kernel_filename = machine->kernel_filename; 178 const char *kernel_cmdline = machine->kernel_cmdline; 179 const char *initrd_filename = machine->initrd_filename; 180 MachineClass *mc = MACHINE_GET_CLASS(machine); 181 DeviceState *dev, *dino_dev, *lasi_dev; 182 PCIBus *pci_bus; 183 ISABus *isa_bus; 184 char *firmware_filename; 185 uint64_t firmware_low, firmware_high; 186 long size; 187 uint64_t kernel_entry = 0, kernel_low, kernel_high; 188 MemoryRegion *addr_space = get_system_memory(); 189 MemoryRegion *rom_region; 190 MemoryRegion *cpu_region; 191 long i; 192 unsigned int smp_cpus = machine->smp.cpus; 193 SysBusDevice *s; 194 195 /* Create CPUs. */ 196 for (i = 0; i < smp_cpus; i++) { 197 char *name = g_strdup_printf("cpu%ld-io-eir", i); 198 cpu[i] = HPPA_CPU(cpu_create(machine->cpu_type)); 199 200 cpu_region = g_new(MemoryRegion, 1); 201 memory_region_init_io(cpu_region, OBJECT(cpu[i]), &hppa_io_eir_ops, 202 cpu[i], name, 4); 203 memory_region_add_subregion(addr_space, CPU_HPA + i * 0x1000, 204 cpu_region); 205 g_free(name); 206 } 207 208 /* Main memory region. */ 209 if (machine->ram_size > 3 * GiB) { 210 error_report("RAM size is currently restricted to 3GB"); 211 exit(EXIT_FAILURE); 212 } 213 memory_region_add_subregion_overlap(addr_space, 0, machine->ram, -1); 214 215 216 /* Init Lasi chip */ 217 lasi_dev = DEVICE(lasi_init()); 218 memory_region_add_subregion(addr_space, LASI_HPA, 219 sysbus_mmio_get_region( 220 SYS_BUS_DEVICE(lasi_dev), 0)); 221 222 /* Init Dino (PCI host bus chip). */ 223 dino_dev = DEVICE(dino_init(addr_space)); 224 memory_region_add_subregion(addr_space, DINO_HPA, 225 sysbus_mmio_get_region( 226 SYS_BUS_DEVICE(dino_dev), 0)); 227 pci_bus = PCI_BUS(qdev_get_child_bus(dino_dev, "pci")); 228 assert(pci_bus); 229 230 /* Create ISA bus. */ 231 isa_bus = hppa_isa_bus(); 232 assert(isa_bus); 233 234 /* Realtime clock, used by firmware for PDC_TOD call. */ 235 mc146818_rtc_init(isa_bus, 2000, NULL); 236 237 /* Serial ports: Lasi and Dino use a 7.272727 MHz clock. */ 238 serial_mm_init(addr_space, LASI_UART_HPA + 0x800, 0, 239 qdev_get_gpio_in(lasi_dev, LASI_IRQ_UART_HPA), 7272727 / 16, 240 serial_hd(0), DEVICE_BIG_ENDIAN); 241 242 serial_mm_init(addr_space, DINO_UART_HPA + 0x800, 0, 243 qdev_get_gpio_in(dino_dev, DINO_IRQ_RS232INT), 7272727 / 16, 244 serial_hd(1), DEVICE_BIG_ENDIAN); 245 246 /* Parallel port */ 247 parallel_mm_init(addr_space, LASI_LPT_HPA + 0x800, 0, 248 qdev_get_gpio_in(lasi_dev, LASI_IRQ_LAN_HPA), 249 parallel_hds[0]); 250 251 /* fw_cfg configuration interface */ 252 create_fw_cfg(machine); 253 254 /* SCSI disk setup. */ 255 dev = DEVICE(pci_create_simple(pci_bus, -1, "lsi53c895a")); 256 lsi53c8xx_handle_legacy_cmdline(dev); 257 258 /* Graphics setup. */ 259 if (machine->enable_graphics && vga_interface_type != VGA_NONE) { 260 vga_interface_created = true; 261 dev = qdev_new("artist"); 262 s = SYS_BUS_DEVICE(dev); 263 sysbus_realize_and_unref(s, &error_fatal); 264 sysbus_mmio_map(s, 0, LASI_GFX_HPA); 265 sysbus_mmio_map(s, 1, ARTIST_FB_ADDR); 266 } 267 268 /* Network setup. */ 269 if (enable_lasi_lan()) { 270 lasi_82596_init(addr_space, LASI_LAN_HPA, 271 qdev_get_gpio_in(lasi_dev, LASI_IRQ_LAN_HPA)); 272 } 273 274 for (i = 0; i < nb_nics; i++) { 275 if (!enable_lasi_lan()) { 276 pci_nic_init_nofail(&nd_table[i], pci_bus, mc->default_nic, NULL); 277 } 278 } 279 280 /* PS/2 Keyboard/Mouse */ 281 dev = qdev_new(TYPE_LASIPS2); 282 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 283 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, 284 qdev_get_gpio_in(lasi_dev, LASI_IRQ_PS2KBD_HPA)); 285 memory_region_add_subregion(addr_space, LASI_PS2KBD_HPA, 286 sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 287 0)); 288 memory_region_add_subregion(addr_space, LASI_PS2KBD_HPA + 0x100, 289 sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 290 1)); 291 292 /* register power switch emulation */ 293 qemu_register_powerdown_notifier(&hppa_system_powerdown_notifier); 294 295 /* Load firmware. Given that this is not "real" firmware, 296 but one explicitly written for the emulation, we might as 297 well load it directly from an ELF image. */ 298 firmware_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, 299 machine->firmware ?: "hppa-firmware.img"); 300 if (firmware_filename == NULL) { 301 error_report("no firmware provided"); 302 exit(1); 303 } 304 305 size = load_elf(firmware_filename, NULL, NULL, NULL, 306 &firmware_entry, &firmware_low, &firmware_high, NULL, 307 true, EM_PARISC, 0, 0); 308 309 /* Unfortunately, load_elf sign-extends reading elf32. */ 310 firmware_entry = (target_ureg)firmware_entry; 311 firmware_low = (target_ureg)firmware_low; 312 firmware_high = (target_ureg)firmware_high; 313 314 if (size < 0) { 315 error_report("could not load firmware '%s'", firmware_filename); 316 exit(1); 317 } 318 qemu_log_mask(CPU_LOG_PAGE, "Firmware loaded at 0x%08" PRIx64 319 "-0x%08" PRIx64 ", entry at 0x%08" PRIx64 ".\n", 320 firmware_low, firmware_high, firmware_entry); 321 if (firmware_low < FIRMWARE_START || firmware_high >= FIRMWARE_END) { 322 error_report("Firmware overlaps with memory or IO space"); 323 exit(1); 324 } 325 g_free(firmware_filename); 326 327 rom_region = g_new(MemoryRegion, 1); 328 memory_region_init_ram(rom_region, NULL, "firmware", 329 (FIRMWARE_END - FIRMWARE_START), &error_fatal); 330 memory_region_add_subregion(addr_space, FIRMWARE_START, rom_region); 331 332 /* Load kernel */ 333 if (kernel_filename) { 334 size = load_elf(kernel_filename, NULL, &cpu_hppa_to_phys, 335 NULL, &kernel_entry, &kernel_low, &kernel_high, NULL, 336 true, EM_PARISC, 0, 0); 337 338 /* Unfortunately, load_elf sign-extends reading elf32. */ 339 kernel_entry = (target_ureg) cpu_hppa_to_phys(NULL, kernel_entry); 340 kernel_low = (target_ureg)kernel_low; 341 kernel_high = (target_ureg)kernel_high; 342 343 if (size < 0) { 344 error_report("could not load kernel '%s'", kernel_filename); 345 exit(1); 346 } 347 qemu_log_mask(CPU_LOG_PAGE, "Kernel loaded at 0x%08" PRIx64 348 "-0x%08" PRIx64 ", entry at 0x%08" PRIx64 349 ", size %" PRIu64 " kB\n", 350 kernel_low, kernel_high, kernel_entry, size / KiB); 351 352 if (kernel_cmdline) { 353 cpu[0]->env.gr[24] = 0x4000; 354 pstrcpy_targphys("cmdline", cpu[0]->env.gr[24], 355 TARGET_PAGE_SIZE, kernel_cmdline); 356 } 357 358 if (initrd_filename) { 359 ram_addr_t initrd_base; 360 int64_t initrd_size; 361 362 initrd_size = get_image_size(initrd_filename); 363 if (initrd_size < 0) { 364 error_report("could not load initial ram disk '%s'", 365 initrd_filename); 366 exit(1); 367 } 368 369 /* Load the initrd image high in memory. 370 Mirror the algorithm used by palo: 371 (1) Due to sign-extension problems and PDC, 372 put the initrd no higher than 1G. 373 (2) Reserve 64k for stack. */ 374 initrd_base = MIN(machine->ram_size, 1 * GiB); 375 initrd_base = initrd_base - 64 * KiB; 376 initrd_base = (initrd_base - initrd_size) & TARGET_PAGE_MASK; 377 378 if (initrd_base < kernel_high) { 379 error_report("kernel and initial ram disk too large!"); 380 exit(1); 381 } 382 383 load_image_targphys(initrd_filename, initrd_base, initrd_size); 384 cpu[0]->env.gr[23] = initrd_base; 385 cpu[0]->env.gr[22] = initrd_base + initrd_size; 386 } 387 } 388 389 if (!kernel_entry) { 390 /* When booting via firmware, tell firmware if we want interactive 391 * mode (kernel_entry=1), and to boot from CD (gr[24]='d') 392 * or hard disc * (gr[24]='c'). 393 */ 394 kernel_entry = machine->boot_config.has_menu ? machine->boot_config.menu : 0; 395 cpu[0]->env.gr[24] = machine->boot_config.order[0]; 396 } 397 398 /* We jump to the firmware entry routine and pass the 399 * various parameters in registers. After firmware initialization, 400 * firmware will start the Linux kernel with ramdisk and cmdline. 401 */ 402 cpu[0]->env.gr[26] = machine->ram_size; 403 cpu[0]->env.gr[25] = kernel_entry; 404 405 /* tell firmware how many SMP CPUs to present in inventory table */ 406 cpu[0]->env.gr[21] = smp_cpus; 407 408 /* tell firmware fw_cfg port */ 409 cpu[0]->env.gr[19] = FW_CFG_IO_BASE; 410 } 411 412 static void hppa_machine_reset(MachineState *ms, ShutdownCause reason) 413 { 414 unsigned int smp_cpus = ms->smp.cpus; 415 int i; 416 417 qemu_devices_reset(reason); 418 419 /* Start all CPUs at the firmware entry point. 420 * Monarch CPU will initialize firmware, secondary CPUs 421 * will enter a small idle look and wait for rendevouz. */ 422 for (i = 0; i < smp_cpus; i++) { 423 cpu_set_pc(CPU(cpu[i]), firmware_entry); 424 cpu[i]->env.gr[5] = CPU_HPA + i * 0x1000; 425 } 426 427 /* already initialized by machine_hppa_init()? */ 428 if (cpu[0]->env.gr[26] == ms->ram_size) { 429 return; 430 } 431 432 cpu[0]->env.gr[26] = ms->ram_size; 433 cpu[0]->env.gr[25] = 0; /* no firmware boot menu */ 434 cpu[0]->env.gr[24] = 'c'; 435 /* gr22/gr23 unused, no initrd while reboot. */ 436 cpu[0]->env.gr[21] = smp_cpus; 437 /* tell firmware fw_cfg port */ 438 cpu[0]->env.gr[19] = FW_CFG_IO_BASE; 439 } 440 441 static void hppa_nmi(NMIState *n, int cpu_index, Error **errp) 442 { 443 CPUState *cs; 444 445 CPU_FOREACH(cs) { 446 cpu_interrupt(cs, CPU_INTERRUPT_NMI); 447 } 448 } 449 450 static void hppa_machine_init_class_init(ObjectClass *oc, void *data) 451 { 452 MachineClass *mc = MACHINE_CLASS(oc); 453 NMIClass *nc = NMI_CLASS(oc); 454 455 mc->desc = "HPPA B160L machine"; 456 mc->default_cpu_type = TYPE_HPPA_CPU; 457 mc->init = machine_hppa_init; 458 mc->reset = hppa_machine_reset; 459 mc->block_default_type = IF_SCSI; 460 mc->max_cpus = HPPA_MAX_CPUS; 461 mc->default_cpus = 1; 462 mc->is_default = true; 463 mc->default_ram_size = 512 * MiB; 464 mc->default_boot_order = "cd"; 465 mc->default_ram_id = "ram"; 466 mc->default_nic = "tulip"; 467 468 nc->nmi_monitor_handler = hppa_nmi; 469 } 470 471 static const TypeInfo hppa_machine_init_typeinfo = { 472 .name = MACHINE_TYPE_NAME("hppa"), 473 .parent = TYPE_MACHINE, 474 .class_init = hppa_machine_init_class_init, 475 .interfaces = (InterfaceInfo[]) { 476 { TYPE_NMI }, 477 { } 478 }, 479 }; 480 481 static void hppa_machine_init_register_types(void) 482 { 483 type_register_static(&hppa_machine_init_typeinfo); 484 } 485 486 type_init(hppa_machine_init_register_types) 487