1 /* 2 * QEMU HPPA hardware system emulator. 3 * (C) Copyright 2018-2023 Helge Deller <deller@gmx.de> 4 * 5 * This work is licensed under the GNU GPL license version 2 or later. 6 */ 7 8 #include "qemu/osdep.h" 9 #include "qemu/datadir.h" 10 #include "cpu.h" 11 #include "elf.h" 12 #include "hw/loader.h" 13 #include "qemu/error-report.h" 14 #include "sysemu/reset.h" 15 #include "sysemu/sysemu.h" 16 #include "sysemu/runstate.h" 17 #include "hw/rtc/mc146818rtc.h" 18 #include "hw/timer/i8254.h" 19 #include "hw/char/serial.h" 20 #include "hw/char/parallel.h" 21 #include "hw/intc/i8259.h" 22 #include "hw/input/lasips2.h" 23 #include "hw/net/lasi_82596.h" 24 #include "hw/nmi.h" 25 #include "hw/usb.h" 26 #include "hw/pci/pci.h" 27 #include "hw/pci/pci_device.h" 28 #include "hw/pci-host/astro.h" 29 #include "hw/pci-host/dino.h" 30 #include "hw/misc/lasi.h" 31 #include "hppa_hardware.h" 32 #include "qemu/units.h" 33 #include "qapi/error.h" 34 #include "net/net.h" 35 #include "qemu/log.h" 36 37 #define MIN_SEABIOS_HPPA_VERSION 10 /* require at least this fw version */ 38 39 #define HPA_POWER_BUTTON (FIRMWARE_END - 0x10) 40 41 #define enable_lasi_lan() 0 42 43 static DeviceState *lasi_dev; 44 45 static void hppa_powerdown_req(Notifier *n, void *opaque) 46 { 47 hwaddr soft_power_reg = HPA_POWER_BUTTON; 48 uint32_t val; 49 50 val = ldl_be_phys(&address_space_memory, soft_power_reg); 51 if ((val >> 8) == 0) { 52 /* immediately shut down when under hardware control */ 53 qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); 54 return; 55 } 56 57 /* clear bit 31 to indicate that the power switch was pressed. */ 58 val &= ~1; 59 stl_be_phys(&address_space_memory, soft_power_reg, val); 60 } 61 62 static Notifier hppa_system_powerdown_notifier = { 63 .notify = hppa_powerdown_req 64 }; 65 66 /* Fallback for unassigned PCI I/O operations. Avoids MCHK. */ 67 static uint64_t ignore_read(void *opaque, hwaddr addr, unsigned size) 68 { 69 return 0; 70 } 71 72 static void ignore_write(void *opaque, hwaddr addr, uint64_t v, unsigned size) 73 { 74 } 75 76 static const MemoryRegionOps hppa_pci_ignore_ops = { 77 .read = ignore_read, 78 .write = ignore_write, 79 .endianness = DEVICE_BIG_ENDIAN, 80 .valid = { 81 .min_access_size = 1, 82 .max_access_size = 8, 83 }, 84 .impl = { 85 .min_access_size = 1, 86 .max_access_size = 8, 87 }, 88 }; 89 90 static ISABus *hppa_isa_bus(hwaddr addr) 91 { 92 ISABus *isa_bus; 93 qemu_irq *isa_irqs; 94 MemoryRegion *isa_region; 95 96 isa_region = g_new(MemoryRegion, 1); 97 memory_region_init_io(isa_region, NULL, &hppa_pci_ignore_ops, 98 NULL, "isa-io", 0x800); 99 memory_region_add_subregion(get_system_memory(), addr, isa_region); 100 101 isa_bus = isa_bus_new(NULL, get_system_memory(), isa_region, 102 &error_abort); 103 isa_irqs = i8259_init(isa_bus, NULL); 104 isa_bus_register_input_irqs(isa_bus, isa_irqs); 105 106 return isa_bus; 107 } 108 109 /* 110 * Helper functions to emulate RTC clock and DebugOutputPort 111 */ 112 static time_t rtc_ref; 113 114 static uint64_t io_cpu_read(void *opaque, hwaddr addr, unsigned size) 115 { 116 uint64_t val = 0; 117 118 switch (addr) { 119 case 0: /* RTC clock */ 120 val = time(NULL); 121 val += rtc_ref; 122 break; 123 case 8: /* DebugOutputPort */ 124 return 0xe9; /* readback */ 125 } 126 return val; 127 } 128 129 static void io_cpu_write(void *opaque, hwaddr addr, 130 uint64_t val, unsigned size) 131 { 132 unsigned char ch; 133 Chardev *debugout; 134 135 switch (addr) { 136 case 0: /* RTC clock */ 137 rtc_ref = val - time(NULL); 138 break; 139 case 8: /* DebugOutputPort */ 140 ch = val; 141 debugout = serial_hd(0); 142 if (debugout) { 143 qemu_chr_fe_write_all(debugout->be, &ch, 1); 144 } else { 145 fprintf(stderr, "%c", ch); 146 } 147 break; 148 } 149 } 150 151 static const MemoryRegionOps hppa_io_helper_ops = { 152 .read = io_cpu_read, 153 .write = io_cpu_write, 154 .endianness = DEVICE_BIG_ENDIAN, 155 .valid = { 156 .min_access_size = 1, 157 .max_access_size = 8, 158 }, 159 .impl = { 160 .min_access_size = 1, 161 .max_access_size = 8, 162 }, 163 }; 164 165 typedef uint64_t TranslateFn(void *opaque, uint64_t addr); 166 167 static uint64_t linux_kernel_virt_to_phys(void *opaque, uint64_t addr) 168 { 169 addr &= (0x10000000 - 1); 170 return addr; 171 } 172 173 static uint64_t translate_pa10(void *dummy, uint64_t addr) 174 { 175 return (uint32_t)addr; 176 } 177 178 static uint64_t translate_pa20(void *dummy, uint64_t addr) 179 { 180 return hppa_abs_to_phys_pa2_w0(addr); 181 } 182 183 static HPPACPU *cpu[HPPA_MAX_CPUS]; 184 static uint64_t firmware_entry; 185 186 static void fw_cfg_boot_set(void *opaque, const char *boot_device, 187 Error **errp) 188 { 189 fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]); 190 } 191 192 static FWCfgState *create_fw_cfg(MachineState *ms, PCIBus *pci_bus, 193 hwaddr addr) 194 { 195 FWCfgState *fw_cfg; 196 uint64_t val; 197 const char qemu_version[] = QEMU_VERSION; 198 MachineClass *mc = MACHINE_GET_CLASS(ms); 199 int btlb_entries = HPPA_BTLB_ENTRIES(&cpu[0]->env); 200 int len; 201 202 fw_cfg = fw_cfg_init_mem(addr, addr + 4); 203 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, ms->smp.cpus); 204 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, HPPA_MAX_CPUS); 205 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, ms->ram_size); 206 207 val = cpu_to_le64(MIN_SEABIOS_HPPA_VERSION); 208 fw_cfg_add_file(fw_cfg, "/etc/firmware-min-version", 209 g_memdup(&val, sizeof(val)), sizeof(val)); 210 211 val = cpu_to_le64(HPPA_TLB_ENTRIES - btlb_entries); 212 fw_cfg_add_file(fw_cfg, "/etc/cpu/tlb_entries", 213 g_memdup(&val, sizeof(val)), sizeof(val)); 214 215 val = cpu_to_le64(btlb_entries); 216 fw_cfg_add_file(fw_cfg, "/etc/cpu/btlb_entries", 217 g_memdup(&val, sizeof(val)), sizeof(val)); 218 219 len = strlen(mc->name) + 1; 220 fw_cfg_add_file(fw_cfg, "/etc/hppa/machine", 221 g_memdup(mc->name, len), len); 222 223 val = cpu_to_le64(HPA_POWER_BUTTON); 224 fw_cfg_add_file(fw_cfg, "/etc/hppa/power-button-addr", 225 g_memdup(&val, sizeof(val)), sizeof(val)); 226 227 val = cpu_to_le64(CPU_HPA + 16); 228 fw_cfg_add_file(fw_cfg, "/etc/hppa/rtc-addr", 229 g_memdup(&val, sizeof(val)), sizeof(val)); 230 231 val = cpu_to_le64(CPU_HPA + 24); 232 fw_cfg_add_file(fw_cfg, "/etc/hppa/DebugOutputPort", 233 g_memdup(&val, sizeof(val)), sizeof(val)); 234 235 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ms->boot_config.order[0]); 236 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg); 237 238 fw_cfg_add_file(fw_cfg, "/etc/qemu-version", 239 g_memdup(qemu_version, sizeof(qemu_version)), 240 sizeof(qemu_version)); 241 242 fw_cfg_add_extra_pci_roots(pci_bus, fw_cfg); 243 244 return fw_cfg; 245 } 246 247 static LasiState *lasi_init(void) 248 { 249 DeviceState *dev; 250 251 dev = qdev_new(TYPE_LASI_CHIP); 252 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 253 254 return LASI_CHIP(dev); 255 } 256 257 static DinoState *dino_init(MemoryRegion *addr_space) 258 { 259 DeviceState *dev; 260 261 dev = qdev_new(TYPE_DINO_PCI_HOST_BRIDGE); 262 object_property_set_link(OBJECT(dev), "memory-as", OBJECT(addr_space), 263 &error_fatal); 264 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 265 266 return DINO_PCI_HOST_BRIDGE(dev); 267 } 268 269 /* 270 * Step 1: Create CPUs and Memory 271 */ 272 static TranslateFn *machine_HP_common_init_cpus(MachineState *machine) 273 { 274 MemoryRegion *addr_space = get_system_memory(); 275 unsigned int smp_cpus = machine->smp.cpus; 276 TranslateFn *translate; 277 MemoryRegion *cpu_region; 278 279 /* Create CPUs. */ 280 for (unsigned int i = 0; i < smp_cpus; i++) { 281 cpu[i] = HPPA_CPU(cpu_create(machine->cpu_type)); 282 } 283 284 /* 285 * For now, treat address layout as if PSW_W is clear. 286 * TODO: create a proper hppa64 board model and load elf64 firmware. 287 */ 288 if (hppa_is_pa20(&cpu[0]->env)) { 289 translate = translate_pa20; 290 } else { 291 translate = translate_pa10; 292 } 293 294 for (unsigned int i = 0; i < smp_cpus; i++) { 295 g_autofree char *name = g_strdup_printf("cpu%u-io-eir", i); 296 297 cpu_region = g_new(MemoryRegion, 1); 298 memory_region_init_io(cpu_region, OBJECT(cpu[i]), &hppa_io_eir_ops, 299 cpu[i], name, 4); 300 memory_region_add_subregion(addr_space, 301 translate(NULL, CPU_HPA + i * 0x1000), 302 cpu_region); 303 } 304 305 /* RTC and DebugOutputPort on CPU #0 */ 306 cpu_region = g_new(MemoryRegion, 1); 307 memory_region_init_io(cpu_region, OBJECT(cpu[0]), &hppa_io_helper_ops, 308 cpu[0], "cpu0-io-rtc", 2 * sizeof(uint64_t)); 309 memory_region_add_subregion(addr_space, translate(NULL, CPU_HPA + 16), 310 cpu_region); 311 312 /* Main memory region. */ 313 if (machine->ram_size > 3 * GiB) { 314 error_report("RAM size is currently restricted to 3GB"); 315 exit(EXIT_FAILURE); 316 } 317 memory_region_add_subregion_overlap(addr_space, 0, machine->ram, -1); 318 319 return translate; 320 } 321 322 /* 323 * Last creation step: Add SCSI discs, NICs, graphics & load firmware 324 */ 325 static void machine_HP_common_init_tail(MachineState *machine, PCIBus *pci_bus, 326 TranslateFn *translate) 327 { 328 const char *kernel_filename = machine->kernel_filename; 329 const char *kernel_cmdline = machine->kernel_cmdline; 330 const char *initrd_filename = machine->initrd_filename; 331 MachineClass *mc = MACHINE_GET_CLASS(machine); 332 DeviceState *dev; 333 PCIDevice *pci_dev; 334 char *firmware_filename; 335 uint64_t firmware_low, firmware_high; 336 long size; 337 uint64_t kernel_entry = 0, kernel_low, kernel_high; 338 MemoryRegion *addr_space = get_system_memory(); 339 MemoryRegion *rom_region; 340 long i; 341 unsigned int smp_cpus = machine->smp.cpus; 342 SysBusDevice *s; 343 344 /* SCSI disk setup. */ 345 dev = DEVICE(pci_create_simple(pci_bus, -1, "lsi53c895a")); 346 lsi53c8xx_handle_legacy_cmdline(dev); 347 348 /* Graphics setup. */ 349 if (machine->enable_graphics && vga_interface_type != VGA_NONE) { 350 vga_interface_created = true; 351 dev = qdev_new("artist"); 352 s = SYS_BUS_DEVICE(dev); 353 sysbus_realize_and_unref(s, &error_fatal); 354 sysbus_mmio_map(s, 0, translate(NULL, LASI_GFX_HPA)); 355 sysbus_mmio_map(s, 1, translate(NULL, ARTIST_FB_ADDR)); 356 } 357 358 /* Network setup. */ 359 if (enable_lasi_lan()) { 360 lasi_82596_init(addr_space, translate(NULL, LASI_LAN_HPA), 361 qdev_get_gpio_in(lasi_dev, LASI_IRQ_LAN_HPA)); 362 } 363 364 for (i = 0; i < nb_nics; i++) { 365 if (!enable_lasi_lan()) { 366 pci_nic_init_nofail(&nd_table[i], pci_bus, mc->default_nic, NULL); 367 } 368 } 369 370 /* BMC board: HP Powerbar SP2 Diva (with console only) */ 371 pci_dev = pci_new(-1, "pci-serial"); 372 if (!lasi_dev) { 373 /* bind default keyboard/serial to Diva card */ 374 qdev_prop_set_chr(DEVICE(pci_dev), "chardev", serial_hd(0)); 375 } 376 qdev_prop_set_uint8(DEVICE(pci_dev), "prog_if", 0); 377 pci_realize_and_unref(pci_dev, pci_bus, &error_fatal); 378 pci_config_set_vendor_id(pci_dev->config, PCI_VENDOR_ID_HP); 379 pci_config_set_device_id(pci_dev->config, 0x1048); 380 pci_set_word(&pci_dev->config[PCI_SUBSYSTEM_VENDOR_ID], PCI_VENDOR_ID_HP); 381 pci_set_word(&pci_dev->config[PCI_SUBSYSTEM_ID], 0x1227); /* Powerbar */ 382 383 /* create a second serial PCI card when running Astro */ 384 if (!lasi_dev) { 385 pci_dev = pci_new(-1, "pci-serial-4x"); 386 qdev_prop_set_chr(DEVICE(pci_dev), "chardev1", serial_hd(1)); 387 qdev_prop_set_chr(DEVICE(pci_dev), "chardev2", serial_hd(2)); 388 qdev_prop_set_chr(DEVICE(pci_dev), "chardev3", serial_hd(3)); 389 qdev_prop_set_chr(DEVICE(pci_dev), "chardev4", serial_hd(4)); 390 pci_realize_and_unref(pci_dev, pci_bus, &error_fatal); 391 } 392 393 /* create USB OHCI controller for USB keyboard & mouse on Astro machines */ 394 if (!lasi_dev && machine->enable_graphics) { 395 pci_create_simple(pci_bus, -1, "pci-ohci"); 396 usb_create_simple(usb_bus_find(-1), "usb-kbd"); 397 usb_create_simple(usb_bus_find(-1), "usb-mouse"); 398 } 399 400 /* register power switch emulation */ 401 qemu_register_powerdown_notifier(&hppa_system_powerdown_notifier); 402 403 /* fw_cfg configuration interface */ 404 create_fw_cfg(machine, pci_bus, translate(NULL, FW_CFG_IO_BASE)); 405 406 /* Load firmware. Given that this is not "real" firmware, 407 but one explicitly written for the emulation, we might as 408 well load it directly from an ELF image. */ 409 firmware_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, 410 machine->firmware ?: "hppa-firmware.img"); 411 if (firmware_filename == NULL) { 412 error_report("no firmware provided"); 413 exit(1); 414 } 415 416 size = load_elf(firmware_filename, NULL, translate, NULL, 417 &firmware_entry, &firmware_low, &firmware_high, NULL, 418 true, EM_PARISC, 0, 0); 419 420 if (size < 0) { 421 error_report("could not load firmware '%s'", firmware_filename); 422 exit(1); 423 } 424 qemu_log_mask(CPU_LOG_PAGE, "Firmware loaded at 0x%08" PRIx64 425 "-0x%08" PRIx64 ", entry at 0x%08" PRIx64 ".\n", 426 firmware_low, firmware_high, firmware_entry); 427 if (firmware_low < translate(NULL, FIRMWARE_START) || 428 firmware_high >= translate(NULL, FIRMWARE_END)) { 429 error_report("Firmware overlaps with memory or IO space"); 430 exit(1); 431 } 432 g_free(firmware_filename); 433 434 rom_region = g_new(MemoryRegion, 1); 435 memory_region_init_ram(rom_region, NULL, "firmware", 436 (FIRMWARE_END - FIRMWARE_START), &error_fatal); 437 memory_region_add_subregion(addr_space, 438 translate(NULL, FIRMWARE_START), rom_region); 439 440 /* Load kernel */ 441 if (kernel_filename) { 442 size = load_elf(kernel_filename, NULL, linux_kernel_virt_to_phys, 443 NULL, &kernel_entry, &kernel_low, &kernel_high, NULL, 444 true, EM_PARISC, 0, 0); 445 446 kernel_entry = linux_kernel_virt_to_phys(NULL, kernel_entry); 447 448 if (size < 0) { 449 error_report("could not load kernel '%s'", kernel_filename); 450 exit(1); 451 } 452 qemu_log_mask(CPU_LOG_PAGE, "Kernel loaded at 0x%08" PRIx64 453 "-0x%08" PRIx64 ", entry at 0x%08" PRIx64 454 ", size %" PRIu64 " kB\n", 455 kernel_low, kernel_high, kernel_entry, size / KiB); 456 457 if (kernel_cmdline) { 458 cpu[0]->env.gr[24] = 0x4000; 459 pstrcpy_targphys("cmdline", cpu[0]->env.gr[24], 460 TARGET_PAGE_SIZE, kernel_cmdline); 461 } 462 463 if (initrd_filename) { 464 ram_addr_t initrd_base; 465 int64_t initrd_size; 466 467 initrd_size = get_image_size(initrd_filename); 468 if (initrd_size < 0) { 469 error_report("could not load initial ram disk '%s'", 470 initrd_filename); 471 exit(1); 472 } 473 474 /* Load the initrd image high in memory. 475 Mirror the algorithm used by palo: 476 (1) Due to sign-extension problems and PDC, 477 put the initrd no higher than 1G. 478 (2) Reserve 64k for stack. */ 479 initrd_base = MIN(machine->ram_size, 1 * GiB); 480 initrd_base = initrd_base - 64 * KiB; 481 initrd_base = (initrd_base - initrd_size) & TARGET_PAGE_MASK; 482 483 if (initrd_base < kernel_high) { 484 error_report("kernel and initial ram disk too large!"); 485 exit(1); 486 } 487 488 load_image_targphys(initrd_filename, initrd_base, initrd_size); 489 cpu[0]->env.gr[23] = initrd_base; 490 cpu[0]->env.gr[22] = initrd_base + initrd_size; 491 } 492 } 493 494 if (!kernel_entry) { 495 /* When booting via firmware, tell firmware if we want interactive 496 * mode (kernel_entry=1), and to boot from CD (gr[24]='d') 497 * or hard disc * (gr[24]='c'). 498 */ 499 kernel_entry = machine->boot_config.has_menu ? machine->boot_config.menu : 0; 500 cpu[0]->env.gr[24] = machine->boot_config.order[0]; 501 } 502 503 /* We jump to the firmware entry routine and pass the 504 * various parameters in registers. After firmware initialization, 505 * firmware will start the Linux kernel with ramdisk and cmdline. 506 */ 507 cpu[0]->env.gr[26] = machine->ram_size; 508 cpu[0]->env.gr[25] = kernel_entry; 509 510 /* tell firmware how many SMP CPUs to present in inventory table */ 511 cpu[0]->env.gr[21] = smp_cpus; 512 513 /* tell firmware fw_cfg port */ 514 cpu[0]->env.gr[19] = FW_CFG_IO_BASE; 515 } 516 517 /* 518 * Create HP B160L workstation 519 */ 520 static void machine_HP_B160L_init(MachineState *machine) 521 { 522 DeviceState *dev, *dino_dev; 523 MemoryRegion *addr_space = get_system_memory(); 524 TranslateFn *translate; 525 ISABus *isa_bus; 526 PCIBus *pci_bus; 527 528 /* Create CPUs and RAM. */ 529 translate = machine_HP_common_init_cpus(machine); 530 531 if (hppa_is_pa20(&cpu[0]->env)) { 532 error_report("The HP B160L workstation requires a 32-bit " 533 "CPU. Use '-machine C3700' instead."); 534 exit(1); 535 } 536 537 /* Init Lasi chip */ 538 lasi_dev = DEVICE(lasi_init()); 539 memory_region_add_subregion(addr_space, translate(NULL, LASI_HPA), 540 sysbus_mmio_get_region( 541 SYS_BUS_DEVICE(lasi_dev), 0)); 542 543 /* Init Dino (PCI host bus chip). */ 544 dino_dev = DEVICE(dino_init(addr_space)); 545 memory_region_add_subregion(addr_space, translate(NULL, DINO_HPA), 546 sysbus_mmio_get_region( 547 SYS_BUS_DEVICE(dino_dev), 0)); 548 pci_bus = PCI_BUS(qdev_get_child_bus(dino_dev, "pci")); 549 assert(pci_bus); 550 551 /* Create ISA bus, needed for PS/2 kbd/mouse port emulation */ 552 isa_bus = hppa_isa_bus(translate(NULL, IDE_HPA)); 553 assert(isa_bus); 554 555 /* Serial ports: Lasi and Dino use a 7.272727 MHz clock. */ 556 serial_mm_init(addr_space, translate(NULL, LASI_UART_HPA + 0x800), 0, 557 qdev_get_gpio_in(lasi_dev, LASI_IRQ_UART_HPA), 7272727 / 16, 558 serial_hd(0), DEVICE_BIG_ENDIAN); 559 560 serial_mm_init(addr_space, translate(NULL, DINO_UART_HPA + 0x800), 0, 561 qdev_get_gpio_in(dino_dev, DINO_IRQ_RS232INT), 7272727 / 16, 562 serial_hd(1), DEVICE_BIG_ENDIAN); 563 564 /* Parallel port */ 565 parallel_mm_init(addr_space, translate(NULL, LASI_LPT_HPA + 0x800), 0, 566 qdev_get_gpio_in(lasi_dev, LASI_IRQ_LAN_HPA), 567 parallel_hds[0]); 568 569 /* PS/2 Keyboard/Mouse */ 570 dev = qdev_new(TYPE_LASIPS2); 571 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 572 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, 573 qdev_get_gpio_in(lasi_dev, LASI_IRQ_PS2KBD_HPA)); 574 memory_region_add_subregion(addr_space, 575 translate(NULL, LASI_PS2KBD_HPA), 576 sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 577 0)); 578 memory_region_add_subregion(addr_space, 579 translate(NULL, LASI_PS2KBD_HPA + 0x100), 580 sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 581 1)); 582 583 /* Add SCSI discs, NICs, graphics & load firmware */ 584 machine_HP_common_init_tail(machine, pci_bus, translate); 585 } 586 587 static AstroState *astro_init(void) 588 { 589 DeviceState *dev; 590 591 dev = qdev_new(TYPE_ASTRO_CHIP); 592 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 593 594 return ASTRO_CHIP(dev); 595 } 596 597 /* 598 * Create HP C3700 workstation 599 */ 600 static void machine_HP_C3700_init(MachineState *machine) 601 { 602 PCIBus *pci_bus; 603 AstroState *astro; 604 DeviceState *astro_dev; 605 MemoryRegion *addr_space = get_system_memory(); 606 TranslateFn *translate; 607 608 /* Create CPUs and RAM. */ 609 translate = machine_HP_common_init_cpus(machine); 610 611 if (!hppa_is_pa20(&cpu[0]->env)) { 612 error_report("The HP C3000 workstation requires a 64-bit CPU. " 613 "Use '-machine B160L' instead."); 614 exit(1); 615 } 616 617 /* Init Astro and the Elroys (PCI host bus chips). */ 618 astro = astro_init(); 619 astro_dev = DEVICE(astro); 620 memory_region_add_subregion(addr_space, translate(NULL, ASTRO_HPA), 621 sysbus_mmio_get_region( 622 SYS_BUS_DEVICE(astro_dev), 0)); 623 pci_bus = PCI_BUS(qdev_get_child_bus(DEVICE(astro->elroy[0]), "pci")); 624 assert(pci_bus); 625 626 /* Add SCSI discs, NICs, graphics & load firmware */ 627 machine_HP_common_init_tail(machine, pci_bus, translate); 628 } 629 630 static void hppa_machine_reset(MachineState *ms, ShutdownCause reason) 631 { 632 unsigned int smp_cpus = ms->smp.cpus; 633 int i; 634 635 qemu_devices_reset(reason); 636 637 /* Start all CPUs at the firmware entry point. 638 * Monarch CPU will initialize firmware, secondary CPUs 639 * will enter a small idle loop and wait for rendevouz. */ 640 for (i = 0; i < smp_cpus; i++) { 641 CPUState *cs = CPU(cpu[i]); 642 643 cpu_set_pc(cs, firmware_entry); 644 cpu[i]->env.psw = PSW_Q; 645 cpu[i]->env.gr[5] = CPU_HPA + i * 0x1000; 646 647 cs->exception_index = -1; 648 cs->halted = 0; 649 } 650 651 /* already initialized by machine_hppa_init()? */ 652 if (cpu[0]->env.gr[26] == ms->ram_size) { 653 return; 654 } 655 656 cpu[0]->env.gr[26] = ms->ram_size; 657 cpu[0]->env.gr[25] = 0; /* no firmware boot menu */ 658 cpu[0]->env.gr[24] = 'c'; 659 /* gr22/gr23 unused, no initrd while reboot. */ 660 cpu[0]->env.gr[21] = smp_cpus; 661 /* tell firmware fw_cfg port */ 662 cpu[0]->env.gr[19] = FW_CFG_IO_BASE; 663 } 664 665 static void hppa_nmi(NMIState *n, int cpu_index, Error **errp) 666 { 667 CPUState *cs; 668 669 CPU_FOREACH(cs) { 670 cpu_interrupt(cs, CPU_INTERRUPT_NMI); 671 } 672 } 673 674 static const char *HP_B160L_machine_valid_cpu_types[] = { 675 TYPE_HPPA_CPU, 676 NULL 677 }; 678 679 static void HP_B160L_machine_init_class_init(ObjectClass *oc, void *data) 680 { 681 MachineClass *mc = MACHINE_CLASS(oc); 682 NMIClass *nc = NMI_CLASS(oc); 683 684 mc->desc = "HP B160L workstation"; 685 mc->default_cpu_type = TYPE_HPPA_CPU; 686 mc->valid_cpu_types = HP_B160L_machine_valid_cpu_types; 687 mc->init = machine_HP_B160L_init; 688 mc->reset = hppa_machine_reset; 689 mc->block_default_type = IF_SCSI; 690 mc->max_cpus = HPPA_MAX_CPUS; 691 mc->default_cpus = 1; 692 mc->is_default = true; 693 mc->default_ram_size = 512 * MiB; 694 mc->default_boot_order = "cd"; 695 mc->default_ram_id = "ram"; 696 mc->default_nic = "tulip"; 697 698 nc->nmi_monitor_handler = hppa_nmi; 699 } 700 701 static const TypeInfo HP_B160L_machine_init_typeinfo = { 702 .name = MACHINE_TYPE_NAME("B160L"), 703 .parent = TYPE_MACHINE, 704 .class_init = HP_B160L_machine_init_class_init, 705 .interfaces = (InterfaceInfo[]) { 706 { TYPE_NMI }, 707 { } 708 }, 709 }; 710 711 static const char *HP_C3700_machine_valid_cpu_types[] = { 712 TYPE_HPPA64_CPU, 713 NULL 714 }; 715 716 static void HP_C3700_machine_init_class_init(ObjectClass *oc, void *data) 717 { 718 MachineClass *mc = MACHINE_CLASS(oc); 719 NMIClass *nc = NMI_CLASS(oc); 720 721 mc->desc = "HP C3700 workstation"; 722 mc->default_cpu_type = TYPE_HPPA64_CPU; 723 mc->valid_cpu_types = HP_C3700_machine_valid_cpu_types; 724 mc->init = machine_HP_C3700_init; 725 mc->reset = hppa_machine_reset; 726 mc->block_default_type = IF_SCSI; 727 mc->max_cpus = HPPA_MAX_CPUS; 728 mc->default_cpus = 1; 729 mc->is_default = false; 730 mc->default_ram_size = 1024 * MiB; 731 mc->default_boot_order = "cd"; 732 mc->default_ram_id = "ram"; 733 mc->default_nic = "tulip"; 734 735 nc->nmi_monitor_handler = hppa_nmi; 736 } 737 738 static const TypeInfo HP_C3700_machine_init_typeinfo = { 739 .name = MACHINE_TYPE_NAME("C3700"), 740 .parent = TYPE_MACHINE, 741 .class_init = HP_C3700_machine_init_class_init, 742 .interfaces = (InterfaceInfo[]) { 743 { TYPE_NMI }, 744 { } 745 }, 746 }; 747 748 static void hppa_machine_init_register_types(void) 749 { 750 type_register_static(&HP_B160L_machine_init_typeinfo); 751 type_register_static(&HP_C3700_machine_init_typeinfo); 752 } 753 754 type_init(hppa_machine_init_register_types) 755