1 /* 2 * QEMU HPPA hardware system emulator. 3 * Copyright 2018 Helge Deller <deller@gmx.de> 4 */ 5 6 #include "qemu/osdep.h" 7 #include "qemu/datadir.h" 8 #include "cpu.h" 9 #include "elf.h" 10 #include "hw/loader.h" 11 #include "qemu/error-report.h" 12 #include "sysemu/reset.h" 13 #include "sysemu/sysemu.h" 14 #include "sysemu/runstate.h" 15 #include "hw/rtc/mc146818rtc.h" 16 #include "hw/timer/i8254.h" 17 #include "hw/char/serial.h" 18 #include "hw/char/parallel.h" 19 #include "hw/intc/i8259.h" 20 #include "hw/input/lasips2.h" 21 #include "hw/net/lasi_82596.h" 22 #include "hw/nmi.h" 23 #include "hw/pci/pci.h" 24 #include "hw/pci-host/dino.h" 25 #include "hw/misc/lasi.h" 26 #include "hppa_hardware.h" 27 #include "qemu/units.h" 28 #include "qapi/error.h" 29 #include "net/net.h" 30 #include "qemu/log.h" 31 32 #define MIN_SEABIOS_HPPA_VERSION 6 /* require at least this fw version */ 33 34 #define HPA_POWER_BUTTON (FIRMWARE_END - 0x10) 35 36 #define enable_lasi_lan() 0 37 38 39 static void hppa_powerdown_req(Notifier *n, void *opaque) 40 { 41 hwaddr soft_power_reg = HPA_POWER_BUTTON; 42 uint32_t val; 43 44 val = ldl_be_phys(&address_space_memory, soft_power_reg); 45 if ((val >> 8) == 0) { 46 /* immediately shut down when under hardware control */ 47 qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); 48 return; 49 } 50 51 /* clear bit 31 to indicate that the power switch was pressed. */ 52 val &= ~1; 53 stl_be_phys(&address_space_memory, soft_power_reg, val); 54 } 55 56 static Notifier hppa_system_powerdown_notifier = { 57 .notify = hppa_powerdown_req 58 }; 59 60 /* Fallback for unassigned PCI I/O operations. Avoids MCHK. */ 61 static uint64_t ignore_read(void *opaque, hwaddr addr, unsigned size) 62 { 63 return 0; 64 } 65 66 static void ignore_write(void *opaque, hwaddr addr, uint64_t v, unsigned size) 67 { 68 } 69 70 static const MemoryRegionOps hppa_pci_ignore_ops = { 71 .read = ignore_read, 72 .write = ignore_write, 73 .endianness = DEVICE_BIG_ENDIAN, 74 .valid = { 75 .min_access_size = 1, 76 .max_access_size = 8, 77 }, 78 .impl = { 79 .min_access_size = 1, 80 .max_access_size = 8, 81 }, 82 }; 83 84 static ISABus *hppa_isa_bus(void) 85 { 86 ISABus *isa_bus; 87 qemu_irq *isa_irqs; 88 MemoryRegion *isa_region; 89 90 isa_region = g_new(MemoryRegion, 1); 91 memory_region_init_io(isa_region, NULL, &hppa_pci_ignore_ops, 92 NULL, "isa-io", 0x800); 93 memory_region_add_subregion(get_system_memory(), IDE_HPA, 94 isa_region); 95 96 isa_bus = isa_bus_new(NULL, get_system_memory(), isa_region, 97 &error_abort); 98 isa_irqs = i8259_init(isa_bus, 99 /* qemu_allocate_irq(dino_set_isa_irq, s, 0)); */ 100 NULL); 101 isa_bus_register_input_irqs(isa_bus, isa_irqs); 102 103 return isa_bus; 104 } 105 106 static uint64_t cpu_hppa_to_phys(void *opaque, uint64_t addr) 107 { 108 addr &= (0x10000000 - 1); 109 return addr; 110 } 111 112 static HPPACPU *cpu[HPPA_MAX_CPUS]; 113 static uint64_t firmware_entry; 114 115 static void fw_cfg_boot_set(void *opaque, const char *boot_device, 116 Error **errp) 117 { 118 fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]); 119 } 120 121 static FWCfgState *create_fw_cfg(MachineState *ms) 122 { 123 FWCfgState *fw_cfg; 124 uint64_t val; 125 const char qemu_version[] = QEMU_VERSION; 126 127 fw_cfg = fw_cfg_init_mem(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4); 128 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, ms->smp.cpus); 129 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, HPPA_MAX_CPUS); 130 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, ms->ram_size); 131 132 val = cpu_to_le64(MIN_SEABIOS_HPPA_VERSION); 133 fw_cfg_add_file(fw_cfg, "/etc/firmware-min-version", 134 g_memdup(&val, sizeof(val)), sizeof(val)); 135 136 val = cpu_to_le64(HPPA_TLB_ENTRIES); 137 fw_cfg_add_file(fw_cfg, "/etc/cpu/tlb_entries", 138 g_memdup(&val, sizeof(val)), sizeof(val)); 139 140 val = cpu_to_le64(HPPA_BTLB_ENTRIES); 141 fw_cfg_add_file(fw_cfg, "/etc/cpu/btlb_entries", 142 g_memdup(&val, sizeof(val)), sizeof(val)); 143 144 val = cpu_to_le64(HPA_POWER_BUTTON); 145 fw_cfg_add_file(fw_cfg, "/etc/power-button-addr", 146 g_memdup(&val, sizeof(val)), sizeof(val)); 147 148 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ms->boot_config.order[0]); 149 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg); 150 151 fw_cfg_add_file(fw_cfg, "/etc/qemu-version", 152 g_memdup(qemu_version, sizeof(qemu_version)), 153 sizeof(qemu_version)); 154 155 return fw_cfg; 156 } 157 158 static LasiState *lasi_init(void) 159 { 160 DeviceState *dev; 161 162 dev = qdev_new(TYPE_LASI_CHIP); 163 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 164 165 return LASI_CHIP(dev); 166 } 167 168 static DinoState *dino_init(MemoryRegion *addr_space) 169 { 170 DeviceState *dev; 171 172 dev = qdev_new(TYPE_DINO_PCI_HOST_BRIDGE); 173 object_property_set_link(OBJECT(dev), "memory-as", OBJECT(addr_space), 174 &error_fatal); 175 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 176 177 return DINO_PCI_HOST_BRIDGE(dev); 178 } 179 180 static void machine_hppa_init(MachineState *machine) 181 { 182 const char *kernel_filename = machine->kernel_filename; 183 const char *kernel_cmdline = machine->kernel_cmdline; 184 const char *initrd_filename = machine->initrd_filename; 185 MachineClass *mc = MACHINE_GET_CLASS(machine); 186 DeviceState *dev, *dino_dev, *lasi_dev; 187 PCIBus *pci_bus; 188 ISABus *isa_bus; 189 char *firmware_filename; 190 uint64_t firmware_low, firmware_high; 191 long size; 192 uint64_t kernel_entry = 0, kernel_low, kernel_high; 193 MemoryRegion *addr_space = get_system_memory(); 194 MemoryRegion *rom_region; 195 MemoryRegion *cpu_region; 196 long i; 197 unsigned int smp_cpus = machine->smp.cpus; 198 SysBusDevice *s; 199 200 /* Create CPUs. */ 201 for (i = 0; i < smp_cpus; i++) { 202 char *name = g_strdup_printf("cpu%ld-io-eir", i); 203 cpu[i] = HPPA_CPU(cpu_create(machine->cpu_type)); 204 205 cpu_region = g_new(MemoryRegion, 1); 206 memory_region_init_io(cpu_region, OBJECT(cpu[i]), &hppa_io_eir_ops, 207 cpu[i], name, 4); 208 memory_region_add_subregion(addr_space, CPU_HPA + i * 0x1000, 209 cpu_region); 210 g_free(name); 211 } 212 213 /* Main memory region. */ 214 if (machine->ram_size > 3 * GiB) { 215 error_report("RAM size is currently restricted to 3GB"); 216 exit(EXIT_FAILURE); 217 } 218 memory_region_add_subregion_overlap(addr_space, 0, machine->ram, -1); 219 220 221 /* Init Lasi chip */ 222 lasi_dev = DEVICE(lasi_init()); 223 memory_region_add_subregion(addr_space, LASI_HPA, 224 sysbus_mmio_get_region( 225 SYS_BUS_DEVICE(lasi_dev), 0)); 226 227 /* Init Dino (PCI host bus chip). */ 228 dino_dev = DEVICE(dino_init(addr_space)); 229 memory_region_add_subregion(addr_space, DINO_HPA, 230 sysbus_mmio_get_region( 231 SYS_BUS_DEVICE(dino_dev), 0)); 232 pci_bus = PCI_BUS(qdev_get_child_bus(dino_dev, "pci")); 233 assert(pci_bus); 234 235 /* Create ISA bus. */ 236 isa_bus = hppa_isa_bus(); 237 assert(isa_bus); 238 239 /* Realtime clock, used by firmware for PDC_TOD call. */ 240 mc146818_rtc_init(isa_bus, 2000, NULL); 241 242 /* Serial ports: Lasi and Dino use a 7.272727 MHz clock. */ 243 serial_mm_init(addr_space, LASI_UART_HPA + 0x800, 0, 244 qdev_get_gpio_in(lasi_dev, LASI_IRQ_UART_HPA), 7272727 / 16, 245 serial_hd(0), DEVICE_BIG_ENDIAN); 246 247 serial_mm_init(addr_space, DINO_UART_HPA + 0x800, 0, 248 qdev_get_gpio_in(dino_dev, DINO_IRQ_RS232INT), 7272727 / 16, 249 serial_hd(1), DEVICE_BIG_ENDIAN); 250 251 /* Parallel port */ 252 parallel_mm_init(addr_space, LASI_LPT_HPA + 0x800, 0, 253 qdev_get_gpio_in(lasi_dev, LASI_IRQ_LAN_HPA), 254 parallel_hds[0]); 255 256 /* fw_cfg configuration interface */ 257 create_fw_cfg(machine); 258 259 /* SCSI disk setup. */ 260 dev = DEVICE(pci_create_simple(pci_bus, -1, "lsi53c895a")); 261 lsi53c8xx_handle_legacy_cmdline(dev); 262 263 /* Graphics setup. */ 264 if (machine->enable_graphics && vga_interface_type != VGA_NONE) { 265 vga_interface_created = true; 266 dev = qdev_new("artist"); 267 s = SYS_BUS_DEVICE(dev); 268 sysbus_realize_and_unref(s, &error_fatal); 269 sysbus_mmio_map(s, 0, LASI_GFX_HPA); 270 sysbus_mmio_map(s, 1, ARTIST_FB_ADDR); 271 } 272 273 /* Network setup. */ 274 if (enable_lasi_lan()) { 275 lasi_82596_init(addr_space, LASI_LAN_HPA, 276 qdev_get_gpio_in(lasi_dev, LASI_IRQ_LAN_HPA)); 277 } 278 279 for (i = 0; i < nb_nics; i++) { 280 if (!enable_lasi_lan()) { 281 pci_nic_init_nofail(&nd_table[i], pci_bus, mc->default_nic, NULL); 282 } 283 } 284 285 /* PS/2 Keyboard/Mouse */ 286 dev = qdev_new(TYPE_LASIPS2); 287 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 288 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, 289 qdev_get_gpio_in(lasi_dev, LASI_IRQ_PS2KBD_HPA)); 290 memory_region_add_subregion(addr_space, LASI_PS2KBD_HPA, 291 sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 292 0)); 293 memory_region_add_subregion(addr_space, LASI_PS2KBD_HPA + 0x100, 294 sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 295 1)); 296 297 /* register power switch emulation */ 298 qemu_register_powerdown_notifier(&hppa_system_powerdown_notifier); 299 300 /* Load firmware. Given that this is not "real" firmware, 301 but one explicitly written for the emulation, we might as 302 well load it directly from an ELF image. */ 303 firmware_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, 304 machine->firmware ?: "hppa-firmware.img"); 305 if (firmware_filename == NULL) { 306 error_report("no firmware provided"); 307 exit(1); 308 } 309 310 size = load_elf(firmware_filename, NULL, NULL, NULL, 311 &firmware_entry, &firmware_low, &firmware_high, NULL, 312 true, EM_PARISC, 0, 0); 313 314 /* Unfortunately, load_elf sign-extends reading elf32. */ 315 firmware_entry = (target_ureg)firmware_entry; 316 firmware_low = (target_ureg)firmware_low; 317 firmware_high = (target_ureg)firmware_high; 318 319 if (size < 0) { 320 error_report("could not load firmware '%s'", firmware_filename); 321 exit(1); 322 } 323 qemu_log_mask(CPU_LOG_PAGE, "Firmware loaded at 0x%08" PRIx64 324 "-0x%08" PRIx64 ", entry at 0x%08" PRIx64 ".\n", 325 firmware_low, firmware_high, firmware_entry); 326 if (firmware_low < FIRMWARE_START || firmware_high >= FIRMWARE_END) { 327 error_report("Firmware overlaps with memory or IO space"); 328 exit(1); 329 } 330 g_free(firmware_filename); 331 332 rom_region = g_new(MemoryRegion, 1); 333 memory_region_init_ram(rom_region, NULL, "firmware", 334 (FIRMWARE_END - FIRMWARE_START), &error_fatal); 335 memory_region_add_subregion(addr_space, FIRMWARE_START, rom_region); 336 337 /* Load kernel */ 338 if (kernel_filename) { 339 size = load_elf(kernel_filename, NULL, &cpu_hppa_to_phys, 340 NULL, &kernel_entry, &kernel_low, &kernel_high, NULL, 341 true, EM_PARISC, 0, 0); 342 343 /* Unfortunately, load_elf sign-extends reading elf32. */ 344 kernel_entry = (target_ureg) cpu_hppa_to_phys(NULL, kernel_entry); 345 kernel_low = (target_ureg)kernel_low; 346 kernel_high = (target_ureg)kernel_high; 347 348 if (size < 0) { 349 error_report("could not load kernel '%s'", kernel_filename); 350 exit(1); 351 } 352 qemu_log_mask(CPU_LOG_PAGE, "Kernel loaded at 0x%08" PRIx64 353 "-0x%08" PRIx64 ", entry at 0x%08" PRIx64 354 ", size %" PRIu64 " kB\n", 355 kernel_low, kernel_high, kernel_entry, size / KiB); 356 357 if (kernel_cmdline) { 358 cpu[0]->env.gr[24] = 0x4000; 359 pstrcpy_targphys("cmdline", cpu[0]->env.gr[24], 360 TARGET_PAGE_SIZE, kernel_cmdline); 361 } 362 363 if (initrd_filename) { 364 ram_addr_t initrd_base; 365 int64_t initrd_size; 366 367 initrd_size = get_image_size(initrd_filename); 368 if (initrd_size < 0) { 369 error_report("could not load initial ram disk '%s'", 370 initrd_filename); 371 exit(1); 372 } 373 374 /* Load the initrd image high in memory. 375 Mirror the algorithm used by palo: 376 (1) Due to sign-extension problems and PDC, 377 put the initrd no higher than 1G. 378 (2) Reserve 64k for stack. */ 379 initrd_base = MIN(machine->ram_size, 1 * GiB); 380 initrd_base = initrd_base - 64 * KiB; 381 initrd_base = (initrd_base - initrd_size) & TARGET_PAGE_MASK; 382 383 if (initrd_base < kernel_high) { 384 error_report("kernel and initial ram disk too large!"); 385 exit(1); 386 } 387 388 load_image_targphys(initrd_filename, initrd_base, initrd_size); 389 cpu[0]->env.gr[23] = initrd_base; 390 cpu[0]->env.gr[22] = initrd_base + initrd_size; 391 } 392 } 393 394 if (!kernel_entry) { 395 /* When booting via firmware, tell firmware if we want interactive 396 * mode (kernel_entry=1), and to boot from CD (gr[24]='d') 397 * or hard disc * (gr[24]='c'). 398 */ 399 kernel_entry = machine->boot_config.has_menu ? machine->boot_config.menu : 0; 400 cpu[0]->env.gr[24] = machine->boot_config.order[0]; 401 } 402 403 /* We jump to the firmware entry routine and pass the 404 * various parameters in registers. After firmware initialization, 405 * firmware will start the Linux kernel with ramdisk and cmdline. 406 */ 407 cpu[0]->env.gr[26] = machine->ram_size; 408 cpu[0]->env.gr[25] = kernel_entry; 409 410 /* tell firmware how many SMP CPUs to present in inventory table */ 411 cpu[0]->env.gr[21] = smp_cpus; 412 413 /* tell firmware fw_cfg port */ 414 cpu[0]->env.gr[19] = FW_CFG_IO_BASE; 415 } 416 417 static void hppa_machine_reset(MachineState *ms, ShutdownCause reason) 418 { 419 unsigned int smp_cpus = ms->smp.cpus; 420 int i; 421 422 qemu_devices_reset(reason); 423 424 /* Start all CPUs at the firmware entry point. 425 * Monarch CPU will initialize firmware, secondary CPUs 426 * will enter a small idle loop and wait for rendevouz. */ 427 for (i = 0; i < smp_cpus; i++) { 428 CPUState *cs = CPU(cpu[i]); 429 430 cpu_set_pc(cs, firmware_entry); 431 cpu[i]->env.psw = PSW_Q; 432 cpu[i]->env.gr[5] = CPU_HPA + i * 0x1000; 433 434 cs->exception_index = -1; 435 cs->halted = 0; 436 } 437 438 /* already initialized by machine_hppa_init()? */ 439 if (cpu[0]->env.gr[26] == ms->ram_size) { 440 return; 441 } 442 443 cpu[0]->env.gr[26] = ms->ram_size; 444 cpu[0]->env.gr[25] = 0; /* no firmware boot menu */ 445 cpu[0]->env.gr[24] = 'c'; 446 /* gr22/gr23 unused, no initrd while reboot. */ 447 cpu[0]->env.gr[21] = smp_cpus; 448 /* tell firmware fw_cfg port */ 449 cpu[0]->env.gr[19] = FW_CFG_IO_BASE; 450 } 451 452 static void hppa_nmi(NMIState *n, int cpu_index, Error **errp) 453 { 454 CPUState *cs; 455 456 CPU_FOREACH(cs) { 457 cpu_interrupt(cs, CPU_INTERRUPT_NMI); 458 } 459 } 460 461 static void hppa_machine_init_class_init(ObjectClass *oc, void *data) 462 { 463 MachineClass *mc = MACHINE_CLASS(oc); 464 NMIClass *nc = NMI_CLASS(oc); 465 466 mc->desc = "HPPA B160L machine"; 467 mc->default_cpu_type = TYPE_HPPA_CPU; 468 mc->init = machine_hppa_init; 469 mc->reset = hppa_machine_reset; 470 mc->block_default_type = IF_SCSI; 471 mc->max_cpus = HPPA_MAX_CPUS; 472 mc->default_cpus = 1; 473 mc->is_default = true; 474 mc->default_ram_size = 512 * MiB; 475 mc->default_boot_order = "cd"; 476 mc->default_ram_id = "ram"; 477 mc->default_nic = "tulip"; 478 479 nc->nmi_monitor_handler = hppa_nmi; 480 } 481 482 static const TypeInfo hppa_machine_init_typeinfo = { 483 .name = MACHINE_TYPE_NAME("hppa"), 484 .parent = TYPE_MACHINE, 485 .class_init = hppa_machine_init_class_init, 486 .interfaces = (InterfaceInfo[]) { 487 { TYPE_NMI }, 488 { } 489 }, 490 }; 491 492 static void hppa_machine_init_register_types(void) 493 { 494 type_register_static(&hppa_machine_init_typeinfo); 495 } 496 497 type_init(hppa_machine_init_register_types) 498