1 /* 2 * QEMU HPPA hardware system emulator. 3 * Copyright 2018 Helge Deller <deller@gmx.de> 4 */ 5 6 #include "qemu/osdep.h" 7 #include "qemu/datadir.h" 8 #include "cpu.h" 9 #include "elf.h" 10 #include "hw/loader.h" 11 #include "qemu/error-report.h" 12 #include "sysemu/reset.h" 13 #include "sysemu/sysemu.h" 14 #include "sysemu/runstate.h" 15 #include "hw/rtc/mc146818rtc.h" 16 #include "hw/timer/i8254.h" 17 #include "hw/char/serial.h" 18 #include "hw/char/parallel.h" 19 #include "hw/intc/i8259.h" 20 #include "hw/input/lasips2.h" 21 #include "hw/net/lasi_82596.h" 22 #include "hw/nmi.h" 23 #include "hw/pci/pci.h" 24 #include "hw/pci-host/dino.h" 25 #include "hw/misc/lasi.h" 26 #include "hppa_hardware.h" 27 #include "qemu/units.h" 28 #include "qapi/error.h" 29 #include "net/net.h" 30 #include "qemu/log.h" 31 #include "net/net.h" 32 33 #define MAX_IDE_BUS 2 34 35 #define MIN_SEABIOS_HPPA_VERSION 6 /* require at least this fw version */ 36 37 #define HPA_POWER_BUTTON (FIRMWARE_END - 0x10) 38 39 #define enable_lasi_lan() 0 40 41 42 static void hppa_powerdown_req(Notifier *n, void *opaque) 43 { 44 hwaddr soft_power_reg = HPA_POWER_BUTTON; 45 uint32_t val; 46 47 val = ldl_be_phys(&address_space_memory, soft_power_reg); 48 if ((val >> 8) == 0) { 49 /* immediately shut down when under hardware control */ 50 qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); 51 return; 52 } 53 54 /* clear bit 31 to indicate that the power switch was pressed. */ 55 val &= ~1; 56 stl_be_phys(&address_space_memory, soft_power_reg, val); 57 } 58 59 static Notifier hppa_system_powerdown_notifier = { 60 .notify = hppa_powerdown_req 61 }; 62 63 /* Fallback for unassigned PCI I/O operations. Avoids MCHK. */ 64 static uint64_t ignore_read(void *opaque, hwaddr addr, unsigned size) 65 { 66 return 0; 67 } 68 69 static void ignore_write(void *opaque, hwaddr addr, uint64_t v, unsigned size) 70 { 71 } 72 73 static const MemoryRegionOps hppa_pci_ignore_ops = { 74 .read = ignore_read, 75 .write = ignore_write, 76 .endianness = DEVICE_BIG_ENDIAN, 77 .valid = { 78 .min_access_size = 1, 79 .max_access_size = 8, 80 }, 81 .impl = { 82 .min_access_size = 1, 83 .max_access_size = 8, 84 }, 85 }; 86 87 static ISABus *hppa_isa_bus(void) 88 { 89 ISABus *isa_bus; 90 qemu_irq *isa_irqs; 91 MemoryRegion *isa_region; 92 93 isa_region = g_new(MemoryRegion, 1); 94 memory_region_init_io(isa_region, NULL, &hppa_pci_ignore_ops, 95 NULL, "isa-io", 0x800); 96 memory_region_add_subregion(get_system_memory(), IDE_HPA, 97 isa_region); 98 99 isa_bus = isa_bus_new(NULL, get_system_memory(), isa_region, 100 &error_abort); 101 isa_irqs = i8259_init(isa_bus, 102 /* qemu_allocate_irq(dino_set_isa_irq, s, 0)); */ 103 NULL); 104 isa_bus_irqs(isa_bus, isa_irqs); 105 106 return isa_bus; 107 } 108 109 static uint64_t cpu_hppa_to_phys(void *opaque, uint64_t addr) 110 { 111 addr &= (0x10000000 - 1); 112 return addr; 113 } 114 115 static HPPACPU *cpu[HPPA_MAX_CPUS]; 116 static uint64_t firmware_entry; 117 118 static void fw_cfg_boot_set(void *opaque, const char *boot_device, 119 Error **errp) 120 { 121 fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]); 122 } 123 124 static FWCfgState *create_fw_cfg(MachineState *ms) 125 { 126 FWCfgState *fw_cfg; 127 uint64_t val; 128 129 fw_cfg = fw_cfg_init_mem(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4); 130 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, ms->smp.cpus); 131 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, HPPA_MAX_CPUS); 132 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, ms->ram_size); 133 134 val = cpu_to_le64(MIN_SEABIOS_HPPA_VERSION); 135 fw_cfg_add_file(fw_cfg, "/etc/firmware-min-version", 136 g_memdup(&val, sizeof(val)), sizeof(val)); 137 138 val = cpu_to_le64(HPPA_TLB_ENTRIES); 139 fw_cfg_add_file(fw_cfg, "/etc/cpu/tlb_entries", 140 g_memdup(&val, sizeof(val)), sizeof(val)); 141 142 val = cpu_to_le64(HPPA_BTLB_ENTRIES); 143 fw_cfg_add_file(fw_cfg, "/etc/cpu/btlb_entries", 144 g_memdup(&val, sizeof(val)), sizeof(val)); 145 146 val = cpu_to_le64(HPA_POWER_BUTTON); 147 fw_cfg_add_file(fw_cfg, "/etc/power-button-addr", 148 g_memdup(&val, sizeof(val)), sizeof(val)); 149 150 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ms->boot_config.order[0]); 151 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg); 152 153 return fw_cfg; 154 } 155 156 static LasiState *lasi_init(void) 157 { 158 DeviceState *dev; 159 160 dev = qdev_new(TYPE_LASI_CHIP); 161 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 162 163 return LASI_CHIP(dev); 164 } 165 166 static DinoState *dino_init(MemoryRegion *addr_space) 167 { 168 DeviceState *dev; 169 170 dev = qdev_new(TYPE_DINO_PCI_HOST_BRIDGE); 171 object_property_set_link(OBJECT(dev), "memory-as", OBJECT(addr_space), 172 &error_fatal); 173 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 174 175 return DINO_PCI_HOST_BRIDGE(dev); 176 } 177 178 static void machine_hppa_init(MachineState *machine) 179 { 180 const char *kernel_filename = machine->kernel_filename; 181 const char *kernel_cmdline = machine->kernel_cmdline; 182 const char *initrd_filename = machine->initrd_filename; 183 DeviceState *dev, *dino_dev, *lasi_dev; 184 PCIBus *pci_bus; 185 ISABus *isa_bus; 186 char *firmware_filename; 187 uint64_t firmware_low, firmware_high; 188 long size; 189 uint64_t kernel_entry = 0, kernel_low, kernel_high; 190 MemoryRegion *addr_space = get_system_memory(); 191 MemoryRegion *rom_region; 192 MemoryRegion *cpu_region; 193 long i; 194 unsigned int smp_cpus = machine->smp.cpus; 195 SysBusDevice *s; 196 197 /* Create CPUs. */ 198 for (i = 0; i < smp_cpus; i++) { 199 char *name = g_strdup_printf("cpu%ld-io-eir", i); 200 cpu[i] = HPPA_CPU(cpu_create(machine->cpu_type)); 201 202 cpu_region = g_new(MemoryRegion, 1); 203 memory_region_init_io(cpu_region, OBJECT(cpu[i]), &hppa_io_eir_ops, 204 cpu[i], name, 4); 205 memory_region_add_subregion(addr_space, CPU_HPA + i * 0x1000, 206 cpu_region); 207 g_free(name); 208 } 209 210 /* Main memory region. */ 211 if (machine->ram_size > 3 * GiB) { 212 error_report("RAM size is currently restricted to 3GB"); 213 exit(EXIT_FAILURE); 214 } 215 memory_region_add_subregion_overlap(addr_space, 0, machine->ram, -1); 216 217 218 /* Init Lasi chip */ 219 lasi_dev = DEVICE(lasi_init()); 220 memory_region_add_subregion(addr_space, LASI_HPA, 221 sysbus_mmio_get_region( 222 SYS_BUS_DEVICE(lasi_dev), 0)); 223 224 /* Init Dino (PCI host bus chip). */ 225 dino_dev = DEVICE(dino_init(addr_space)); 226 memory_region_add_subregion(addr_space, DINO_HPA, 227 sysbus_mmio_get_region( 228 SYS_BUS_DEVICE(dino_dev), 0)); 229 pci_bus = PCI_BUS(qdev_get_child_bus(dino_dev, "pci")); 230 assert(pci_bus); 231 232 /* Create ISA bus. */ 233 isa_bus = hppa_isa_bus(); 234 assert(isa_bus); 235 236 /* Realtime clock, used by firmware for PDC_TOD call. */ 237 mc146818_rtc_init(isa_bus, 2000, NULL); 238 239 /* Serial ports: Lasi and Dino use a 7.272727 MHz clock. */ 240 serial_mm_init(addr_space, LASI_UART_HPA + 0x800, 0, 241 qdev_get_gpio_in(lasi_dev, LASI_IRQ_UART_HPA), 7272727 / 16, 242 serial_hd(0), DEVICE_BIG_ENDIAN); 243 244 serial_mm_init(addr_space, DINO_UART_HPA + 0x800, 0, 245 qdev_get_gpio_in(dino_dev, DINO_IRQ_RS232INT), 7272727 / 16, 246 serial_hd(1), DEVICE_BIG_ENDIAN); 247 248 /* Parallel port */ 249 parallel_mm_init(addr_space, LASI_LPT_HPA + 0x800, 0, 250 qdev_get_gpio_in(lasi_dev, LASI_IRQ_LAN_HPA), 251 parallel_hds[0]); 252 253 /* fw_cfg configuration interface */ 254 create_fw_cfg(machine); 255 256 /* SCSI disk setup. */ 257 dev = DEVICE(pci_create_simple(pci_bus, -1, "lsi53c895a")); 258 lsi53c8xx_handle_legacy_cmdline(dev); 259 260 /* Graphics setup. */ 261 if (machine->enable_graphics && vga_interface_type != VGA_NONE) { 262 vga_interface_created = true; 263 dev = qdev_new("artist"); 264 s = SYS_BUS_DEVICE(dev); 265 sysbus_realize_and_unref(s, &error_fatal); 266 sysbus_mmio_map(s, 0, LASI_GFX_HPA); 267 sysbus_mmio_map(s, 1, ARTIST_FB_ADDR); 268 } 269 270 /* Network setup. */ 271 if (enable_lasi_lan()) { 272 lasi_82596_init(addr_space, LASI_LAN_HPA, 273 qdev_get_gpio_in(lasi_dev, LASI_IRQ_LAN_HPA)); 274 } 275 276 for (i = 0; i < nb_nics; i++) { 277 if (!enable_lasi_lan()) { 278 pci_nic_init_nofail(&nd_table[i], pci_bus, "tulip", NULL); 279 } 280 } 281 282 /* PS/2 Keyboard/Mouse */ 283 lasips2_init(addr_space, LASI_PS2KBD_HPA, 284 qdev_get_gpio_in(lasi_dev, LASI_IRQ_PS2KBD_HPA)); 285 286 /* register power switch emulation */ 287 qemu_register_powerdown_notifier(&hppa_system_powerdown_notifier); 288 289 /* Load firmware. Given that this is not "real" firmware, 290 but one explicitly written for the emulation, we might as 291 well load it directly from an ELF image. */ 292 firmware_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, 293 machine->firmware ?: "hppa-firmware.img"); 294 if (firmware_filename == NULL) { 295 error_report("no firmware provided"); 296 exit(1); 297 } 298 299 size = load_elf(firmware_filename, NULL, NULL, NULL, 300 &firmware_entry, &firmware_low, &firmware_high, NULL, 301 true, EM_PARISC, 0, 0); 302 303 /* Unfortunately, load_elf sign-extends reading elf32. */ 304 firmware_entry = (target_ureg)firmware_entry; 305 firmware_low = (target_ureg)firmware_low; 306 firmware_high = (target_ureg)firmware_high; 307 308 if (size < 0) { 309 error_report("could not load firmware '%s'", firmware_filename); 310 exit(1); 311 } 312 qemu_log_mask(CPU_LOG_PAGE, "Firmware loaded at 0x%08" PRIx64 313 "-0x%08" PRIx64 ", entry at 0x%08" PRIx64 ".\n", 314 firmware_low, firmware_high, firmware_entry); 315 if (firmware_low < FIRMWARE_START || firmware_high >= FIRMWARE_END) { 316 error_report("Firmware overlaps with memory or IO space"); 317 exit(1); 318 } 319 g_free(firmware_filename); 320 321 rom_region = g_new(MemoryRegion, 1); 322 memory_region_init_ram(rom_region, NULL, "firmware", 323 (FIRMWARE_END - FIRMWARE_START), &error_fatal); 324 memory_region_add_subregion(addr_space, FIRMWARE_START, rom_region); 325 326 /* Load kernel */ 327 if (kernel_filename) { 328 size = load_elf(kernel_filename, NULL, &cpu_hppa_to_phys, 329 NULL, &kernel_entry, &kernel_low, &kernel_high, NULL, 330 true, EM_PARISC, 0, 0); 331 332 /* Unfortunately, load_elf sign-extends reading elf32. */ 333 kernel_entry = (target_ureg) cpu_hppa_to_phys(NULL, kernel_entry); 334 kernel_low = (target_ureg)kernel_low; 335 kernel_high = (target_ureg)kernel_high; 336 337 if (size < 0) { 338 error_report("could not load kernel '%s'", kernel_filename); 339 exit(1); 340 } 341 qemu_log_mask(CPU_LOG_PAGE, "Kernel loaded at 0x%08" PRIx64 342 "-0x%08" PRIx64 ", entry at 0x%08" PRIx64 343 ", size %" PRIu64 " kB\n", 344 kernel_low, kernel_high, kernel_entry, size / KiB); 345 346 if (kernel_cmdline) { 347 cpu[0]->env.gr[24] = 0x4000; 348 pstrcpy_targphys("cmdline", cpu[0]->env.gr[24], 349 TARGET_PAGE_SIZE, kernel_cmdline); 350 } 351 352 if (initrd_filename) { 353 ram_addr_t initrd_base; 354 int64_t initrd_size; 355 356 initrd_size = get_image_size(initrd_filename); 357 if (initrd_size < 0) { 358 error_report("could not load initial ram disk '%s'", 359 initrd_filename); 360 exit(1); 361 } 362 363 /* Load the initrd image high in memory. 364 Mirror the algorithm used by palo: 365 (1) Due to sign-extension problems and PDC, 366 put the initrd no higher than 1G. 367 (2) Reserve 64k for stack. */ 368 initrd_base = MIN(machine->ram_size, 1 * GiB); 369 initrd_base = initrd_base - 64 * KiB; 370 initrd_base = (initrd_base - initrd_size) & TARGET_PAGE_MASK; 371 372 if (initrd_base < kernel_high) { 373 error_report("kernel and initial ram disk too large!"); 374 exit(1); 375 } 376 377 load_image_targphys(initrd_filename, initrd_base, initrd_size); 378 cpu[0]->env.gr[23] = initrd_base; 379 cpu[0]->env.gr[22] = initrd_base + initrd_size; 380 } 381 } 382 383 if (!kernel_entry) { 384 /* When booting via firmware, tell firmware if we want interactive 385 * mode (kernel_entry=1), and to boot from CD (gr[24]='d') 386 * or hard disc * (gr[24]='c'). 387 */ 388 kernel_entry = machine->boot_config.has_menu ? machine->boot_config.menu : 0; 389 cpu[0]->env.gr[24] = machine->boot_config.order[0]; 390 } 391 392 /* We jump to the firmware entry routine and pass the 393 * various parameters in registers. After firmware initialization, 394 * firmware will start the Linux kernel with ramdisk and cmdline. 395 */ 396 cpu[0]->env.gr[26] = machine->ram_size; 397 cpu[0]->env.gr[25] = kernel_entry; 398 399 /* tell firmware how many SMP CPUs to present in inventory table */ 400 cpu[0]->env.gr[21] = smp_cpus; 401 402 /* tell firmware fw_cfg port */ 403 cpu[0]->env.gr[19] = FW_CFG_IO_BASE; 404 } 405 406 static void hppa_machine_reset(MachineState *ms) 407 { 408 unsigned int smp_cpus = ms->smp.cpus; 409 int i; 410 411 qemu_devices_reset(); 412 413 /* Start all CPUs at the firmware entry point. 414 * Monarch CPU will initialize firmware, secondary CPUs 415 * will enter a small idle look and wait for rendevouz. */ 416 for (i = 0; i < smp_cpus; i++) { 417 cpu_set_pc(CPU(cpu[i]), firmware_entry); 418 cpu[i]->env.gr[5] = CPU_HPA + i * 0x1000; 419 } 420 421 /* already initialized by machine_hppa_init()? */ 422 if (cpu[0]->env.gr[26] == ms->ram_size) { 423 return; 424 } 425 426 cpu[0]->env.gr[26] = ms->ram_size; 427 cpu[0]->env.gr[25] = 0; /* no firmware boot menu */ 428 cpu[0]->env.gr[24] = 'c'; 429 /* gr22/gr23 unused, no initrd while reboot. */ 430 cpu[0]->env.gr[21] = smp_cpus; 431 /* tell firmware fw_cfg port */ 432 cpu[0]->env.gr[19] = FW_CFG_IO_BASE; 433 } 434 435 static void hppa_nmi(NMIState *n, int cpu_index, Error **errp) 436 { 437 CPUState *cs; 438 439 CPU_FOREACH(cs) { 440 cpu_interrupt(cs, CPU_INTERRUPT_NMI); 441 } 442 } 443 444 static void hppa_machine_init_class_init(ObjectClass *oc, void *data) 445 { 446 MachineClass *mc = MACHINE_CLASS(oc); 447 NMIClass *nc = NMI_CLASS(oc); 448 449 mc->desc = "HPPA B160L machine"; 450 mc->default_cpu_type = TYPE_HPPA_CPU; 451 mc->init = machine_hppa_init; 452 mc->reset = hppa_machine_reset; 453 mc->block_default_type = IF_SCSI; 454 mc->max_cpus = HPPA_MAX_CPUS; 455 mc->default_cpus = 1; 456 mc->is_default = true; 457 mc->default_ram_size = 512 * MiB; 458 mc->default_boot_order = "cd"; 459 mc->default_ram_id = "ram"; 460 461 nc->nmi_monitor_handler = hppa_nmi; 462 } 463 464 static const TypeInfo hppa_machine_init_typeinfo = { 465 .name = MACHINE_TYPE_NAME("hppa"), 466 .parent = TYPE_MACHINE, 467 .class_init = hppa_machine_init_class_init, 468 .interfaces = (InterfaceInfo[]) { 469 { TYPE_NMI }, 470 { } 471 }, 472 }; 473 474 static void hppa_machine_init_register_types(void) 475 { 476 type_register_static(&hppa_machine_init_typeinfo); 477 } 478 479 type_init(hppa_machine_init_register_types) 480